There is an ic (integrated circuit) testing device 11 that receives singulated ics from a singulation station's bottom table 44, where an ic 15 has slid down onto loading ramp or track 16. The ic will slide into test station 18, where stop pin 22 has been inserted to stop the ic in DUT (device under test) station 20. In the DUT station, the ic is securely held in position by an extractor bar 26, insertion bar 28, and a part guide 24. Thereby, test cite station 18 will move downward and insert ic 15 into testing socket 30. After testing the ic, testing station 18 returns upward with ic in the same secured position. pin 22 will be removed to allow the ic to slide into part holding station 31. If the ic was not defective, pin 32 will be removed to allow the ic to slide onto track 36 of the ic separator station 34. While the test cite station 18 is in the up position a second ic is slid along track 16 and loaded into DUT cite 20 being readied for the next test cycle. However, if the first ic was found to be defective, pin 32 will be positioned so as to stop the ic from sliding onto track 36. Thereby, the test cite 18 will proceed to the down position to test the second ic, and simultaneously pin 32 will be removed to now allow the defective ic to slide onto track 38. The second ic has now completed its testing and is ready to proceed to the remainder of the cycle.
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0. 17. An apparatus for testing singulated integrated circuits, comprising:
a testing apparatus movable between a first position and a second position receiving untested integrated circuits while in the first position and identifying first and second test conditions of an integrated circuit while in the second position;
a holding station coupled to the testing apparatus and movable between the first position and the second position, the holding station receiving tested integrated circuits from the testing apparatus while in the first position and releasing tested integrated circuits having the first test condition while at the first position and releasing tested integrated circuits having the second test condition while at the second position;
a first track for receiving tested integrated circuits having the first test condition from the holding station when the holding station is at the first position; and
a second track for receiving tested integrated circuits having the second test condition from the holding station when the holding station is at the second position.
3. A method for testing an integrated circuit in a testing apparatus after a departure of the integrated circuit from an integrated circuit singulation apparatus comprising the steps of:
a) moving the testing apparatus to a loading position;
b) loading the integrated circuit into the testing apparatus;
c) moving the testing apparatus to a test position to position the integrated circuit for testing;
d) performing electrical tests on the integrated circuit to provide a tested integrated circuit having identified first and second test conditions;
e) moving the testing apparatus from the test position to position the tested integrated circuit for unloading;
f) moving the tested integrated circuit to a first unloading position;
g) unloading the tested integrated circuit from the first unloading position to a first track when it has said first test condition;
h) moving the tested integrated circuit to a second unloading position when it has said second test condition; and
i) unloading the tested integrated circuit from the second unloading position to a second track when it has said second test condition.
0. 16. A method of testing an integrated circuit after the singulation thereof using a testing apparatus having a test site, a holding station, a non-defective integrated circuit track, a defective integrated circuit track, a first position, and a second position, the method comprising:
receiving the integrated circuit at the testing apparatus while the testing apparatus is in the first position;
moving the testing apparatus to the second position;
testing the integrated circuit thereby identifying defective and non-defective conditions thereof;
moving the testing apparatus to the first position after testing of the integrated circuit;
allowing the tested integrated circuit to proceed to the holding station in a first unloading position;
receiving a second singulated integrated circuit into the testing apparatus while in the first position;
unloading non-defective integrated circuits to the non-defective integrated circuit track from the first unloading position; and
moving the holding station to a second unloading position and unloading defective integrated circuits to the defective integrated circuit track.
0. 15. A method of testing an integrated circuit in a testing apparatus having a test site, a holding station, a non-defective integrated circuit track, a defective integrated circuit track, a first position, and a second position, after singulation of the integrated circuit in an integrated circuit singulation apparatus, the method comprising:
receiving the integrated circuit at the testing apparatus while the testing apparatus is in the first position;
moving the testing apparatus to the second position;
testing the integrated circuit to identify defective and non-defective conditions of the integrated circuit;
moving the testing apparatus to the first position to allow the tested integrated circuit to proceed to the holding station in a first unloading position while receiving a second singulated integrated circuit into the testing apparatus;
allowing non-defective integrated circuits to proceed to the non-defective integrated circuit track from the first unloading position; and
moving the holding station to a second unloading position and allowing defective integrated circuits to proceed to the defective integrated circuit track.
0. 19. A method of testing singulated integrated circuits in a testing apparatus having a first position, a second position, a first integrated circuit track, a second integrated circuit track, and a holding station, comprising:
receiving an untested, singulated integrated circuit into the testing apparatus while in the first position;
moving the untested, singulated integrated circuit to the second position;
testing the untested, singulated integrated circuit to determine first and second test conditions thereof;
moving the tested, singulated integrated circuit back to the first position;
allowing the tested, singulated integrated circuit to move to the holding station in the first position;
receiving another untested, singulated integrated circuit into the testing apparatus while in the first position;
releasing tested, singulated integrated circuits having the first test condition to the first integrated circuit track while the holding station is in the first position; and
releasing tested, singulated integrated circuits having the second test condition to the second integrated circuit track while the holding station is in the second position.
5. A testing apparatus for controlling positioning of a circuit before, during and after a circuit test is performed on the circuit, the circuit test determining a first and a second test condition of the circuit, the apparatus comprising:
a) a positioning apparatus having a first port and a second port and capable of displacement to a first position and a second position, said first port receiving the circuit for testing;
b) a testing apparatus for securing said circuit during a testing of the circuit, said positioning apparatus displaced to said second position during the testing;
c) a testing control pin for retaining said circuit in said first port prior to the testing and for allowing a transfer of said circuit from said first port to said second port subsequent to the testing;
d) a first track for receiving said circuit from said second port when said circuit test finds said circuit to have the first test condition, said positioning apparatus being in said first position; and
e) a second track for receiving said circuit from said second port when said circuit test finds said circuit to have the second test condition, said positioning apparatus being in said second position.
0. 7. An integrated circuit testing apparatus for testing an integrated circuit leaving an integrated circuit singulation station, comprising:
a receiving apparatus positioned to receive untested integrated circuits from the integrated circuit singulation station;
a testing apparatus positioned to receive the untested integrated circuits from the receiving apparatus and test the integrated circuits to identify defective integrated circuits and non-defective integrated circuits, the testing apparatus including a holding station moveable with the testing apparatus, a first position, and a second position, the testing apparatus while in the first position allowing tested integrated circuits to proceed to the holding station and allowing untested integrated circuits to be received from the receiving apparatus; and
a separating apparatus connected to the testing apparatus to separate defective integrated circuits from non-defective integrated circuits after testing thereof, the separating apparatus including a first track for receiving integrated circuits from the holding station in the first position, and a second track for receiving integrated circuits from the holding station in the second position.
0. 20. An apparatus for testing singulated integrated circuits, comprising:
a loading apparatus for supplying an integrated circuit leaving an integrated circuit singulation station to the apparatus;
a testing apparatus movable between a first position and a second position for receiving untreated integrated circuits while in the first position and identifying first and second test conditions of an integrated circuit while in the second position;
a holding station coupled to the testing apparatus and movable between the first position and the second position, the holding station receiving tested integrated circuits from the testing apparatus while in the first position and releasing tested integrated circuits having the first test condition while at the first position and releasing tested integrated circuits having the second test condition while at the second position;
a first track for receiving tested integrated circuits having the first test condition from the holding station when the holding station is at the first position; and
a second track for receiving tested integrated circuits having the second test condition from the holding station when the holding station is at the second position.
0. 14. A method of testing an integrated circuit after singulation thereof using a testing apparatus having a test site, a holding station, a non-defective integrated circuit track, a defective integrated circuit track, a first position, and a second position, the method comprising:
transferring the integrated circuit from the integrated circuit singulation apparatus;
receiving the integrated circuit at the testing apparatus while the testing apparatus is in the first position;
moving the testing apparatus to the second position;
testing the integrated circuit thereby identifying defective and non-defective conditions thereof;
moving the testing apparatus to the first position after testing of the integrated circuit;
allowing the tested integrated circuit to proceed to the holding station in a first unloading position;
receiving a second singulated integrated circuit into the testing apparatus while in the first position;
unloading non-defective integrated circuits to the non-defective integrated circuit track from the first unloading position; and
moving the holding station to a second unloading position and unloading defective integrated circuits to the defective integrated circuit track.
0. 13. A method of testing an integrated circuit in a testing apparatus having a test site, a holding station, a non-defective integrated circuit track, a defective integrated circuit track, a first position, and a second position, after singulation of the integrated circuit in an integrated circuit singulation apparatus, the method comprising:
transferring the integrated circuit from the integrated circuit singulation apparatus;
receiving the integrated circuit at the testing apparatus while the testing apparatus is in the first position;
moving the testing apparatus to the second position;
testing the integrated circuit to identify defective and non-defective conditions of the integrated circuit;
moving the testing apparatus to the first position to allow the tested integrated circuit to proceed to the holding station in a first unloading position while receiving a second singulated integrated circuit into the testing apparatus;
allowing non-defective integrated circuits to proceed to the non-defective integrated circuit track from the first unloading position; and
moving the holding station to a second unloading position and allowing defective integrated circuits to proceed to the defective integrated circuit track.
0. 22. A method of testing singulated integrated circuits in a testing apparatus having a first position, a second position, a first integrated circuit track, a second integrated circuit track, and a holding station, comprising:
transferring the integrated circuit from the integrated circuit singulation apparatus;
receiving an untested, singulated integrated circuit into the testing apparatus while in the first position;
moving the untested, singulated integrated circuit to the second position;
testing the untested, singulated integrated circuit to determine first and second test conditions thereof;
moving the tested, singulated integrated circuit back to the first position;
allowing the tested, singulated integrated circuit to move to the holding station in the first position;
receiving another untested, singulated integrated circuit into the testing apparatus while in the first position;
releasing tested, singulated integrated circuits having the first test condition to the first integrated circuit track while the holding station is in the first position; and
releasing tested, singulated integrated circuits having the second test condition to the second integrated circuit track while the holding station is in the second position.
0. 10. An integrated circuit testing apparatus for testing an integrated circuit leaving an integrated circuit singulation station, comprising:
a loading apparatus for supplying the integrated circuit leaving the integrated circuit singulation station to the integrated circuit testing apparatus;
a receiving apparatus positioned to receive untested integrated circuits from the integrated circuit singulation station;
a testing apparatus positioned to receive the untested integrated circuits from the receiving apparatus and test the integrated circuits to identify defective integrated circuits and non-defective integrated circuits, the testing apparatus including a holding station, a first position, and a second position, the testing apparatus while in the first position allowing tested integrated circuits to proceed to the holding station and allowing untested integrated circuits to be received from the receiving apparatus; and
a separating apparatus connected to the testing apparatus to separate defective integrated circuits from non-defective integrated circuits after testing thereof, the separating apparatus including a first track for receiving non-defective integrated circuits from the holding station in the first position and a second track for receiving defective integrated circuits from the holding station in the second position.
1. An integrated circuit testing apparatus for testing an integrated circuit leaving an ic singulation station, comprising:
a) a receiving means positioned in a pre test position for receiving the integrated circuit from the ic singulation station;
b) a testing site, positioned to secure the integrated circuit after a displacement of said receiving means to a test position, the displacement positioning said integrated circuit in said test testing site said testing site having a test connection for making physical contact with said integrated circuit when it is secured in said testing site, a circuit test performed on said integrated circuit when it is secured in said testing site; and
c) a holding station having a first post test position and a second post test position, said holding station receiving the integrated circuit in said first post test position from the receiving means following a return of the receiving means to said pre test position subsequent to the performing of the circuit test of the integrated circuit;
d) a first track for receiving the integrated circuit from the holding station when the holding station is in said first post test position and when the circuit test determines that the integrated circuit has a first test condition: and
e) a second track for receiving the integrated circuit from the holding station when the holding station is in said second post test position, said second test position attained when said receiving means returns to said test position, said second track receiving the integrated circuit when the circuit test determines that the integrated circuit has a second test condition.
2. The apparatus of
a control pin for retaining the integrated circuit in the first post test position, when the integrated circuit has said second test condition, and for releasing the integrated circuit from the first post test position to said first track when said integrated circuit has said first test condition, and for releasing said integrated circuit from said second post test position to said second track when said integrated circuit has said second test condition.
4. The method as specified in
6. The apparatus as specified in
0. 8. The apparatus of
0. 9. The apparatus of
the holding station while in the first position holding defective integrated circuits from proceeding to the separating apparatus, and allowing non-defective integrated circuits to proceed to the first track of the separating apparatus; and
the holding station while in the second position releasing defective integrated circuits to the second track of the separating apparatus.
0. 11. The apparatus of
0. 12. The apparatus of
the holding station while in the first position holding defective integrated circuits from proceeding to the separating apparatus, and allowing non-defective integrated circuits to proceed to the first track of the separating apparatus; and
the holding station while in the second position releasing defective integrated circuits to the second track of the separating apparatus.
0. 18. The apparatus of
0. 21. The apparatus of
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The present invention relates to integrated circuits ICs). Particularly, this invention relates to IC quality testing equipment. Uniquely, there is a method and device that can detect defective ICs that are coming off of an IC singulation station or work process.
One skilled in the art will be familiar with the operation of the machine and its variations. Specifically, all processes or work station activities take place on a paced operation which is timed to the platen's 40 up and down cycles. When plate 40 is up, the conveyor system will move the leadframe/s forward, readying the ICs for their next step of operation or simply loading new leadframes in preparation for the assembly process. When the platen 40 is “punched down”, the various work stations perform their various designed operations, cutting, shaping, cleaning, separating etc.
After the ICs have been separated, they are collected and forwarded to subsequent work stations. Such as lead finishing or solder coating, primary testing involving a large amount of tests and expensive slow equipment, and acceptable quality level tests examining for physical defects in the packages/ICs. Thereafter, the ICs are tested to determine which ones are defective.
After an IC has been singulated or separated from the other ICs, there is still remaining a lot of work or investment that need to be put into each IC before they are completely done. However, there are many defects that could have already occurred up to the point of singulating the ICs. Typically, the ICs are tested for defects after completing the full production process occurring well after the singulation stage. A few of the main reasons for testing so late in the production cycle is that the typical tests performed are costly and time consuming. There has not been any known method of or device for testing the ICs immediately after singulation of the ICs. Such a testing system would undoubtedly save a great deal of time and money by not working on identified defective ICs.
It is noted that the above described problems, as well as other problems, are solved through the subject invention and will become more apparent, to one skilled in the art, from the detailed description of the subject invention.
The invention is a method and an apparatus for controlling positioning of circuit before, during and after a circuit.
One skilled in the art will appreciate the advantage of the method of and device for testing the ICs immediately after singulation of the ICs. Specifically, there is a method of and device for receiving the singulated ICs and performing tests to separate defective ICs from the rest of the ICs.
Other features and advantages of the present invention may become more clear from the following detailed description of the invention, taken in conjunction with the accompanying drawings and claims, or may be learned by the practice of the invention.
It is noted that the drawings of the invention are not to scale. The drawings are merely schematic representations, not intended to portray specific parameters of the invention. The drawings are intended to depict only typical embodiments of the invention, and are therefore not robe considered limiting of its scope. The invention will be described with additional specificity and detail through the use of the accompanying drawings. Additionally, like numbering in the drawings represent like elements within and between drawings.
This disclosure of the invention is submitted in furtherance of the constitutional purposes of the U.S. Patent Laws “to promote the progress of science and useful arts” (Article 1, Section 8 of the U.S. Constitution).
Referring to
Referring to
It is noted that the testing device 11 can test a whole series of ICs in a parallel process, using side by side testing device stations.
It is further noted that there are only certain test that can be performed in a typically short period of time. With the short cycle of the testing, the testing may keep pace with the ICs that are being singulated at a similarly fast rate.
In particular, there are several typical testing procedures that will identify gross IC errors. For example, open and shorts are easily tested for by loading data onto a diagonal in the memory array or performing other parametric testing. This will test for the proper function of each column and row of the device (IC). Other test check for proper current at both lower and higher levels.
As a result, there are many defects that can be identified in a very short test cycle. Specifically, electro static discharge damage, massive array failures, full row/-column failures, physically scratched die, blanks (where there is no die in the encapsulated IC), improper wire bonding to the die, and IC lead/pin failures, to name a few.
There are several obvious variations to the broad invention and thus come within the scope of the present invention. Uniquely, this invention may work with any type of IC; like Js, DIPs, or ZIPs, etc. However, the test cite station 18 parts will obviously have to be changed to accommodate for the various IC shapes. These changes would be easy for one skilled in the art.
Additionally, another variation of the invention would involve the way of ICs are loaded into the testing cite 18. One form would involve using robotic pick and place technology. Another form could use a conveyor belt to collect the ICs from the singulation stations and to load into the testing device. Of course with these alternative technologies, the testing device would not have to be angled to use the gravity type feeding used in the illustrated embodiment of the invention.
While the invention has been taught with specific reference to these embodiments, someone skilled in the art will recognize that changes can be made in form and detail without departing from the spirit and the scope of the invention. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention is, therefore, indicated by the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.
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| Sep 19 1996 | Micron Tehnology, Inc. | (assignment on the face of the patent) | / |
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