A monitor control system capable of reprogramming the function of a LCD monitor. The monitor control system utilizes VGA signal lines for video signal transmission during normal mode of operation and the same VGA signal lines for transmitting erase/record commands and data when the erasable programmable rom inside the monitor demands reprogramming. Using an isolator circuit in the monitor control system for isolating an erase/record pathway of an erasable programmable rom from a normal video pathway, data within the erasable programmable rom can be modified without opening up the monitor casing. Hence, the modification of monitor function is much more convenient.
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0. 88. A system for updating the function of a display, comprising:
a recording device for storing and outputting a programming signal which comprises a recording command and recorded data;
a video signal port coupled to the recording device for transmitting the recording command and the recorded data; and
a display controller having a programming memory, coupled to the video signal port, wherein if a setting command of the programming signal from the video signal port is correct, the display controller is modified according to the recording command and the recorded data, wherein the video signal port and the display controller are installed in the display system.
0. 51. A method for reprogramming the function of a display system, comprising the steps of:
tapping a plurality of signals from a set of video signal lines to perform an address comparison with a pre-set address;
triggering a programming mode inside the display system when one of the tapped address matches that of the pre-set address;
reading a recording command and deciding what action to take after the programming mode is activated;
reading in recorded data and writing the recorded data into a memory unit when the recording command is for a write operation, and then returning to the previous step; and
returning to the first step when the recording command demands a return to a non-programming mode.
0. 28. A device of a display for updating the function of the display, comprising:
a set of video signal lines for transmitting a plurality of video signals or a recording signal, wherein the recording signal comprises a recording command and a recorded data;
a signal detector couple to the video signal lines for detecting and re-transmitting the recording command and the recorded data; and
a display controller couple to the signal detector, wherein the display controller is normally connected to a video pathway, but after the signal detector detects the recording signal, the display controller switches to a recording pathway, and the display controller decodes the recording signal and transfers the decoded recording signal to a non-volatile memory through the recording pathway, wherein a content of the non-volatile memory can be modified according to the decoded recording signal.
0. 54. A system for reprogramming the function of a display, comprising:
a recording device for holding and transmitting a recording command and recorded data;
a set of video signal lines coupled to the recording device for transmitting the recording command and the recorded data; and
a display controller with a monitor-in-system programming function, wherein the display controller is coupled to the video signal lines so that the recording command of the recording device and the recorded data are received from the recording device via the video signal lines, and then a plurality of data signals, and a control signal are exported for reprogramming a rom unit, wherein
the rom unit coupled to the display controller via signal lines for transferring the data signals and the control signal, so that data stored in the rom unit can be modified according to the data signals and the control signal, and the data signals coming from the display controller.
0. 71. A device for reprogramming the function of a display, comprising:
a set of video signal lines for transmitting a recording signal which comprises a recording command and a recorded data;
a signal detector coupled to the video signal lines for detecting and re-transmitting the recording command and the recorded data;
an activation device coupled to the signal detector, wherein the activation device is normally connected to a video pathway, but after the recording command is detected, the activation device is switched to a recording pathway so that the recording command and the recorded data can be re-directed;
a command decoder connected to the activation device via the recording pathway, wherein the decoder translates the recording command into a control signal and translates the recorded data into a plurality of data signals;
a plurality of signal lines for transferring the control signal and the data signals to an external rom unit, wherein a content of the rom unit can be modified according to the control signal and the data signals; and
a mode return device coupled to the command decoder and the activation device, wherein the reprogramming status of the rom unit can be determined from the recording signal so that the activation device can be triggered to switch over connection from the recording pathway to the video pathway after reprogramming is finished.
0. 1. A device for reprogramming the function of a liquid crystal display (LCD) monitor, comprising:
a set of video graphic adapter (VGA) signal lines for transmitting a plurality of erase/record commands and a plurality of erase/record data;
a signal detector coupled to the VGA signal lines for detecting and re-transmitting the erase/record commands and data;
an activation device coupled to the signal detector, wherein the activation device is normally connected to a video pathway, but as soon as erase/record commands are detected, the activation device is switched to an erase/record pathway so that erase/record commands and data can be re-directed;
a read-only-memory (rom) erase/record command decoder connected to the activation device via the erase/record pathway, wherein the decoder translates the erase/record commands into a plurality of control signals and translates the erase/record data into a plurality of address signals and a plurality of data signals;
a plurality of signal lines for transferring the control signals, the address signals, and the data signals to an external rom unit, wherein a content of the rom unit can be modified according to the control signals, the address signals, and the data signals; and
a mode return device coupled to the rom erase/record command decoder and the activation device, wherein the reprogramming status of the rom unit can be determined from the address, data and read/write signals so that the activation device can be triggered to switch over connection from the erase/record pathway to the video pathway as soon as reprogramming is finished.
0. 2. The device of
0. 3. The device of
0. 4. The device of
0. 5. The device of
an inter-integrated circuit multiple address content comparator circuit coupled to the VGA signal lines for comparing with a plurality of consecutive address sequences in the erase/record data such that a set signal is transmitted when there is a match with a pre-set address sequence; and
a monitor-in-system programming control flag unit coupled to the inter-integrated circuit multiple address content comparator circuit for transmitting a start signal after receiving the set signal.
0. 6. The device of
a monitor-in-system reprogramming initialization circuit for producing a select signal after receiving the start signal; and
an erase/record pathway isolator for switching over connection from the video pathway to the erase/record pathway after receiving the select signal and transmitting the erase/record commands and data via the erase/record pathway.
0. 7. The device of
an inter-integrated interface circuit for receiving and translating the erase/record commands and data; and
an erase/record command decoder for receiving translated erase/record commands and data and outputting address, data and erase/read/write signals.
0. 8. The device of
a hidden rom for holding a program code for erase/record commands;
a random access memory (RAM) unit for holding erase/record data;
a central processing unit coupled to the hidden rom, the RAM unit and the inter-integrated interface circuit, wherein the central processing unit receives the erase/record commands and data passing through the inter-integrated circuit interface circuit and then stores the erase/record data in the RAM unit, while the erase/record commands are decoded by referring to the program code in the hidden rom and then the decoded commands are re-transmitted; and
an erase/record control register coupled to the central processing unit for receiving the decoded erase/record commands and converting the erase/record commands into the interface control signals or erase/read/write signals, and converting the erase/record data stored in the RAM unit into address and data signals.
0. 9. The device of
0. 10. The device of
a mode return control register for receiving the address, data and erase/read/write signals and producing a mode return signal as soon as a reprogramming operation is finished; and
a mode return circuit coupled to the mode return control register and the activation device for sending a stop signal to the activation device after receiving the mode return signal so that the activation device switches over connection from the erase/record pathway back to the video pathway.
0. 11. The device of
0. 12. The device of
0. 13. A system for reprogramming the function of a liquid crystal display (LCD) monitor, comprising:
an erase/record device for holding and transmitting a plurality of erase/record commands and a plurality of erase/record data;
a set of video graphic adapter (VGA) signal lines coupled to the erase/record device for transmitting the erase/record commands and data; and
a LCD monitor controller with a monitor-in-system programming function, wherein the LCD monitor controller is coupled to the VGA signal lines so that the erase/record commands of the erase/record device and data are received from the erase/record device via the VGA signal lines, and then a plurality of address signals, a plurality of data signals, and a plurality of control signals are exported for reprogramming a rom unit, wherein
the rom unit coupled to the LCD monitor controller via signal lines for transferring the address signals, the data signals and the control signals, so that data stored in the rom unit can be modified according to the address signals and the control signals, and the data signals coming from the LCD monitor controller.
0. 14. The system of
0. 15. The system of
0. 16. The system of
a signal detector coupled to the VGA signal lines for detecting and transmitting the erase/record commands and data;
an activation device coupled to the signal detector, wherein the activation device is normally connected to a video pathway, but as soon as erase/record commands is detected, the activation device is switched to an erase/record pathway so that erase/record commands and data can be re-directed;
a rom erase/record command decoder connected to the activation device via the erase/record pathway, wherein the decoder translates the erase/record commands into a plurality of erase/read/write signals and translates the erase/record data into a plurality of address signals and a plurality of data signals; and
a mode return device coupled to the rom record command decoder and the activation device, wherein the reprogramming status of a rom unit can be determined from the address, data and erase/read/write signals so that the activation device can be triggered to switch over connection from the erase/record pathway to the video pathway as soon as reprogramming is finished.
0. 17. The system of
an inter-integrated circuit multiple address content comparator circuit coupled to the VGA signal lines for comparing with a plurality of consecutive address sequences in the erase/record data such that a set signal is transmitted when there is a match with a pre-set address sequence; and
a monitor-in-system programming control flag unit coupled to the inter-integrated circuit multiple address content comparator circuit for transmitting a start signal after receiving the set signal.
0. 18. The system of
a monitor-in-system reprogramming initialization circuit for producing a select signal after receiving the start signal; and
an erase/record pathway isolator for switching over connection from the video pathway to the erase/record pathway after receiving the select signal and transmitting the erase/record commands and data via the erase/record pathway.
0. 19. The system of
an inter-integrated interface circuit for receiving and translating the erase/record commands and data; and
an erase/record command decoder for receiving translated erase/record commands and data and outputting address, data and erase/read/write signals.
0. 20. The system of
a hidden rom for holding a program code for erase/record commands;
a random access memory (RAM) unit for holding erase/record data;
a central processing unit coupled to the hidden rom, the RAM unit and the inter-integrated interface circuit, wherein the central processing unit receives the erase/record commands and data passing through the inter-integrated circuit interface circuit and then stores the erase/record data in the RAM unit, while the erase/record commands are decoded by referring to the program code in the hidden rom after which the decoded commands are re-transmitted; and
an erase/record control register coupled to the central processing unit for receiving the decoded erase/record commands and converting the erase/record commands into the interface control signals or erase/read/write signals, and converting the erase/record data stored in the RAM unit into address and data signals.
0. 21. The system of
0. 22. The system of
a mode return control register for receiving the address, data and read/write signals and producing a mode return signal as soon as a reprogramming operation is finished; and
a mode return circuit coupled to the mode return control register and the activation device for sending a stop signal to the activation device after receiving the mode return signal so that the activation device switches connection from the erase/record pathway back to the video pathway.
0. 23. The system of
0. 24. The system of
0. 25. A method for reprogramming the function of a liquid crystal display (LCD) monitor system, comprising the steps of:
tapping a plurality of signals from a set of video graphic adapter (VGA) signal lines to perform a plurality of consecutive address sequence comparisons with a pre-set address sequence;
triggering a programming mode inside the LCD monitor system when one of the tapped consecutive address sequences matches that of the pre-set address sequence;
reading an erase/record command and deciding what actions to take as soon as the programming mode is activated;
reading in erase/record data and writing the erase/record data into a memory unit when the erase/record command is for a write operation, and then returning to the previous step; and
returning to the very first step when the erase/record command demands a return to a non-programming mode.
0. 26. The method of
0. 27. The method of
0. 29. The device of
0. 30. The device of
0. 31. The device of
0. 32. The device of
0. 33. The device of
0. 34. The device of
0. 35. The device of
0. 36. The device of
0. 37. The device of
0. 38. The device of
an address content comparator circuit coupled to the video signal lines for comparing with an address in the recorded data such that a set signal is transmitted when there is a match with a pre-set address; and
a programming control flag unit coupled to the address content comparator circuit for transmitting a start signal after receiving the set signal.
0. 39. The device of
a reprogramming initialization circuit for producing a select signal after receiving the start signal; and
a recording pathway isolator for switching over connection from the video pathway to the recording pathway after receiving the select signal and transmitting the recording command and the recorded data via the recording pathway.
0. 40. The device of
an interface circuit for receiving and translating the recording command and the recorded data; and
a command decoder for receiving translated the recording command and the recorded data and outputting erase/read/write and data signals.
0. 41. The device of
a rom with a program code for the recording command;
a random access memory (RAM) unit for holding the recorded data;
a central processing unit coupled to the rom, the RAM unit and the interface circuit, wherein the central processing unit receives the recording command and the recorded data passing through the interface circuit and then stores the recorded data in the RAM unit, while the recording command is decoded by referring to the program code in the rom and then the decoded command is re-transmitted; and
a control register coupled to the central processing unit for receiving the decoded recording command and converting the recording command into an interface control signal or erase/read/write signals and converting the recorded data stored in the RAM unit into the data signals.
0. 42. The device of
0. 43. The device of
a mode return control register for receiving the decoded recording signal and producing a mode return signal after a reprogramming operation is finished; and
a mode return circuit coupled to the mode return control register for sending a stop signal to the display controller after receiving the mode return signal so that the display controller switches over connection from the recording pathway back to the video pathway.
0. 44. The device of
0. 45. The device of
0. 46. The device of
0. 47. The device of
0. 48. The device of
0. 49. The device of
0. 50. The device of
0. 52. The method of
0. 53. The method of
0. 55. The system of
0. 56. The system of
0. 57. The system of
a signal detector coupled to the video signal lines for detecting and transmitting the recording command and the recorded data;
an activation device coupled to the signal detector, wherein the activation device is normally connected to a video pathway, but when the recording command is detected, the activation device is switched to a recording pathway so that the recording command and the recorded data can be re-directed;
a command decoder connected to the activation device via the recording pathway, wherein the decoder translates the recording command into a plurality of erase/read/write signals and translates the recorded data into a plurality of address signals and a plurality of data signals; and
a mode return device coupled to the command decoder and the activation device, wherein the reprogramming status of a rom unit can be determined from the address, data and erase/read/write signals so that the activation device can be triggered to switch over connection from the recording pathway to the video pathway after reprogramming is finished.
0. 58. The system of
an inter-integrated circuit address content comparator circuit coupled to the video signal lines for comparing with an address in the recorded data such that a set signal is transmitted when there is a match with a pre-set address; and
a monitor-in-system programming control flag unit coupled to the inter-integrated circuit address content comparator circuit for transmitting a start signal after receiving the set signal.
0. 59. The system of
a monitor-in-system reprogramming initialization circuit for producing a select signal after receiving the start signal; and
an recording pathway isolator for switching over connection from the video pathway to the recording pathway after receiving the select signal and transmitting the recording command and the recorded data via the recording pathway.
0. 60. The system of
an inter-integrated circuit interface circuit for receiving and translating the recording command and the recorded data; and
an erase/record command decoder for receiving translated recording command and recorded data and outputting address, data and erase/read/write signals.
0. 61. The system of
a hidden rom for holding a program code for the recording command;
a random access memory (RAM) unit for holding the recorded data;
a central processing unit coupled to the hidden rom, the RAM unit and the inter-integrated circuit interface circuit, wherein the central processing unit receives the recording command and the recorded data passing through the inter-integrated circuit interface circuit and then stores the recorded data in the RAM unit, while the recording command is decoded by referring to the program code in the hidden rom after which the decoded command is re-transmitted; and
a recording control register coupled to the central processing unit for receiving the decoded recording command and converting the recording command into the interface control signals or erase/read/write signals, and converting the recorded data stored in the RAM unit into the address and data signals.
0. 62. The system of
0. 63. The system of
a mode return control register for receiving the address, data and read/write signals and producing a mode return signal after a reprogramming operation is finished; and
a mode return circuit coupled to the mode return control register and the activation device for sending a stop signal to the activation device after receiving the mode return signal so that the activation device switches connection from the recording pathway to the video pathway.
0. 64. The device of
0. 65. The device of
0. 66. The device of
0. 67. The device of
0. 68. The device of
0. 69. The system of
0. 70. The system of
0. 72. The device of
0. 73. The device of
0. 74. The device of
0. 75. The device of
an inter-integrated circuit address content comparator circuit coupled to the video signal lines for comparing with an address in the recorded data such that a set signal is transmitted when there is a match with a pre-set address; and
a monitor-in-system programming control flag unit coupled to the inter-integrated circuit address content comparator circuit for transmitting a start signal after receiving the set signal.
0. 76. The device of
a monitor-in-system reprogramming initialization circuit for producing a select signal after receiving the start signal; and
a recording pathway isolator for switching over connection from the video pathway to the recording pathway after receiving the select signal and transmitting the recording command and the recorded data via the recording pathway.
0. 77. The device of
an inter-integrated circuit interface circuit for receiving and translating the recording command and the recorded data; and
an erase/record command decoder for receiving translated the recording command and recorded data and outputting address, data and erase/read/write signals.
0. 78. The device of
a hidden rom for holding a program code for the recording command;
a random access memory (RAM) unit for holding the recorded data;
a central processing unit coupled to the hidden rom, the RAM unit and the inter-integrated circuit interface circuit, wherein the central processing unit receives the recording command and the recorded data passing through the inter-integrated circuit interface circuit and then stores the recorded data in the RAM unit, while the recording command is decoded by referring to the program code in the hidden rom and then the decoded command is re-transmitted; and
a control register coupled to the central processing unit for receiving the decoded recording command and converting the recording command into an interface control signal or erase/read/write signals, and converting the recorded data stored in the RAM unit into the address and data signals.
0. 79. The device of
0. 80. The device of
a mode return control register for receiving the data and control signals and producing a mode return signal after a reprogramming operation is finished; and
a mode return circuit coupled to the mode return control register and the activation device for sending a stop signal to the activation device after receiving the mode return signal so that the activation device switches over connection from the recording pathway back to the video pathway.
0. 81. The device of
0. 82. The device of
0. 83. The device of
0. 84. The device of
0. 85. The device of
0. 86. The system of
0. 87. The system of
0. 89. The system for updating the function of the display as claimed in
0. 90. The system for updating the function of the display as claimed in
0. 91. The system for updating the function of the display as claimed in
a detecting device coupled to the video signal port for detecting and outputting the recording command and the recorded data;
a starting device coupled to the detecting device for receiving the recording command and the recorded data and then transmitting the recording command and the recorded data when the starting device is switched from a video path to a recording path;
a command decoder connected to the starting device for converting the recording command into a recording signal and the recorded data into data signals by switching the starting device to the recording path, and the command decoder also connected to the programming memory for updating the programming memory according to the recording signal and the data signals; and
a recovery device coupled to the command decoder and the starting device for switching the starting device according to the recording signal or the data signals, the starting device is switching from the recording path to the video path after the data of the programming memory is already updated.
0. 92. The system for updating the function of the display as claimed in
a checking circuit coupled to the video signal port for checking the setting command of the programming signal and then transmitting a setting signal when the checked setting command is correct; and
a programming flag coupled to the checking circuit for setting the display to a programming control mode according to the setting signal and transmitting a programming starting signal.
0. 93. The system for updating the function of the display as claimed in
a programming reset generating circuit for generating a selecting signal according to the programming starting signal; and
a recording path separator switched from the video path to the recording path according to the selecting signal and transmitting the recording command and the recorded data via the recording path.
0. 94. The system for updating the function of the display as claimed in
an inter-integrated circuit interface circuit for receiving and converting the recording command and the recorded data; and
a recording command decoder for receiving the converted recording command and the recorded data and transmitting the recording signal and the data signals.
0. 95. The system for updating the function of the display as claimed in
a hidden rom for storing the program codes of the recording command;
a RAM for storing the recorded data;
a CPU coupled to the hidden rom, the RAM and the inter-integrated circuit interface circuit for receiving the inter-integrated circuit interface circuit-converting recording command and recorded data, storing the recorded data in the RAM, decoding the recording command according to the program code of the hidden rom and then sending the decoded recording command; and
a recording control recorder coupled to the CPU for receiving the decoded recording command and converting the decoded recording command into the recording signal and sending the recorded data stored in the RAM according to the data signals.
0. 96. The system for updating the function of the display as claimed in
0. 97. The system for updating the function of the display as claimed in
a recovery control recorder for receiving the data signal and the recording signal and transmitting a recovery signal after recording is achieved; and
a recovery reset circuit coupled to the recovery control recorder and the starting device for transmitting a programming stop signal to switch the starting device from the recording path to the video path when receiving the recovery signal.
0. 98. The system for updating the function of the display as claimed in
0. 99. The system for updating the function of the display as claimed in
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This application is a continuation-in-part of application Ser. No. 09/575,890, filed on May 22, 2000, now pending, which is a continuation-in-part of application Ser. No. 09/414,251, filed on Oct. 7, 1999, now U.S. Pat. No. 6,295,053. This application is also a continuation-in-part of application Ser. No. 09/543,008, filed on Apr. 4, 2000 now U.S. Pat. No. 6,577,301, now allowed.
More than one reissue application has been filed for Pat. No. 6,697,058. In addition to the present reissue application, application No. 11/361,038 filed on Feb. 22, 2006 is also a reissue application of Pat. No. 6,697,058. The present application and application No. 11/361,038 were filed on the same day and directed to different aspects of the invention disclosed and claimed in Pat. No. 6,697,058.
1. Field of the Invention
The invention relates to a device and a method for repeatedly updating the function of a liquid quid crystal (LCD) monitor, and more particularly to a device and a method for repeatedly updating the function of a LCD monitor by using Display Data Channel (DDC) signal lines for signal transmission.
2. Description of the Related Art
In a current monitor system, particularly to a LCD monitor, a monitor controller must be exchanged when function modifying or debugging, resulting in high cost consumed. As to a further advanced monitor system, a corresponding monitor controller has a build-in read only memory (ROM) which is an erasable programmable read only memory. By updating data stored in the erasable programmable read only memory, function modification and debugging can be achieved.
Referring to
When it is necessary to modify the function of the monitor system, data stored in the flash ROM 20 needs to be updated. First, the case of the monitor must be opened. Then, the first jumper 14 is used to separate the original circuit and the rewriting pathway to the flash ROM. And then, a cable connected to the socket 80 to transmit the updated data.
Obviously, it is really inconvenient to update the monitor system because the case of the conventional monitor must be first opened, and then the jumper has to be switched for recording the erasable programmable read only memory of the monitor controller 10.
As a result, it is rather inconvenience when the monitor system, such as LCD monitor, is updated because it is necessary to open the case of the monitor and to switch jumpers for recording the erasable programmable read only memory of the monitor controller 10.
The invention is to provides a device for reprogramming function of a LCD monitor, which needs not to open the case and needs no the conventional jumper. Also and, it is not necessary to include a connector with pre-designed layout for isolating the previously original circuit and the rewriting pathway to the flash memory. The displaying function of the LCD monitor can be repeatedly updated and the information about on-screen display.
The present invention provides a LCD monitor control system capable of reprogramming monitor function. The monitor control system utilizes the VGA signal lines for transmitting signals during normal operation. The same VGA signal lines are also used for transmitting erase/record commands to the monitor system and to erase/record data into an external erasable programmable ROM.
The invention provides a device for reprogramming function of a LCD monitor, which includes a set of video graphic adapter (VGA) signal lines for transmitting a plurality of erase/record commands and a plurality of erase/record data. A signal detector is coupled to the VGA signal lines for detecting and re-transmitting the erase/record commands and data. An activation device is coupled to the signal detector, wherein the activation device is normally connected to a video pathway, but as soon as erase/record commands are detected, the activation device is switched to an erase/record pathway so that erase/record commands and data can be re-directed. A read-only-memory (ROM) erase/record command decoder is coupled to the activation device via the erase/record pathway, wherein the decoder translates the erase/record commands into a plurality of erase/read/write signals and translates the erase/record data into a plurality of address signals and a plurality of data signals. A plurality of address signals, a plurality of data signals and a plurality of control signals are coupled to the ROM erase/record command decoder. Consequently, data stored in the external ROM unit can be modified, according to the address, data and erase/read/write signals coming from the command decoder. A mode return device is coupled to the ROM erase/record command decoder and the activation device. Wherein, the reprogramming status of the ROM unit can be determined from the address, data and read/write signals so that the activation device can be triggered to switch over connection from the erase/record pathway to the video pathway as soon as reprogramming is finished.
In the foregoing device, the signal detector further includes an inter-integrated circuit multiple address content comparator circuit, which is coupled to the VGA signal lines for comparing with a plurality of consecutive address sequences in the erase/record data such that a set signal is transmitted when there is a match with a pre-set address sequence. A monitor-in-system programming control flag unit is coupled to the inter-integrated circuit multiple address content comparator circuit for transmitting a start signal after receiving the set signal.
In the foregoing device, the activation device further includes a monitor-in-system reprogramming initialization circuit for producing a select signal after receiving the start signal, as well as an erase/record pathway isolator for switching over connection from the video pathway to the erase/record pathway after receiving the select signal and transmitting the erase/record commands and data via the erase/record pathway.
In the foregoing device, the ROM erase/record command decoder further includes an inter-integrated interface circuit for receiving and translating the erase/record commands and data, as well as an erase/record command decoder for receiving translated erase/record commands and data and outputting address, data and erase/read/write signals.
In the foregoing device, the erase/record command decoder further includes a hidden ROM for holding a program code for erase/record commands; a random access memory (RAM) unit for holding erase/record data; a central processing unit coupled to the hidden ROM, the RAM unit and the inter-integrated interface circuit. Wherein the central processing unit receives the erase/record commands and data passing through the inter-integrated circuit interface circuit and then stores the erase/record data in the RAM unit, while the erase/record commands are decoded by referring to the program code in the hidden ROM and then the decoded commands are re-transmitted. An erase/record control register coupled to the central processing unit for receiving the decoded erase/record commands and converting the erase/record commands into the interface control signals or erase/read/write signals, and converting the erase/record data stored in the RAM unit into address and data signals.
The invention further provides a system for reprogramming the function of a liquid crystal display (LCD) monitor, which comprises an erase/record device for holding and transmitting a plurality of erase/record commands and a plurality of erase/record data. A set of video graphic adapter (VGA) signal lines coupled to the erase/record device for transmitting the erase/record commands and data. And, a LCD monitor controller with a monitor-in-system programming function, wherein the LCD monitor controller is coupled to the VGA signal lines so that the erase/record commands of the erase/record device and data are received from the erase/record device via the VGA signal lines, and then a plurality of address signals, a plurality of data signals, and a plurality of control signals are exported for reprogramming a ROM unit, wherein the ROM unit coupled to the LCD monitor controller via signal lines for transferring the address signals, the data signals and the control signals, so that data stored in the ROM unit can be modified according to the address signals and the control signals, and the data signals coming from the LCD monitor controller.
In the forgoing invention, the LCD monitor controller with monitor-in-system programming function includes a signal detector coupled to the VGA signal lines for detecting and transmitting the erase/record commands and data. An activation device is coupled to the signal detector. Wherein the activation device is normally connected to a video pathway, but as soon as erase/record commands is detected, the activation device is switched to an erase/record pathway so that erase/record commands and data can be re-directed. A ROM erase/record command decoder is coupled to the activation device via the erase/record pathway, wherein the decoder translates the erase/record commands into a plurality or erase/read/write signals and translates the erase/record data into a plurality of address signals and a plurality of data. A mode return device is coupled to the ROM erase/record command decoder and the activation device. Wherein, the reprogramming status of the ROM unit can be determined from the address, data and erase/read/write signals so that the activation device can be triggered to switch over connection from the erase/record pathway to the video pathway as soon as reprogramming is finished.
The invention also provides a method for reprogramming the function of a LCD monitor system. The method includes tapping a plurality of signals from a set of video graphic adapter (VGA) signal lines to perform a plurality of consecutive address sequence comparisons with a pre-set address sequence. A programming mode inside the LCD monitor system is triggered when one of the tapped consecutive address sequences matches that of the pre-set address sequence. An erase/record command is read and it is decided what actions to take as soon as the programming mode is activated. The erase/record data is read and the erase/record data is written into a memory unit when the erase/record command is for a write operation, and then returning to the previous step. When the erase/record command demands a return to a non-programming mode, the process returns back to the very first step.
The invention will become more fully understood from the detailed description given hereinafter and the accompanying drawings which are given by way of illustration only, and thus do not limit the present invention, and wherein:
Referring to
When the function of driving program in the flash ROM 120 is desired to be updated, the updated program and data can be written to the flash ROM 120 without the need of opening the case of the monitor and the jumper for switching. For example, the updated information can be input through the SDA and SCL signal lines. Compared to the prior art, it is unnecessary to open the case of the monitor. In other words, the function update of the monitor can be achieved by just using the original signal lines 18.
Alternatively, the erase/record device can utilize an inter-integrated circuit (IIC) interface circuit platform. To reprogram the function of the monitor, erase/record commands and data are first written into the memory area of the IIC interface circuit platform. The erase/record commands and data are sent in the IIC interface format to the ROM inside the monitor controller 180 directly via the VGA signal lines.
In this embodiment of the invention, the serial data line SDA and the serial clock line SCL of the VGA signal lines are used to transmit erase/record commands and data in the IIC interface format. In practice, any two of the signal lines including SDA, SCL, Hsync and Vsync can be used for transmitting erase/record commands and data in the IIC interface format.
VGA signal lines are connected to the signal detector 300. The signal detector 300 is a device for detecting any erase/record commands and data on the VGA signal lines. Signals are next delivered to the activation device 400.
The activation device 400 has a video pathway and an erase/record pathway. When erase/record commands are detected by the signal detector 300, the erase/record commands and data are re-directed to the ROM erase/record command decoder 500 via the erase/record pathway by the activation device 400. In the normal mode of operation, video signals are re-directed to the image-processing circuits 700 via the video pathway by the activation device 400.
The ROM erase/record command decoder 500 translates the erase/record commands into erase/read/write signals to be used by the ROM unit 120 and the erase/record data are also translated into addresses and data signals. The translated signals are the sent to the ROM unit 120 so that monitor function can be modified.
The ROM erase/record command decoder 500 produces the address signals, the data signals, and the control signals and then exports the signals to an external ROM unit (not shown), which stores a program code and data used for performing displaying function. The external ROM can, for example, be the flash memory or erasable programmable ROM. However, if an updated program is desired, the program code can be erased and reprogrammed according to the address signals, data signals and erase/read/write signals picked up by the ROM unit.
The mode return device 600 is coupled to the ROM erase/record command decoder 500 and the activation device 400. According to address, data and read/write signals feedback from the decoder 500, progress in the reprogramming of ROM 120 can be determined. When the reprogramming is finished, the mode return device 600 signals to the activation device 400 so that connection to the video pathway is re-established.
In the following, elements and operation of each device are described in detail.
The hidden ROM 522 is a device for storing the program code of erase/record commands, and the RAM unit 526 is a device for storing erase/record data. The central processing unit 524 picks up the translated erase/record commands and data from the IIC interface circuit. The erase/record data is stored in the RAM unit 526. The erase/record commands are decoded using the decoding program inside the hidden ROM 522. The decoded erase/record commands are transmitted to an erase/record control register 528 where the commands are converted into ROM interface control signals or erase/read/write signals. The erase/record data stored in the RAM unit 526 is converted into address and data signals by the central processing unit 524.
The erase/record command decoder 520 can also be implemented using a hardware circuit. The erase/record commands picked up from the IIC circuit are divided into different states so that the commands can easily be converted into erase/read/write, address and data signals.
In summary, the invention provides a monitor control system capable of reprogramming the function of a LCD monitor. The monitor control system utilizes the VGA signal lines for signal transmission in normal operation and the same VGA signal lines in the modification of data inside the erasable programmable ROM of a monitor controller in the reprogramming mode. The original cable used by the VGA card can be used to rewrite a program used by the LCD monitor controller without opening the case and no need of the jumper. Also and, the related on-screen display information can also be updated.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
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| Feb 22 2006 | Novatek Microelectronics Corp. | (assignment on the face of the patent) |
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