A method of forming a pre-metal dielectric film having good as deposited gapfill characteristics, as well as good mobile-ion gettering capability. The method involves first depositing a layer of high-ozone undoped silicon dioxide film having a high ozone/teos volume ratio. Then, a low-ozone doped BPSG film is deposited over the high-ozone undoped silicon dioxide layer. The film layers are heat treated to densify the film, and then the top layer is planarized using known planarization techniques to a thickness that allows for adequate mobile-ion gettering.
|
1. A method of forming a dielectric film on a semiconductor substrate comprising:
depositing a first layer of undoped ozone and teos film on a semiconductor substrate having a plurality of polysilicon conductors on a top surface thereof, the first layer of film having an ozone and teos volume ratio that is at least 15 to 1;
depositing a second layer of low ozone doped BPSG film over the first layer of film;
applying a heat treatment to the first and second layers of film; and
planarizing the second layer of film such that the second layer is of a thickness of at least 200 nm over the polysilicon conductors.
8. A method of forming a dielectric film on a semiconductor substrate comprising:
depositing a first layer of undoped ozone and teos film on a semiconductor substrate, the first layer of film having a thickness ranging from 100 nm to 400 nm and wherein the ozone and teos volume ratio of the first film layer is at least 15 to 1;
depositing a second layer of low ozone doped BPSG film over the first layer of film, the second layer of film having a thickness of at least 500 nm, a boron weight percentage ranging from zero to four percent, and a phosphorous weight percentage ranging from four to six percent;
applying a heat treatment to the first and second layers of film; and
planarizing the second layer of film.
17. A method of forming an insulation layer over a pair of polysilicon buses comprising:
depositing a first layer of undoped ozone and teos film on a pair of polysilicon buses, the first layer of film having an ozone and teos volume ratio of at least 15 to 1;
depositing a second layer of low ozone doped BPSG film over the first layer of film, the second layer of film having a thickness of at least 500 nm, a boron weight percentage ranging from zero to four percent, and a phosphorous weight percentage not exceeding six percent;
applying a heat treatment to the first and second layers of film; and
planarizing the second layer of film such that the thickness of the second layer is at least 200 nm over the pair of polysilicon buses.
12. A method of forming a semiconductor device, comprising:
forming a diffusion layer and a polysilicon conductor on a silicon substrate surface,
depositing a first layer of undoped ozone and teos film on the substrate surface, the first layer of film having an ozone/teos volume ratio that ranges from at least 15 to 1 to about 17 to 1, and a thickness ranging from 100 nm to 400 nm;
depositing a second layer of low ozone doped BPSG film over the first layer of film, the second film layer having a thickness of at least 500 nm;
planarizing the second layer of film to a thickness of at least 200 nm above the polysilicon conductor;
forming opening through the first and second film layers to expose a portion of each of the diffusion layer and the polysilicon conductor; and
forming wiring conductors in the first and second film layers, the wiring conductors being electrically connected through the openings to the diffusion layer and to the polysilicon conductor.
2. The method of
4. The method of
5. The method of
6. The method of
7. The method of
9. The method of
10. The method of claim 9 8, wherein the heat treatment is carried out at a temperature of less than 800° C.
11. The method of claim 9 8 wherein the semiconductor substrate has a plurality of polysilicon conductors on a top surface thereof and wherein the second layer of film is planarized to be of a thickness of at least 200 nm above the polysilicon conductors.
13. The method of
14. The method of
15. The method of
16. The method of
|
This invention relates to semiconductor processing and, more particularly, to a method of forming a dielectric film on a semiconductor substrate and to a method of forming a semiconductor device having this dielectric film.
In the formation of semiconductor integrated circuit devices, a frequent practice in the planar process is to form subsurface diffusion layers and polysilicon conductors on a silicon substrate surface. One or more dielectric films are deposited over the silicon substrate surface and metal wiring conductors are formed on or in the dielectric film to interconnect the various components formed on the silicon substrate surface to achieve the desired integrated circuit.
It is desirable that the dielectric films which are deposited on the substrate prior to the metallization process have a good mobile-ion gettering property, as well as a good reflow or gapfill property. A type of insulating film that has been widely used in the prior art is a single layer of borophosphosilicate (BPSG). With reference to
The purpose for using the BPSG film as the interlayer dielectric film is based on a gettering property and on a reflow property. It is important that the dielectric film have good gettering properties as it is desired to be able to getter effectively to remove any impurities that are introduced during the wafer fabrication process. It is also important that the dielectric film have good reflow properties so as to completely fill in the gaps between raised polysilicon conductors on the silicon substrate surface. This quality is sometimes referred to as having good “gapfill” or good “step coverage”.
In the prior art, the BPSG film layer is typically formed by reacting tetra-ethyl-ortho-silicate (TEOS) with ozone (O3) in the presence of phosphine (PH3) and diborane (B2H6). In this document we refer to the ozone and TEOS reactants as “ozone/TEOS” or “ozone and TEOS”. The doped BPSG film has about four to six percent weight of boron and about from four to eight percent weight of phosphorus. The softening point of SiO2 can be reduced to about 875-900° C. by the addition of high quantities of boron and phosphorus as described above. Then, a reflow step is used at high temperatures, such as 875-900° C., to soften the doped glass and to flow it into the seams and gaps in the substrate to form a pre-metal dielectric film with good gapfill qualities. However, it is noted that the heavily doped BPSG film does not have good as-deposited gapfill qualities. It only completely fill the gaps between the polysilicon conductors after it has been reflowed at a temperature higher than its softening point.
However, as device geometries continue to decrease in size, reflow at high temperatures is not desirable due to enhanced diffusion of the n- and p-type dopants that are in the silicon substrate. This diffusion can cause undesirable shifts in the electrical parameter of the device, such as shifts in the threshed voltage and the saturation current. Without the high temperature reflow, however, the heavily-doped BPSG film does not adequately fill in the gaps. The doping materials, boron and phosphorous, lower the softening point of the glass so that is doesn't provide an adequate gapfill at lower temperatures. As shown in
Previous attempts in the prior art to produce an interlevel dielectric film with good gap fill qualities include U.S. Pat. No. 5,518,962 to Murao which discloses a semiconductor device formed at a substrate surface region which is coated with a non-doped CVD silicon oxide film, and an interlayer insulating film formed on the silicon oxide film and composed of a first ozone-TEOS non-doped silicate glass (NSG) film, a layer of BPSG film, and a second ozone-TEOS NSG film. Additionally, U.S. Pat. Nos. 5,869,403 and 5,994,237 to Becker et al. describe a semiconductor processing method of forming a contact opening to a substrate adjacent to a substrate contact area to which electrical connection is to be made. In the preferred embodiment, a first oxide layer, formed from the decomposition of TEOS, is formed over the substrate to cover at least a part of the contact area, and a second oxide layer made of BPSG is formed over the first oxide layer. Also, U.S. Pat. Nos. 5,166,101 and 5,354,387 to Lee et al. discloses a composite BPSG insulating and planarizing layer which is formed over stepped surfaces of a semiconductor wafer by a two-step process. The two step deposition process comprises a first step to form a void-free BPSG layer by a CVD deposition using gaseous sources of phosphorous and boron dopants and TEOS as the source of silicon, and then a second step to form a capping layer of BPSG.
It is an object of the present invention to provide a method of forming a pre-metal interlevel dielectric film that is characterized by good mobile-ion gettering capability and by good gapfill characteristics.
It is a further object of the invention to provide a method of forming a pre-metal interlevel dielectric film which displays good as-deposited gapfill characteristics which are not dependent on a high temperature reflow process.
The above objects have been achieved by a method of forming a pre-metal dielectric film having good as-deposited gapfill characteristics, as well as good gettering capability. The method involves first depositing a layer of high-ozone undoped silicon dioxide film that provides the void-free gapfill characteristic and then depositing a low-ozone doped BPSG film that provides the gettering capability. This two layer insulating film provides the ability to have the gaps adequately filled between small or narrow lines without sacrificing good mobile-ion gettering properties. Prior art insulating films tend to provide either good gapfill or good gettering but not both, or the prior art films require several layers to achieve the desired properties.
The undoped silicon dioxide film has a high ozone/TEOS volume ratio of at least 15 to 1, as compared to the prior art doped BPSG film which generally have lower ozone/TEOS ratios, such as 10 to 1. By forming a film with a high ozone/TEOS ratio, the surface mobility of the TEOS-dimer is increased, causing the film to have better flow characteristics. The reactants can diffuse readily on the surface, thus finding the regions having the lowest energy. This results in a void-free dielectric film surface.
A heat treatment is then applied to densify the film, rather than to soften and flow the film as is done in the prior art. This allows the best treatment to be conducted at a lower temperature, which prevents the diffusion problems described above that are associated with high temperature heat treatment in smaller device geometries. Finally, the top of the second BPSG layer is planarized using chemical mechanical planarization. The method of the present invention can be used in the formation of semiconductor devices and can be also used in the formation of other structures requiring a good gapfill or step coverage, such as the formation of polysilicon bus structures.
With reference to
With reference to
With reference to
Then the substrate 12 having the two layers 20 and 30 formed on the top undergoes a heat treatment at a temperature not exceeding 850° C. Ideally, the temperature of the heat treatment would be approximately 700° C. in order to be high enough to provide adequate reflow, but low enough to not affect the device characteristics when the device has a smaller device geometry. As discussed above, since the dielectric film, consisting of the layer of silicon dioxide 20 and the layer of BPSG 30, has good as-deposited gapfill characteristics, the film doe not need to annealed at a high temperature. The annealing is done to densify the film, rather than to soften and flow the film. In the present invention, the annealing is done at a temperature between 700° C. and 800° C. to obtain a sufficiently dense pre-metal dielectric film necessary for manufacturable contact etch profile and etch rate.
With reference to
Kelkar, Amit S., Whiteman, Michael D.
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
5166101, | Sep 28 1989 | Applied Materials, Inc. | Method for forming a boron phosphorus silicate glass composite layer on a semiconductor wafer |
5271972, | Aug 17 1992 | FLEET NATIONAL BANK, AS AGENT | Method for depositing ozone/TEOS silicon oxide films of reduced surface sensitivity |
5314845, | Sep 28 1989 | APPLIED MATERIALS, INC , A CORP OF DE | Two step process for forming void-free oxide layer over stepped surface of semiconductor wafer |
5332694, | Feb 26 1992 | NEC Electronics Corporation | Process for manufacturing a semiconductor device |
5354387, | Nov 13 1989 | Applied Materials, Inc. | Boron phosphorus silicate glass composite layer on semiconductor wafer |
5491108, | Jun 08 1993 | NEC Corporation | Method of producing semiconductor integrated circuit device having interplayer insulating film covering substrate |
5518962, | Nov 26 1992 | NEC Electronics Corporation | Planarized interlayer insulating film formed of stacked BPSG film and ozone-teos NSG film in semiconductor device and method for forming the same |
5607880, | Apr 28 1992 | NEC Corporation | Method of fabricating multilevel interconnections in a semiconductor integrated circuit |
5869403, | Mar 14 1997 | U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT | Semiconductor processing methods of forming a contact opening to a semiconductor substrate |
5994237, | Mar 14 1997 | U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT | Semiconductor processing methods of forming a contact opening to a semiconductor substrate |
6013584, | Feb 19 1997 | Applied Materials, Inc.; Applied Materials, Inc | Methods and apparatus for forming HDP-CVD PSG film used for advanced pre-metal dielectric layer applications |
6090675, | Apr 02 1999 | Taiwan Semiconductor Manufacturing Company | Formation of dielectric layer employing high ozone:tetraethyl-ortho-silicate ratios during chemical vapor deposition |
6091121, | Nov 12 1997 | NEC Electronics Corporation | Semiconductor device and method for manufacturing the same |
6218268, | May 05 1998 | International Business Machines Corporation | Two-step borophosphosilicate glass deposition process and related devices and apparatus |
6294483, | May 09 2000 | Taiwan Semiconductor Manufacturing Company | Method for preventing delamination of APCVD BPSG films |
6352943, | May 20 1998 | Semiconductor Process Laboratory Co., Ltd. | Method of film formation and method for manufacturing semiconductor device |
EP435161, | |||
EP939433, | |||
WO9953729, |
Date | Maintenance Fee Events |
Dec 24 2008 | ASPN: Payor Number Assigned. |
Jun 03 2010 | M1552: Payment of Maintenance Fee, 8th Year, Large Entity. |
May 07 2014 | M1553: Payment of Maintenance Fee, 12th Year, Large Entity. |
Date | Maintenance Schedule |
Sep 16 2011 | 4 years fee payment window open |
Mar 16 2012 | 6 months grace period start (w surcharge) |
Sep 16 2012 | patent expiry (for year 4) |
Sep 16 2014 | 2 years to revive unintentionally abandoned end. (for year 4) |
Sep 16 2015 | 8 years fee payment window open |
Mar 16 2016 | 6 months grace period start (w surcharge) |
Sep 16 2016 | patent expiry (for year 8) |
Sep 16 2018 | 2 years to revive unintentionally abandoned end. (for year 8) |
Sep 16 2019 | 12 years fee payment window open |
Mar 16 2020 | 6 months grace period start (w surcharge) |
Sep 16 2020 | patent expiry (for year 12) |
Sep 16 2022 | 2 years to revive unintentionally abandoned end. (for year 12) |