Sound recording and reproduction system for model train using integrated digital command control

Abstract

A system is provided for recording, storing and reproducing sound for playing back in an environment requiring simulated sounds, voices, and/or sound effects. Sounds are recorded on a chip and played back in an asynchronous manner from the chip as a result of activation of a switch or inertial movement within the system. A Hall-effect sensor, reed switch or momentary switch or the like may be implemented for enabling activation of the recorded sound from the chip for broadcasting. A compander compresses the sound on the chip and expands the compressed sound for playback. Employing the above system for audio storage, a sound, motor and special effects controller may be created for model train applications as well. The different functions of the sound unit are controlled through a discrete bi-polar digital command control signal using a unique address for each unit. A synchronous means of play back may also be employed when the system is used with the bi-polar signal using a sensor. In addition to the analog sound storage, the same concepts and ideas may be applied to a digital sound recording and play back device as well.

Description

RELATED APPLICATION DATA

input 38 may be connected as an input for recording of sounds on the chip 14. Alternatively, the DAST™ chip 14 is provided with a built-in microphone for recording of sounds thereon.

The present invention will be described with reference to a livestock sound module used with a model railroad car which plays pre-recorded messages when activated, although it should be understood that any environment requiring playback of sound may implement the sound reproducing and recording system of the present invention. Up to six basic components or sections may be implemented to perform the features embodied by the principles of the present invention.

The first section is the power supply previously described. The power supply when used with a model railroad car may run off of track voltage wherein the power is input to a full-wave bridge rectifier and a capacitor acting as a filter. The output is then connected to a voltage regulator. The nine volt DC input from, for example, a nine volt DC battery, is tied in at a node through a diode. If a nine volt battery is used in conjunction with the track power, the battery acts as a low voltage backup keeping the module voltage up when the track voltage drops off or shuts off. Power is switched to the module via the SPST switch.

The second section of the present invention is the DAST™ analog sound effects chip and audio expander. The DAST™ analog sound effects chip is capable of storing between twelve seconds and 120 seconds of analog data in a non-volatile analog memory. Various audio messages can be programmed into the sound effects chip. The library messages are stored on, in a preferred embodiment, a digital audio tape audiotape. When the messages are programmed, the analog audio signal is played back at a pre-recorded level and sent through a compressor. A compander is used in the present invention which reduces the dynamic range of the signal before it is recorded into the chip. When the sound effects are played back from the chip, they are played back through an audio expander. The expansion does two things: the audio is expanded and the signal is restored to its original dynamic range; and when the audio is expanded, low-level audio noise in the system is attenuated giving an improved signal-to-noise ratio.

The third section of the circuit is the audio amplifier. In a preferred embodiment, the amplifier is an LM386N-1. The output of the audio amplifier is capacitively coupled to a volume potentiometer. The wiper of the potentiometer is the input of the amplifier. The output of the amplifier is capacitively coupled and connected to a speaker.

The fourth section of the circuit is the message activation or chip enabling section of the circuit. Pin 23 of the sound effects chip is the chip enable. Chip enable is an active low signal, and the pin is pulled high with a resistor and a decoupling capacitor in parallel. The configuration of the device initiates the message inside the chip to be played by pulling of the pin to ground. The message plays once unless the pin is held low. If held low, the message continues to repeat until the pin is allowed to get pulled to high.

The pin can be activated several ways as previously set forth. A Hall-effect sensor below a suspended magnet may be implemented in a preferred embodiment. When a train car travels along or is jarred on a track, the change in the magnetic field from the magnet swaying causes the Hall-effect sensor to activate and give a momentary pull to ground thereby initiating the chip. Therefore, the present invention is activated by inertia-sensitive control.

The fifth section of the present invention is the option of recording custom messages. The chip has a built-in microphone amplifier that can be used to record audio data. This is controlled by the state of the playback/record pin. When held low, the chip is then put into record mode and will record audio as long as the chip enable is held low. Alternatively, an external microphone may be implemented for recording on the chip.

Referring to FIG. 6, two microphone inputs to the ISD device, MIC (pin 17) and MIC REF (pin 18) are illustrated. The two pins are differential inputs to an on-chip microphone preamplifier. A non-biased microphone can be connected directly across the two inputs. A 470 kOhm resistor, connected parallel to a 4.7 MF capacitor is placed across the automatic gain control AGC input (pin 19). These two components set up the attack and release time constant for the internal AGC circuit inside the chip. The AGC circuit controls the gain of the microphone preamplifier built inside the chip.

To record a new message on the chip, two pins on the chip are controlled, /Chip Enable and Playback/Record. /Chip Enable controls the start of both the record and play cycles. The level of the Playback/Record pin will determine whether a new message is to be recorded or the saved message played back. Pin 27 (P/R) is normally held high and messages play back as long as chip enable (/CE pin 23) is held low. If P/R is pulled to ground and then /CE is pulled low, the chip is then automatically placed into record mode and records the analog signals in real time picked up by the microphone. Recording stops when /CE is brought high. As previously mentioned, by controlling the address or logic level, the location of the new message can be controlled such that it will not record over previous audio.

Due to the limited space available within model train locomotives and cars, the present configuration uses two narrow elongated printed circuit boards (PCB's) stacked upon each other on which the electronic components are mounted in this embodiment. The circuit boards are electrically interconnected by means of a multi-pin plug on the upper PCB and a mating socket on the lower PCB.

FIG. 7 illustrates in schematic form the components mounted on the upper PCB. The micro-controller, IC1 section 101 contains and executes the software program required for this invention. The present configuration of this invention uses a Part No. Z86E08-08PSC from Zilog, Inc., Campbell Calif., IC1 Section 101. The other components mounted on the upper PCB are the micro-controller oscillator section 102, IC2 section 103, a Part No. 93C56A serial electronically erasable read only memory from National Semiconductor, Inc., Santa Clara, Calif.; the function #0 and #1 output transistors and connector section 106; the motor drive transistors and filter network section 107; the DCC digital input signal conditioning components section 108; the power supply section 109; the electrical plug to the lower PCB section 110; a shift register section 111; and a Hall effect sensor section 112.

FIGS. 8A-8C illustrates in schematic form the components mounted on the lower PCB in the present configuration. The direct analog storage DAST™, integrated circuit, IC5, and associated decoupling capacitors section 201. The present configuration of this invention uses a Part No. ISD1020A for IC5 from Information Storage Devices, Inc., San Jose, Calif. The other components mounted on the lower PCB are the mating socket to the upper PCB section 203; an audio computer circuit section 204; an audio amplifier circuit with volume control section 205; and a Power Down/Reset Circuit section 206.

Referring now to FIGS. 7A-7C, operation of the upper PCB of the present invention will be described. A bi-polar digital signal of sufficient voltage and current is attached to J2 section 109 and the jumpers on J4 section 108 and J5 section 108 are placed between pins 2 and 3 on each. In this configuration, the power source is also the digital signal; a common example being “DCC”, a protocol of the National Model Railroading Association (NMRA). This is the configuration used when the present invention is installed in a model railroad locomotive or car as J2 section 109 may be wired to the track using mechanical electrical pickups on the wheels.

An alternate configuration uses a separate power source between 14 to 24 volts AC or DC which is connected to J2 section 109 on the upper PCB, and the jumpers set on J4 section 108 and J5 section 108 are placed between pins 1 and 2 on each while a bi-polar digital signal is attached to J3 section 108.

In either configuration, the unregulated AC, DC, or bi-polar DC power source passes through fuses F1 and F2 section 109. These fuses protect both legs of the power source and, to some degree, protect from shorts, overloads, or other faults involving the present invention or associated field wiring. The power source is then passed through a bridge rectifier (BR1) section 109 to two voltage regulators, VR1 (MC7812CT) 109 and VR2 (MC7805CT) section 109 to associated filter and decoupling capacitors. A heat sink is attached to VR1 and VR2 section 109.

The result is three power supply potentials consisting of a “V+” unregulated output for sourcing the special effects outputs and motor control. a A regulated “+12 vdc” powers the audio amplifier circuitry, and a regulated “+5 vdc” to power the logic circuitry.

The digital signal whether input through J3 section 108 or J2 section 109 is half-wave rectified by D1 section 108, current limited by R3108, and is annunciated by LED 1 section 108. It then enters a Schmitt trigger opto1 opto-isolator, (OPTO) (OPTO1) section 108. The opto-isolator provides a safety layer of isolation between the signals input and field wiring in the model setting. The Schmitt trigger aspect protects from data errors due to low level low-level digital noise. The digital signal exits the opto-isolator in an inverted state and enters a micro-controller (IC1) through the Input No. 2 line section 101.

The micro-controller's speed is set by a Crystal (XTAL 1) section 102 and an on board on-board oscillator.

There are several output lines associated with the micro-controller section 101. Two of the lines, output 10 and output 9, are connected to the gates of driver MOSFET transistors, Q1 and Q2 section 106, which are open drain, active low auxiliary outputs; function No. 0 and function No. 1 (F0 and F1) section 106. The transistors have current limiting resistors R1 and R2 section 106 connected to the drain-source path, in series with the load. The current limiting resistors' values are selected according to the load(s). In a typical model railroading application, Q1 is connected to a flashing LED beacon or similar device and is controlled as F1. Q2 is connected to the locomotive headlight and is controlled as F0. The use of F0 as head lamp control is based upon the NMRA DCC standard; however the function outputs can be re-configured for different loads and control assignments.

Output lines 1-4 section 105 are connected to the gates of driver MOSFET transistors, Q3-Q6 arranged in an H-bridge configuration section 107 for pulse width modulated bi-directional control of a DC motor. A controllable filter network is connected across the DC motor for the modification of motor drive wave shapes for the suppression of undesirable audible noise section 107.

Output lines 5-8 section 104 are connected to the serial EEPROM section 103 and a shift register section 111. The serial EEPROM contains many memory registers which contain information that is used to define various operating characteristics of the invention. Most of these registers are defined by the NMRA and are termed Configuration Variables (CV or CV's). Some of the registers are set aside for application specific uses defined by the manufacturer. Most of the CV's can be altered by the hobbyist through programming. The digital address of the sound effect to be played is loaded by the micro-controller into the shift register section 111.

Output line 11 and input line 3 on the micro-controller section 101 are connected to the multi-pin plug section 110 which routes signals to the lower PCB.

Now refer to FIG. 8 to understand the operation of the lower PCB of the present invention.

The DAST™ chip (sound effect chip), IC5 section 201 is the first section of the circuit component on the lower PCB. The DAST™ chip is capable of storing between twelve seconds and 120 seconds of analog data in a non-volatile memory. Various audio sound effects can be programmed into the DAST™ chip. The location of the various sound effects in the DAST™ chip are assigned by setting the appropriate bits on the DAST™ chip's address inputs. At the time of recording, these address locations may be set by some type of development system. During playback, the address locations are set by the micro-controller IC1 section 101.

When the sound effects are played back from the chip as set by the microcontroller IC1 section 101, they are played back through an audio compander section 204. The expansion docs two things: the audio is expanded and the signal is restored to its original dynamic range; and when the audio is expanded, low-level audio noise in the system is attenuated giving an improved signal-to-noise ratio.

The third section of the circuit is the audio amplifier. In a preferred embodiment, the amplifier is an LM386N (IC4) section 205. The output of the audio expander is capacitively coupled to a volume potentiometer. The wiper of the potentiometer is the input of the amplifier. The output of the amplifier is capacitively coupled and connected to a potentiometer.

The fourth section of the circuit is the sound effect activation or chip enabling section of the circuit. One pin of the DAST™ integrated circuit (IC5) section 201 is the chip enable. Chip enable (/ce) is an active low signal, and the pin is pulled high with a resistor. Chip enable is connected with output line 11 on the micro-controller. Sound effect playback is initiated by loading the appropriate address bits into the shift register section 111 on the upper PCB and then bringing chip enable low. Typically, for playback of a single sound effect, /ce is brought high after sound effect playback begins. If playback of consecutive sound effects is desired, /ce is left low. At the end of each sound effect, a signal is generated on another pin of the DAST™ chip (IC5) called End of Message (/com) (active low). /com is connected to input line No. 3 of the micro-controller section 101 through socket J7 section 203 and J1 section 110. If it is desired to repeat a sound effect, either with spaced repetition or with seamless looping, /eom is monitored to mark the end of the current sound effect being played allowing the micro-controller to precisely control repetition or looping.

PNP transistors Q3 and Q4 section 206 have their bases connected to A6 and A7, respectively, and their collectors are tied to ground. The open emitters of Q3 and Q4 are connected to a pin of the DAST™ chip (IC5) section 201 which is labeled Power Down, an active high input. Power Down is connected to a pull up resistor (R14) section 206 and a decoupling capacitor (C18) section 206. When A6 and A7 are both high, Power Down goes high and the DAST™ chip (IC5) is taken into a standby state and reset. This is useful if the DAST™ chip (IC5) should ever become errant in operation or if it is desirable to interrupt a sound effect being played before it has reached completion.

Now refer to FIGS. 9A-9C in order to understand the operation of the lower PCB of the present invention in an alternate configuration, to play back multiple sounds without using additional DAST™ memories for sound on sound.

A digital synthesizer integrated circuit IC6 in section 301 is now used for the production of sound effects. The present invention uses a Part No. YM3812 sound generator from Yamaha Systems Technology; San Jose, Calif. for IC6 section 301. Sound effects are created by alternately loading address and data information into lines D1-D8 on IC6 section 301. The alternating action is controlled by a flip-flop section 306. A digital to analog converter (DAC) section 304 is used to change the digital outputs of IC6 section 301 into varying voltages, which are the sounds. In the present invention, a Part No. YM3014 from Yamaha Systems Technology, San Jose, Calif. is used for the DAC. The output of the DAC feeds into a unity gain buffer section 305. The output of the buffer feeds into a low pass filter section 307 before reaching the volume control potentiometer R11 which is part of the audio amplifier circuit section 305. In the present configuration, the amplifier is an LM386N (IC4) section 305 from National Semiconductor, Inc., Santa Clara, Calif. The wiper of the potentiometer is in input of the amplifier. The output of the amplifier is capacitively coupled and connected to a speaker.

Now a detailed explanation of the software operation will be given. Refer now, additionally, to FIGS. 11-20.

Beginning at <START> section 501, the micro-controller section 101 is initialized in section 502. The appropriate lines are configured as either input or output. Initial values are loaded into specified registers of the micro-controller section 101. One important value is the address which is loaded section 503 from the serial EEPROM section 103. The address determines which data transmissions are intended for the device to act upon. Input line No. 2 on the micro-controller section 101 then begins to receive transmitted data from the components in section 108. The present invention is configured to accept data transmissions based upon a digital protocol “Digital Command Control” DCC; a standard established and maintained by the National Model Railroad Association, Chattanooga, Tenn.

Refer now additionally to FIG. 10 to understand the form of the digital data transmissions. DCC data consists of bi-polar transmissions of square wave pulses each containing two equal parts: one positive and one negative. The width or duration of the pulse determines if it will be interpreted as a digital “0” bit or a digital “1” bit. A digital “1” bit in a DCC transmission has a nominal duration of 58 microseconds for each of its two parts, section 402. A digital “0” bit in a DCC transmission will have a nominal duration of 100 microseconds for each of its two parts, section 403. A complete DCC transmission can contain a varied number of bytes and is termed a packet. The one chosen for example here is a DCC baseline packet section 401. A baseline packet contains four separate components, which are the preamble section 404, the address byte section 406, the instruction data byte section 408, and the error byte section 410.

Refer alternately to FIGS. 10 and 11 wherein section 504 of the software looks at the preamble part section 404 of the DCC transmission. It is distinguished as a minimum of 10 “1” bits followed by a “0” bit section 405. Once reception of the preamble is completed, the software will begin to receive the rest of the bytes in section 505. Next is the address byte section 406 which contains eight bits which can have a value of either “1” or “0” and is terminated by a digital “0” bit section 407. Next comes the instruction byte section 408 which also contains eight bits and is terminated by a “0” bit as well as section 409. The last byte in a baseline packet is the error byte section 410 which contains eight bits and is terminated by a “1” bit section 411. The “1” bit also signifies the termination of the packet.

Once a complete packet is received, the software then checks the validity of the data by performing an error check in section 506. The error check requires that the Exclusive-Or logical function be performed upon the address byte and the data byte. If the result of this operation matches the value of the error byte, the packet is valid. If the packet is rejected as invalid, the software loops back to section 504 to await the next preamble.

If the data is deemed valid, it is first checked in section 507 to see if this was a baseline idle packet. Idle packets are part of the DCC standard and are often used for time delays. If an idle packet is detected, the software loops back to section 504 to begin receiving the next preamble, as no further action is required.

If the packet was found not to be an idle packet, several tests are performed to determine what action is to be taken based upon the data. In each case, a failed test causes a branch to the next test.

Beginning with test section 508, if it is determined, this data is intended for any and all devices receiving the data; or as termed by the DCC standard, a broadcast command. If it is, a branch is taken at section 515. At the completion of the branch, the software is at section 521 of FIG. 12. The broadcast command data is tested to see if an emergency stop command has been issued at section 522. If an emergency stop command is detected, the appropriate actions are taken to effect affect an emergency stop of the model train locomotive section 523. The software then branches at section 524 back to FIG. 11 at section 514 to begin receiving a new preamble. If the broadcast command is not an emergency stop command, it is then tested to see if the present invention should be reset at section 525, termed a decoder reset by the DCC standard. If a decoder reset command has been received, the decoder is reset in section 526. The software then branches at section 527 back to FIG. 11 at section 514 to begin receiving a new preamble. If the broadcast command is not a decoder reset command, then it may be a future command which may be handled in section 528 with the appropriate action being taken. The software then branches at section 529 back to FIG. 11 at section 514 to begin receiving a new preamble.

Referring now to FIG. 11 at section 509, if the received data is not a broadcast command, it tests to see if it is a utility instruction for the decoder or consists of an instruction for the grouping of model train locomotives. If it is, a branch is taken at section 516 to FIG. 13 at section 530. The data is tested in section 531 if a decoder instruction is intended. If it is, the specific decoder instruction is executed in FIG. 13 at section 532. The software is then branched at section 533 back to FIG. 11 at section 514 to begin receiving a new preamble. If the data is not a decoder instruction (FIG. 13, section 534 531), it may be a consist instruction. If it is, several possible actions can be taken in FIG. 13 at section 535 to allow two or more model train locomotives to be grouped together and function in actual operation as one. Once the consist instruction has been completed, or if the data does not contain a consist instruction, a branch is taken at section 536 or section 537 back to FIG. 11 at section 514 to begin receiving a new preamble.

Now referring to FIG. 11 at section 510, if the received data is not a decoder or consist instruction, it is tested to see if it contains advanced operations information. If it does, a branch is taken at section 517 to FIG. 14 at section 538. In section 539, the address information contained within the received data is compared to the pre-programmed address of the present invention. If the addresses do not match, it would be known that the information was intended for some other device. The software then branches at section 540 back to FIG. 11 at section 514 to begin receiving a new preamble. If the addresses match, it is known that the information contained within the advanced operations packet is intended for this device. Advanced operations is the means by which the DCC transmits speed data and direction when 128 step speed resolution is in place. Speed resolution may be explained as the maximum speed divided by the number of speed steps. If a model train locomotive has a maximum scale speed of 64 MPH and 128 step speed resolution is in place, each speed step is equal to a ½ MPH increment. This is considered fine resolution. The speed and direction information is extracted from the data in sections 541 and 542, respectively. There are several sound effects to cover the operational speed range of a model train locomotive, whether steam or diesel type. This allows the sounds generated to closely correlate with the speed at which a model train locomotive is traveling for realistic operation. In some cases, there may not be sufficient sound effects to provide for a 1-to-1 ratio between speed steps and sound effects. The end user is then able to program certain configuration variable memory registers defined by the manufacturer and contained within the serial EEPROM FIGS. 7A-7C at section 103. These configuration variables then determine when a change is made from one sound effect to another over the span of a given speed step resolution. These change divisions are termed break points and are set based upon 128 speed step resolutions in section 543 of FIG. 14. The software then branches to section 544 of FIG. 14 to FIG. 19 at section 578. Further detail is offered later on FIG. 19.

Moving back to FIG. 11 at section 511, if the received data does not contain advanced operations information, it is tested to see if it is a baseline packet. If it is, the software branches at section 518 to FIG. 16 at section 550. In section 551, the address information contained within the received data is compared to the pre-programmed address of the present invention. If the addresses do not match, it is then known that the information was intended for some other device. The software then branches to section 522 back to FIG. 11 at section 514 to begin receiving a new preamble. If the addresses match, it is known that the information contained within the baseline packet is intended for this device. The baseline speed and direction information is extracted from the data in sections 553 and 554, respectively. The baseline packet can contain speed information in either 28 step medium or a 14 step coarse resolution. A configuration variable is checked to see which resolution is currently being used in section 555. If it is determined that a 28 speed step resolution is in effect at section 556, then the break points are set based upon 28 speed step resolution and the configuration variables reserved for break points at section 559. If it is determined that 14 speed step resolution is in effect, baseline head lamp headlamp data is extracted at section 557. Then, the break points are set based upon a 14 speed step resolution, and the configuration variables are reserved for break points at section 558. After the break points are set for either 14 or 28 speed steps, the software then branches at section 560 to FIG. 19 at section 578. Further detail will be offered later on FIG. 19.

Referring now back to FIG. 11 at section 512, if the received data is not baseline packet, it is tested to see if it is a Function Group #1 Packet. If it is, the software branches at section 519 to FIG. 17 at section 561. In section 562, the address information contained within the received data is compared to the pre-programmed address of the present invention. If the addresses do not match, it would be known that the information was intended for some other device. The software then branches at section 563 back to FIG. 11 at section 514 to begin receiving a new preamble. If the addresses match, it is known that the information contained within the function Group #1 is intended for this device. The function Group #1 F0-F4 data is extracted in section 564. The data is then tested in section 565 to see if function #1 should be on or if it should be off. If function #1 should be on, it is turned on in section 567. If function #1 should be off, it is turned off in section 566. Referring now to FIG. 7, when function #1 should be on, output line #10 on the micro-controller section 101 is brought to a digital “1” state. Output line #10 is connected to the gate of MOSFET transistor Q1 in section 106. If an external device is connected across pins 3 and 4 of J6, current flows through the external device, current limiting resistor R1, and MOSFET transistor Q1; hence, the device is on. When function #1 should be off, output line #10 on the micro-controller section 101 is brought to a digital “0” state. Current ceases flowing through the external device, current limiting resistor R1, and MOSFET transistor Q1; hence, the device is off. Q1, R1, and J6 are in section 106.

Referring back to FIG. 17, the next aspect of software deals with function #0. Function #0 is typically used to control a model train locomotive headlight. A configuration variable is checked to see if baseline operation is in effect in section 568. If it is, the previously extracted baseline head lamp headlamp data at 557 is used at section 569 to determine at section 570 if function #0 should be On on at section 571 or off at section 572. Referring now to FIG. 7, when function #0 should be on output line #9 on the micro-controller section 101 is brought to a digital “1” state. Output line #9 is connected to the gate of MOSFET transistor Q2 in section 106. If an external device is connected across pins 1 and 2 of J6, current flows through the external device, current limiting resistor R2, and MOSFET transistor Q2; hence, the device is on. When function #0 should be off, output line #9 on the micro-controller section 101 is brought to a digital “0” state. Current ceases flowing through the external device, current limiting resistor R2, and MOSFET transistor Q2; hence, the device is off. Q2, R2, and J6 are in section 106. Referring back to FIG. 17, after the state of function #0 is set in sections 568-576, the software then branches at section 577 to FIG. 19 at section 578.

Referring now to FIG. 19, at this point all of the data required to select a model train locomotive sound effect should have been received and processed. In section 579, an appropriate engine sound or other sound effect is loaded based upon the previously set breakpoints and received speed. In the case of a model train diesel locomotive, it is appropriate to imply that if a slow speed has been received, then an engine sound effect of a diesel generator at slow rpm's is selected. Conversely, if a fast speed has been received, an engine sound effect of a diesel generator at high rpm's is selected. If the present invention is used with a model train steam locomotive, varying speed discrete chuff sound effects are selected. If a model train diesel locomotive is stopped, an ultra-low RPM idle sound effect is selected. If a model train steam locomotive is stopped, a gentle hissing sound is selected. If, at this point, all of the data required to select a model train locomotive sound effect has not been received and processed, a default sound effect is selected. In the case of a model train diesel locomotive, an air release sound effect is selected. In the case of a model train steam locomotive, a steam release sound effect is selected.

Once an engine speed sound effect has been selected, it is compared with the previously selected engine speed sound effect section 580. If the most recently selected sound effect is a higher and faster sound effect, a transitional acceleration sound effect is selected first at section 581. The status of function #4 mute, from the previously received function group #1 is now checked at 582. If function #4 is active, the selected engine speed or acceleration sound effect is loaded at 583. If function #4 mute is inactive, the software continues without loading an engine speed or acceleration sound effect. Whether or not a speed or acceleration sound effect is loaded, the software continues forward to see if higher priority sound effects should be played. Next, function #3 from function group #1 is now checked at section 584. If function #3 is active, the bell sound effect is loaded at section 585. If function #3 is inactive, the software will continue without loading the bell sound effect. Next, function #2 from function group #1 is now checked at section 586. If function #2 is active, a further test is conducted to see if this is the first time function #2 has been found to be active at section 587. If this is the first time function #2 is found to be active, the first horn or whistle sound effect is loaded for model train diesel or steam locomotives, respectively, at section 589. If the second time function #2 is found to be active, the second horn or whistle sound effect is loaded for model train diesel or steam locomotives, respectively, at section 588. Through concatenation, the model train enthusiast can create realistic horn and whistle cadences. A test is now performed to see if a steam engine speed effect has been loaded at section 590. If it is not, the last loaded sound effect is now played at section 592. If no sound effects have been loaded, no sound effects are played. This would indicate that functions #2, #3, and #4 are inactive thereby preventing the loading of the horn, whistle, bell, and engine speed sound effects, respectively. If the loaded sound effect is found to be a steam engine speed sound effect in section 590, a further test is performed to see if a Hall-effect wheel sync device in FIGS. 7A-7C at section 112 is in place at section 591. If it is not, the steam engine speed sound effect is played at section 592. If a sync device is in place, the steam engine speed sound effect is played upon the receipt of a sync pulse. If, however, more than one function is active and loaded for play-back, then more than one sound effect generating integrated circuit can be used in order to play multiple sounds at one time. After playing any loaded sound effect or effects, the software then branches to section 594.

Referring now to FIG. 20 at section 601 where the control of the model train locomotive motor begins, model train locomotives typically contain a multi-pole, permanent magnet, low-voltage motor. In the case of the present invention, pulse width modulation is used to vary the speed and direction of the motor. The previously received speed and direction data is now loaded at section 602. There are several configuration variables which can influence motor characteristics. Some examples of these control variables, but not limited to, can include acceleration, deceleration, start voltages, motor response curves and noise snubbing. These control variables allow an end user to tailor a model locomotive's motor operation characteristics to personal preferences often enhancing the operation of the device. These configuration variables are loaded at section 603. The loaded speed and direction data are now modified with data from the configuration variables at section 604.

Referring now to FIGS. 7A-7C at section 107, MOSFET transistors Q3, Q4, Q5, and Q6 have their gates connected to the micro-controller at section 101 output lines 1-4 at section 105, respectively. If output lines 1 and 2 are brought to a digital “1” state and output lines 3 and 4 are at a digital “0” state, current flows through transistors Q3 and Q4 causing the motor to turn at a speed in proportion to the amount of time that the transistors are switched on. Full speed indicates that the transistors are switched on all the time. If output lines 3 and 4 are brought to a digital “1” state and output lines 1 and 2 are at a digital “0” state, current flows through transistors Q5 and Q6 causing the motor to turn at a speed in proportion to the amount of time that the transistors are switched on in the opposite direction. The controllable filter network helps reduce physical vibrations created in the motor armatures due to the sharp rise time of the pulses. Referring back to FIG. 20, the motor control aspects are contained within section 605. The software branches at section 606 back to FIG. 11 at section 514 to begin receiving a new preamble.

Referring now to FIG. 18 at section 595, this is the entry point for an interrupt routine 596. As the word interrupt implies, there is not a particular branch to this routine. Whenever a sound effect nears the end of playback, a signal is generated. This signal triggers an interrupt and causes an immediate branch to this routine. This signal is then monitored at section 597 until the sound effect has completed playback. Once completed, the sound effect is checked to see if it should be repeated or looped at section 598. If it should be looped, the sound effect is replayed at section 599. Once the sound effect is replayed or allowed to lapse, the software then returns to the point of the original branch at section 600.

Referring now to FIG. 11 at section 513, numerous configuration variables are contained within the present invention. Examples of the configuration variable include programmable device address, volume settings, breakpoints and motor characteristics such as acceleration, deceleration and speed tables. Many of these CV's are defined by the NMRA standards. Others are reserved for uses defined and specified by individual manufacturers. Configuration variables are pre-programmed by the manufacturers with values which would be acceptable to many end users. However, some model train enthusiasts may desire to alter some or all of these configuration variables to enhance operation based upon unique installations. Section 513 checks to see if a received data packet is intended to alter configuration variables. If it is, a branch at section 520 is taken to FIG. 15 at section 545. In section 546, the configuration variable address is extracted. In section 547, the configuration variable data is written. In section 548, an acknowledgment is issued. An acknowledgment may consist of a motor lurch, a light flash or both. The acknowledgment gives the end user an indication that the programming has been accomplished. The software branches at section 549 back to FIG. 11 at section 514 to begin receiving a new preamble.

It should be understood that various changes and modifications to the presently preferred embodiments described herein will be apparent to those skilled in the art. Such changes and modifications may be made without departing from the spirit and scope of the present invention and without diminishing its attendant advantages. It is, therefore, intended that such changes and modifications be covered by the appended claims.

Claims

1. A sound reproducing system for a model train traveling on a plurality of rails that uses a amplified digital control signal for propulsion and control, the system comprising:

a sound memory storing a plurality of sound effects at predetermined addresses;

a controller connected to the sound memory for recalling the sound effects of either one or a plurality of sound effects in a predetermined sequence or a random sequence;

a sound memory containing multiple samples that emulate a model locomotive at various speeds and work loads;

an integrated sound, motor and special effects controller controlled by a bi-polar digital signal, the motor and special effects controller re-producing the stored sounds contained in the model train; and

a digital packet triggering a sound effect for automatic playback of a sound effect.

2. The system according to claim 1 wherein the model train has two rails for providing a digital signal and powering the sound effects of the model train, motor, and special effects system.

3. The system according to claim 1 further comprising:

an electrical power supply in the rail car or track side structure having a means for collecting the digital bi-polar signal from either of the two insulated tracks by a pick up on two insulated wheels or off of a digital buss line or overhead wire;

a full wave bridge rectifier with an input connected to a bi-polar digital signal with an output producing a DC voltage regardless of the phase of the bi-polar signal;

a regulated power supply connected to a full wave bridge rectifier supplying power to the sound reproducing system; and

a regulated power source for the audio amplifiers.

4. The system according to claim 1 further comprising:

means for simultaneously decoding a properly addressed digital control packet for control of the model locomotive's electric motor, control of the sound functions and on board special effects.

5. The system of claim 1 further comprising the steps of:

a fixed external source of either AC or DC power and means for connecting a bi-polar digital signal to the sound unit;

means for filtering the low level signal noise in the reception of the bi-polar digital signal for power and control of the sound unit.

6. The system of claim 1 further comprising:

means to synchronize sound effects through the use of a Hall effect sensor to trigger a plurality of speed sensitive sounds located in a model train locomotive or rail car based on a digital speed packet wherein the speed sensitive sounds are stored in the memory and include various samples that emulate different speeds and loads;

a controller that recalls the same plurality of synchronized sound effects at intervals appropriate to the speed of the locomotive depending on a digital command control speed packet wherein the same controller recalls a plurality of synchronized sound effects at intervals appropriate to the speed of the locomotive using a speed sync sensor and further wherein the controller recalls asynchronous sound effects from the same memory or from additional memories for sound on sound.

7. The system of claim 1 wherein the controller activates an automatic steam release sound effect upon sensing a zero speed packet with the correct address header and further activates an appropriate air compressor sound effect upon sensing the same zero speed packet and correct address header and still further activates lighting effects or other onboard special effects after receiving and decoding the properly addressed digital control packet.

8. The system of claim 1 further comprising:

a controller that will decode a three byte packet with an addressed header that matches the sound unit's discreet address in the range of 1 to 127 addresses for controlling a model train locomotive motor, sound effects and onboard special effects.

9. The system of claim 1 further comprising:

a controller that decodes a four byte packet with an address header that matches the sound units discreet address in the address range of 1 through 9999 for controlling a model train locomotive motor, sound effects and onboard special effects.

10. The system of claim 1 further comprising:

means for synchronizing the sound effects to the driver's wheels through decoding a properly addressed digital speed packet that controls the speed of the model locomotive and determines which sound effect to synchronize with the speed of the locomotive using the same digital speed packet.

11. The system of claim 1 further comprising:

a Hall effect sensor to sense a change of speed of wheels of a steam locomotive to trigger the proper speed sound effect by mounting a magnet to the rear of a drive wheel to form a switch closure for synchronization of the sound effect to the digital speed control packet.

12. The system of claim 1 further comprising:

a micro-controller that decodes a predetermined addressed digital signal for control of sound effects, model train propulsion and on board special effects wherein the micro-controller is operatively connected to the analog sound storage of the sound effects wherein the analog sound storage has a predetermined set of sounds at specific addresses; and

a controller that is connected to special effects outputs that control lighting and other onboard effects.

13. The system of claim 12 wherein the micro-controller controls the volume of the plurality of sound effects contained in a rail car.

14. The system of claim 12 wherein the micro-controller is configured for changing the break points to control a plurality of sound effects as related to the speed of a model locomotive, using either 14, 28 or 128 steps of speed control resolution using control variables.

15. The system of claim 12 further comprising:

means for changing the break points at which the digital speed packet triggers the related sound effects through end user accessible software on the micro-controller or as defined as configuration variables.

16. The system of claim 1 further comprising:

a plurality of digitized sounds that are controlled by the controller that receives a bi-polar digital signal.

17. The system of claim 1 wherein the enabling means is an internally triggered Hall-effect sensor responding to a change in a magnetic field.

18. The system of claim 1 further comprising:

a magnet; and

a pendulum on which the magnet is suspended wherein motion causes the magnet to transpose resulting in a change in the magnetic field.

19. The system of claim 1 further comprising:

a microphone constructed and arranged to record the at least one additional characteristic sound on the sound module means.

20. The system of claim 1 wherein the activation means is a magnetically responsive sensor constructed and arranged near a magnetic field, the magnetic field altered by a magnet.

21. A sound reproducing system for a model train traveling on a plurality of rails that uses an amplified digital control signal for propulsion and control, the system comprising:

a sound unit;

a memory within the sound unit wherein the memory stores a plurality of sound effects at addresses wherein the sound effects contain multiple samples that emulate a train locomotive at various speeds and various work-loads wherein the memory has an analog wave form representing sound effects of a locomotive at the various speeds and the various work-loads or a digital representation of the analog wave form that represents a plurality of sound effects of a locomotive at the various speeds and the various work-loads wherein the sound effects simulate the various speeds and the various work-loads by comparing the on-off rate of a sensor to a digital speed packet; and

a controller connected to the memory for recalling at least one of the sound effects wherein the controller is controlled by a digital signal.

22. The system of claim 21 wherein the sound effects are at pre-determined addresses.

23. The system of claim 21 wherein the controller recalls a plurality of sound effects.

24. The system of claim 23 wherein the plurality of sound effects are recalled in a predetermined sequence.

25. The system of claim 23 wherein the plurality of sound effects are recalled in a random sequence.

26. The system of claim 21 wherein the various conditions include various speeds.

27. The system of claim 21 wherein the various conditions include various work-loads.

28. The system of claim 21 wherein the memory includes a plurality of special effects stored therein and further wherein the model locomotive includes a motor wherein the controller controls the motor.

29. The system of claim 21 wherein the digital signal is a bi-polar digital signal.

30. The system of claim 21 wherein the digital signal is a digital packet wherein the digital packet triggers the sound effect.

31. The system of claim 21 further comprising:

an electrical power supply connected to at least one of the plurality of rails;

a pick-up means for collecting the digital signal; and

a full-wave bridge rectifier connected to the electrical power supply and further having an input for receiving the digital signal and an output wherein the output produces a DC voltage without regard to phase of the digital signal.

32. The system of claim 21 wherein the memory includes a plurality of special effects stored therein and further wherein the model locomotive includes a motor and means for simultaneously decoding the digital signal for control of the sound effects, the motor and/or the special effects.

33. The system of claim 21 further comprising:

a fixed external source of electrical power;

means for connecting the digital signal to the sound memory; and

means for filtering the digital signal.

34. The system of claim 21 further comprising:

a speed sync sensor in the controller wherein the controller recalls a plurality of speed sensitive sounds to emulate a speed of the train locomotive based on a speed of the model train wherein the speed sync sensor synchronizes the speed sensitive sounds with the speed of the model train.

35. The system of claim 21 wherein the controller recalls the sound effects in an asynchronous or synchronous manner.

36. The system of claim 21 further comprising:

a second memory for storing the plurality of sound effects.

37. The system of claim 21 further comprising:

a discrete address in the range of 1 to 127 contained within the sound unit wherein the digital signal includes a three byte packet wherein the three byte packet includes an address header that matches the discrete address.

38. The system of claim 21 further comprising:

a discrete address in the range of 1 to 9999 contained within contained within the sound unit wherein the digital signal includes a four byte packet wherein the four byte packet includes an address header that matches the discrete address.

39. The system of claim 21 further comprising:

wheels on the model locomotive;

a digital packet within the digital signal for controlling a speed of the model locomotive; and

means for synchronizing the plurality of sound effects to the wheels of the model locomotive wherein the synchronization means decodes the digital packet and further wherein the synchronization means determines which sound effect to synchronize with the speed of the model locomotive using the digital packet.

40. The system of claim 21 wherein the memory includes a plurality of special effects stored therein and further wherein the model locomotive includes a motor and further wherein the model locomotive includes a micro-controller that decodes a digital signal for control of the sound effects, the motor and/or the special effects.

41. The system of claim 21 wherein the memory includes a plurality of special effects stored therein wherein the special effects include a lighting special effect and further wherein the controller controls the special effects.

42. The system of claim 40 wherein the plurality of sound effects has a volume controlled by the micro-controller.

43. The system of claim 40 wherein the sound effects are divisible by 14, 28 or 128 speed steps controlled by the micro-controller.

44. The system of claim 40 wherein the micro-controller is programmed to control the sound effects.

45. The system of claim 21 wherein the sound effects are digitized.

46. The system of claim 21 further comprising:

a microphone on the sound unit for recording an additional sound effect.

47. The system of claim 21 further comprising:

an activation means for activating the sound effect wherein the activation means is a magnetically responsive sensor.

48. The system of claim 21 further comprising:

means for controlling a variable filter network wherein the variable filter network suppresses audible noise.

49. The system of claim 21 wherein the sound effects include a sample that emulates a train locomotive at multiple speeds.

50. The system of claim 21 wherein the stored sound effects are analog.

51. The system of claim 21 wherein the controller is an integrated sound, motor, and special effects controller.

52. The system of claim 21 wherein the controller is controlled by a bi-polar digital signal.

53. The system of claim 21 wherein the controller recalls the sound effects of either one or a plurality of sound effects in a predetermined sequence or a random sequence by means of a bi-polar digital signal.

54. The system of claim 21 wherein the sound effects are replicating momentum effects using steam or diesel sound effects.

55. The system of claim 21 further comprising:

a first circuit board having a plug; and

a second circuit board having a socket wherein the plug of the first circuit board connects to the socket of the second circuit board.

56. The system of claim 21 further comprising:

a controllable filter network reducing vibrations in a motor.

57. The system of claim 21 wherein a sound unit, with a register fixed in firmware or programmable for control variables wherein the control variables are one of acceleration, deceleration, start voltages, motor response curves, momentum sound effects, load factor sound effects, coasting sound effects, means to synchronize or de-synchronize sound effects to the rotation of wheels and control of a filter network for motor noise snubbing.