Method and apparatus for performing joint timing recovery in a digital receiver using multiple input signals. The apparatus comprises a plurality of phase detectors, a summer, a level shifter, a loop filter and a numerically controlled oscillator nco. The phase detectors produce a phase signal by comparing a timing signal produced by the nco with the input signals. The phase signals are then summed and the level shifter adjusts the summed value to compensate for the number of signals used to form the sum, i.e., the summed value is adjusted to be within the input range of the nco.

Patent
   RE41691
Priority
Apr 13 2001
Filed
May 23 2007
Issued
Sep 14 2010
Expiry
Apr 13 2021
Assg.orig
Entity
Large
0
8
all paid
0. 13. A method for performing timing recovery comprising:
producing a plurality of phase signals by comparing a signal received at each of a plurality of inputs to a timing signal produced by a numerically controlled oscillator (nco);
summing the plurality of phase signals to produce a sum;
adjusting the sum into an input range for the numerically controlled oscillator (nco), wherein the adjusting comprises (i) determining an offset using a number of inputs determined to have a receivable signal, and (ii) adjusting the sum using the offset to produce an adjusted sum, wherein adjusting the sum comprises adding the offset to the sum if the sum is less than the input range; and
producing the timing signal within the nco in response to the adjusted sum.
0. 14. A method for performing timing recovery comprising:
producing a plurality of phase signals by comparing a signal received at each of a plurality of inputs to a timing signal produced by a numerically controlled oscillator (nco);
summing the plurality of phase signals to produce a sum;
adjusting the sum into an input range for the numerically controlled oscillator (nco), wherein the adjusting comprises (i) determining an offset using a number of inputs determined to have a receivable signal, and (ii) adjusting the sum using the offset to produce an adjusted sum, wherein adjusting the sum comprises subtracting the offset from the sum if the sum is greater than the input range; and
producing the timing signal within the nco in response to the adjusted sum.
0. 10. An apparatus for performing timing recovery of a signal received at a plurality of inputs, the apparatus comprising:
means for producing a plurality of phase signals by comparing a signal received at each of a plurality of inputs to a timing signal produced by a numerically controlled oscillator (nco);
means for summing the plurality of phase signals to produce a sum;
means for adjusting the sum into an input range for the numerically controlled oscillator (nco), wherein the means for adjusting includes means to determine an offset using a number of receivable inputs and to adjust the sum so as to produce an adjusted sum by adding the offset to the sum or subtracting the offset from the sum; and
means for producing the timing signal within the nco in response to the adjusted sum.
4. A method for performing timing recovery comprising:
producing a phase signal plurality of phase signals by comparing a signal received at each of a plurality of inputs to a timing signal produced by a numerically controlled oscillator (nco);
summing said plurality of phase signals to produce a sum;
adjusting said sum into an input range for the numerically controlled oscillator (nco), wherein said adjusting comprises:
determining whether each input is receivable has a receivable signal;
determining an offset using a number of the inputs determined to have a receivable inputs signal; and
adjusting the sum using the offset to produce an adjusted sum, wherein said adjusting by said offset comprises:
adding the sum by to the offset if the sum is below the input range; and
producing a the timing signal within the nco in response to the adjusted sum.
5. A method for performing timing recovery comprising:
producing a phase signal plurality of phase signals by comparing a signal received at each of a plurality of inputs to a timing signal produced by a numerically controlled oscillator (nco);
summing said plurality of phase signals to produce a sum;
adjusting said sum into an input range for the numerically controlled oscillator (nco), wherein said adjusting comprises:
determining whether each input is receivable has a receivable signal;
determining an offset using a number of the inputs determined to have a receivable inputs signal; and
adjusting the sum using the offset to produce an adjusted sum, wherein said adjusting by said offset comprises:
subtracting the offset from the sum by the offset if the sum is above the input range; and
producing a the timing signal within the nco in response to the adjusted sum.
0. 9. An apparatus for performing timing recovery of a signal received at a plurality of inputs, said apparatus comprising:
a plurality of phase detectors each detecting a phase of said signal at a different input by comparing the input signal to a timing signal from a numerically controlled oscillator (nco);
a summer for adding said detected phases to form a sum;
a level shifter for adjusting the sum to produce an adjusted sum that is within an input range of said nco;
a loop filter for filtering the adjusted sum to produce a filtered sum;
the nco for generating the timing signal in response to the filtered sum;
a plurality of signal detectors each for determining whether an input signal is receivable; and
a decision circuit using a total number of inputs determined to have a receivable input signal so as to determine an offset that is added to or subtracted from the sum by said level shifter.
6. An apparatus for performing timing recovery of a signal received at a plurality of inputs, said apparatus comprising:
a plurality of phase detectors each detecting a phase of said signal at a different input by comparing the input signal to a timing signal from a numerically controlled oscillator (nco);
a summer for adding said detected phases to form a sum;
a level shifter for adjusting the sum to produce an adjusted sum that is within an input range of said nco;
a loop filter for filtering the adjusted sum;
the nco for generating a the timing signal in response to the filtered sum;
a plurality of signal detectors each for determining whether an input signal is receivable; and
a decision circuit using a total of receivable input signals to determine an adjustment to the sum by said level shifter,
wherein said decision circuit determines an offset that is added to or subtracted from the sum by said level shifter.
1. A method for performing timing recovery comprising:
producing a phase signal plurality of phase signals by comparing a signal received at each of a plurality of inputs to a timing signal produced by a numerically controlled oscillator (nco);
summing said plurality of phase signals to produce a sum;
adjusting said sum into an input range for the numerically controlled oscillator (nco), wherein said adjusting comprises:
determining whether the signal received at each input can be accurately received, wherein said determining comprises ignoring a received signal having a low amplitude or signal level; and
dividing the sum by a number of potentially receivable inputs the received signals that were determined to be accurately received to produce an adjusted sum, wherein the number of the received signals that were determined to be accurately received is less than a number of the inputs that received a signal; and
producing a the timing signal within the nco in response to the adjusted sum.
0. 12. An apparatus for performing timing recovery of a signal received at a plurality of inputs, the apparatus comprising:
means for producing a plurality of phase signals by comparing a signal received at each of a plurality of inputs to a timing signal produced by a numerically controlled oscillator (nco);
means for summing the plurality of phase signals to produce a sum;
means for adjusting the sum to produce an adjusted sum that is within an input range for the numerically controlled oscillator (nco), wherein the means for adjusting the sum comprises means for using a total number of inputs determined to have a receivable input signal so as to determine an offset for adjusting the sum; and
means for producing the timing signal within the nco in response to the adjusted sum,
wherein if the sum is greater than the input range for the nco, then adjusting the sum includes subtracting the offset from the sum, and
wherein if the sum is less than the input range for the nco, then adjusting the sum includes adding the offset to the sum.
3. A method for performing timing recovery comprising:
a plurality of phase detectors producing a plurality of phase signals, wherein each of the phase detectors comprises a respective first input that receives a respective signal, wherein each of the phase detectors comprises a respective second input that receives a timing signal produced by a numerically controlled oscillator (nco), and wherein each of the phase detectors produces a respective phase signal of the plurality of phase signals by comparing a phase of the respective signal received at each of a plurality of inputs the first input of the phase detector to a phase of the timing signal produced by a numerically controlled oscillator (nco) received at the second input of the phase detector;
summing said plurality of phase signals to produce a sum;
adjusting said sum into an input range for the numerically controlled oscillator (nco), wherein said adjusting comprises:
determining whether each a number of the first inputs that have a receivable signal, is receivable, wherein said determining comprises:
determining whether an amplitude of each signal at the first inputs is above a threshold value;
determining an offset using a number of receivable inputs; and
adjusting the sum using the offset; and
dividing said sum by the number of the first inputs that have a receivable signal to produce an adjusted sum, wherein the number of the first inputs that have a receivable signal is less than a number of the first inputs that receive a respective signal; and
producing a the timing signal within the nco in response to the adjusted sum.
2. The method of claim 1 wherein said determining comprises:
determining whether an amplitude of the signal received at each input is greater than a threshold value.
0. 7. The apparatus of claim 6 wherein said decision circuit divides the sum by the total of receivable input signals.
0. 8. The apparatus of claim 6 wherein said decision circuit determines an offset that is added to or subtracted from the sum by said level shifter.
0. 11. The apparatus of claim 10,
wherein the means for adjusting the sum into an input for the nco comprises means for determining whether each input has a receivable signal, and
wherein determining whether each input has a receivable signal includes determining whether an amplitude of each input is greater than a threshold value.

212 214 would subtract the offset from the sum. Similarly, if the sum of the detected phases is less than the input range of the NCO 218, the level shifter 212 214 would add the offset to the sum. The value of the offset is configured such that the adjusted sum is within the input range of the NCO 218.

The loop filter 216 filters the adjusted sum from the level shifter 214 to the NCO 218. The loop filter 216 typically comprises an integrator circuit that operates as a low pass filter. The NCO 218 receives the filtered sum and generates a phase estimate of the adjusted sum of detected phases. The generated phase estimate is coupled to the phase detectors 202 and 204. As such, only one NCO 218 is used to generate a common phase estimate for all the inputs, e.g., A and B, in the joint timing recovery system 200.

The phase estimate from the NCO is coupled to the phase detectors 202 and 204. The phase detectors 202 and 204 use the phase estimate and the input signals A and B to derive phase difference signals. Iteration of the phase difference signals in the joint timing recovery system 200 will stabilize the phase estimate from the NCO 218. The output of the NCO 218 is used as a timing signal, e.g., a timing recovery signal within the receiver.

By adjusting the sum of the detected phases within the input range of a single numerically controlled oscillator (NCO), the present invention generates a single timing signal for a receiver that receives multiple input signals. One such application of the joint timing recovery circuit 200 is a receiver having diverse antennas.

Although various embodiments which incorporate the teachings of the present invention have been shown and described in detail herein, those skilled in the art can readily devise many other varied embodiments that still incorporate these teachings.

Reed, Jr., Charles

Patent Priority Assignee Title
Patent Priority Assignee Title
3555194,
5321850, Oct 09 1991 TELEFONAKTIEBOLAGET L M ERICSSON A CORP OF SWEDEN Diversity radio receiver automatic frequency control
6169907, Oct 21 1997 Altobridge Limited Power control of remote communication devices
6307413, Dec 23 1999 RPX Corporation Reference-free clock generator and data recovery PLL
20020049936,
20020136342,
20030016087,
20030085739,
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Jul 19 2006Sarnoff CorporationTranspacific IP LtdASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0197070720 pdf
Apr 16 2009Transpacific IP LtdTRANSPACIFIC PLATINUMERIC, LLCASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0226290478 pdf
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