Thin-film thermoelectric device and fabrication method of same

Abstract

A termoelectric thermoelectric device and method for manufacturing the thermoelectric device. The thermoelectric thermoelectric device includes at least one deposited film of a thermoelectric material having opposed first and second major surfaces separated by a thickness of the at least one deposited film with the at least one deposited film being patterned to define a plurality of thermoelements arranged in a matrix pattern having rows of alternating conductivity type, a first header having formed thereon a first interconnecting member with the first header mounted on the first major surface of the deposited film such that the first interconnecting member is connected to one side of the plurality of thermoelements and connects adjacent thermoelements of an opposite conductivity type, and a second header having formed thereon a second interconnecting member with the second heads mounted on the second major surface of the deposited film such that the second interconnecting member is connected to an opposite side of said plurality of thermoelements and connects adjacent thermoelements of an opposite conductivity type.

Description

This application claims benefit of Provisional Appln No. 60/042,845 filed Mar. 31, 1997.

i.e. by direct deposition). The type-conversion can be performed at a convenient stage in the manufacturing process, such as when the device has the structure shown in FIGS. 5 and 6. Such a device can potentially be manufactured even more cost-effectively, with additional advantages and flexibility in the design of the device parameters.

The backside of an integrated circuit chip may be used as the cooling or power header. The backside, especially if it is electrically conducting, needs to be suitably modified to confine the electrical current to the thermoelectric element. One example of suitable preparation is p-n junction isolation in the backside of the chip whereby the current is made to flow through the intended thermoelectric electric elements, i.e. is confined to the elements, and is not shunted by the conducting backside of the chip. Other modifications of the backside are possible to achieve similar confinement of the current.

The backside of the chip should be of good thermal conductivity. The backside then may be used to extract heat which could be used for other purposes such as power generation. For example, the power generated using the heat could be used provide power to other circuits or to other cooling devices.

The BASIC-TFTD according to the invention is scalable to a variety of heat loads and is manufacturable in large volume (area). It is amenable to automation, is compatible with cascading or multi-staging (leading to a smaller ΔT per stage for a higher coefficient of performance in a refrigerator or for higher efficiency in a power generator) and is equally applicable to both cooling and power generation.

Obviously, numerous modifications and variations os the present invention are possible in light of the above teachings. It is therefore to be understood that, within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.

Claims

1. A thermoelectric device, comprising:

at least one deposited film of a thermoelectric material having opposed first and second major surfaces separated by a thickness of the at least one deposited film, said deposited film being patterned to define a plurality of thermoelements;

a first header having formed thereon a first interconnecting member, said first header mounted on the first major surface of the deposited film such that the first interconnecting member is connected to one side of said plurality of thermoelements and connects adjacent thermoelements of an opposite conductivity type; and

a second header having formed thereon a second interconnecting member, said second header mounted on the second major surface of the deposited film such that the second interconnecting member is connected to an opposite side of said plurality of thermoelements and connects adjacent thermoelements of an opposite conductivity type.

2. A device as recited in claim 1, comprising:

said thermoelements being arranged in a matrix pattern having rows of alternating conductivity type.

3. A device as recited in claim 2, wherein said first and second interconnecting members are connected to opposite sides of said thermoelements so that current flow through said thermoelements flows from a top to a bottom of a first thermoelement and from a bottom to a top of a second adjacent thermoelement of a opposite conductivity type from the first thermoelement.

4. A device as recited in claim 2, comprising:

said matrix pattern being m by n in size, where n is odd and m>>n.

5. A device as recited in claim 1, wherein said thermoelements are formed of a material selected from the group consisting of superlattice thermoelectric materials, quantum well structured materials and quantum dot structured materials.

6. A device as recited in claim 1, wherein said at least one deposited film of thermoelectric material comprises plural film layers deposited one on top of the other to define interfaces between each film layer.

7. A device as recited in claim 1, wherein said at least one deposited film of thermoelectric material comprises a material selected from the group consisting of superlattice materials, non-superlattice materials, quantum-well structured materials, quantum-dot structured materials and non-quantum-confined materials.

8. A device as recited in claim 7, wherein the thermoelements have a thickness of 1 to 10 microns.

9. A device as recited in claim 7, wherein the matrix pattern comprises a set of first and second thermoelements arranged in a matrix pattern with said first thermoelement having a length L1 and a width W1 and said second thermoelement having a length L2 and a width W2, with a separation distance C in a row direction and a separation distance D in a column direction such that C and D are less than L1, L2, and W1, W2.

10. A device as recited in claim 9, wherein:

L1 is in a range of 1 mm to 5 mm,

L2 is in a range of 1 mm to 5 mm,

W1 is in a range of 5 to 50 μm, and

W2 is in a range of 5 to 50 μm.

11. A device as recited in claim 10, wherein:

D is approximately 10 μm, and

C is in a range of ˜2 to 10 μm.

12. A method of manufacturing a thermoelectric device, comprising:

depositing on a first substrate at least one thermoelectric film of a first conductivity type having first opposed surfaces separated by a thickness of the at least one thermoelectric film of a first conductivity type;

depositing on a second substrate at least one thermoelectric film of a second conductivity type having second opposed surfaces separated by a thickness of the at least one thermoelectric film of a second conductivity type;

dividing the first substrate to form a first plurality of thermoelectric segments of the first conductivity type;

dividing the second substrate to form a second plurality of thermoelectric segments of the second conductivity type;

arranging said first and second opposed surfaces of said first and second plurality of thermoelectric segments on a first header in an alternating pattern of said first and second thermoelectric segments separated by a predetermined distance and using the first header to connect adjacent of said first and second thermoelectric segments;

removing the first and second substrates;

patterning said first and second plurality of thermoelectric segments to form a plurality of first and second thermoelements, respectively, said first and second thermoelements having first major surfaces interconnected via the first header and second major surfaces; and

mounting a second header on the second major surface of the thermoelements and using the second header to connect at least one of said first thermolements to at least one of said second thermoelements.

13. A method as recited in claim 12, wherein the steps of depositing comprise:

depositing the at least one thermoelectric film of a first conductivity type and the at least one thermoelectric film of a second conductivity type with a thickness no more than approximately 10 microns on respective first and second substrates.

14. A method as recited in claim 12, wherein said first and second headers each have a plurality of conductive members arranged in a matrix pattern, said method comprising:

disposing one of the said first thermoelements and an adjacent one of said second thermoelements on one of said conductive members of said first header to form a plurality of thermoelement pairs;

forming a conductive material on an upper surface of each of said first and second thermoelements; and

disposing said conductive members of said second header on said conductive material on said first and second thermoelements to connect said pairs of thermoelements in series.

15. A method as recited in claim 14, comprising:

connecting said first header to a heat source; and

applying voltages to members of said first and second headers so that a current flows from a top to a bottom of said first thermoelement of a pair and from a bottom to a top of said second thermoelement of said pair.

16. A method as recited in claim 12, wherein forming said first and second elements comprises:

disposing a film on said first header;

patterning said film to form sections; and

selectively doping said sections.

17. A method as recited in claim 12, comprising:

forming said segments using a film having a thickness of no more than approximately 10 microns from a material selected from the group consisting of superlattice materials, quantum well structured materials and quantum dot structured materials.

18. A method as recited in claim 12, comprising:

patterning said segments to form said first and second elements in a matrix pattern with said first thermoelements having a width W1 and a length L1 and said second elements having a width W2 and a length L2;

separating said first and second thermoelements by a first distance C in a row direction and a second distance D in a column direction such that C, D are less than L1, L2, W1, W2.

19. A method as recited in claim 12, wherein arranging first and second plurality of segments on a first header comprises;

using as a first header a backside of an integrated circuit chip.

20. A method as recited in claim 19, wherein the thermoelectric device is configured to extract heat from said chip for power generation.

21. A method as recited in claim 16, wherein forming said first and second thermoelements comprises:

using a first header comprising a backside of an integrated circuit chip.

22. A method as recited in claim 16, wherein forming said first and second thermoelements comprises:

using a first header comprising a backside of an integrated circuit chip; and

extracting heat from said chip for power generation.

23. A method as recited in claim 18, wherein the steps of patterning and separating utilize:

L1 in a range of 1 mm to 5 mm,

L2 in a range of 1 mm to 5 mm,

W1 in a range of 5 to 50 μm, and

W2 in a range of 5 to 50 μm.

24. A method as recited in claim 23, wherein the steps of patterning and separating utilize:

D approximately 10 μm, and

C in a range of ˜2 to 10 μm.

25. A method of manufacturing a thermoelectric device, comprising:

disposing a first conductivity type film on a first header with the first conductivity type film including at least one deposited film of a thermoelectric material having opposed first and second major surfaces separated by a thickness of the at least one deposited film and one of the first and second major surfaces contacting the header;

patterning said film to form sections;

selectively converting the first conductivity type of selected ones of the patterned sections to a second conductivity type to define first thermoelements of the first conductivity type and second thermoelements of the second conductivity type; and

connecting electrically first thermoelements having a first conductivity type to adjacent thermoelements having said second conductivity type.

26. A method as recited in claim 25, wherein selectively converting comprises one of diffusion and ion implantation.

27. A method as recited in claim 25, further comprising:

disposing on connected said firs thermoelements and said adjacent thermoelements a second header comprising a backside of an integrate circuit chip.

28. A method as recited in claim 25, wherein the thermoelectric device is configured to extract heat from said chip for power generation.

29. A method as recited in claim 25, wherein the step of disposing a first conductivity type film on a first header comprises:

utilizing as the first header a head metallized to electrically connect adjacent thermoelements of opposite conductivity type.

30. An electronic device comprising:

a chip;

a thermoelectric device comprising plural series connected thermoelements disposed in contact with the chip; and

said thermoelements comprising a deposited high zt thermoelectric film having opposed first and second major surfaces separated by a thickness of the deposited thermoelectric film, one of said opposed first and second major surfaces being in contact with said chip.

31. The electronic device of claim 30, wherein the chip comprises an integrated circuit chip.

32. The electronic device of claim 31, wherein the thermoelectric device is disposed in contact with the backside of the integrated circuit chip.

33. The electronic device of claim 32, wherein said backside is configured to isolate current flow between each of plural series connected thermoelements to the backside of the integrated circuit chip.

34. The electronic device of claim 33, wherein said backside comprises p-n junctions configured to isolate said current flow.

35. The electronic device of claim 30, wherein the plural series connected thermoelements comprise opposite conductivity type sub-elements arranged in a matrix pattern.

36. The electronic device of claim 35, wherein said matrix pattern comprises alternating rows of said opposite conductivity type sub-elements.

37. The electronic device of claim 35, wherein said matrix pattern comprises a first set of said sub-elements and a second set of said sub-elements, said sub-elements of said first set having a length L1 and a width W1 and said sub-elements of said second set having a length L2 and a width W2, with a separation distance C in a row direction and a separation distance D in a column direction such that C and D are less than L1, l2, and W1, W2.

38. The electronic device of claim 37, wherein L1 is in a range of 1 mm to 5 mm, L2 is in a range of 1 mm to 5 mm, W1 is in a range of 5 to 50 μm, and W2 is in a range of 5 to 50 μm.

39. The electronic device of claim 38, wherein D is approximately 10 μm, and C is in a range of ˜2 to 10 μm.

40. The electronic device of claim 30, wherein the chip comprises:

a first interconnecting member connected to one side of said thermoelements and connecting adjacent thermoelements of an opposite conductivity type.

41. The electronic device of claim 40, wherein the thermoelectric device comprises:

a header having formed thereon a second interconnecting member, said second header mounted to the second major surface of the deposited thermoelectric film such that the second interconnecting member is connected to an opposite side of said thermoelements and connects said adjacent thermoelements of an opposite conductivity type.

42. The electronic device of claim 30, wherein the deposited high zt thermoelectric film has a range of thickness from 5 to 20 μm.

43. The electronic device of claim 30, wherein the deposited high zt thermoelectric film comprises at least one of a superlattice material, a quantum well material, and a quantum-dot material.

44. A thermoelectric system comprising:

a header; and

a patterned thermoelectric material deposited directly on the header.

45. The thermoelectric system of claim 44, further comprising:

an integrated circuit chip thermally coupled to the thermoelectric material through the header.

46. The thermoelectric system of claim 44, wherein the patterned thermoelectric material comprises:

a deposited thermoelectric film having opposed first and second major surfaces separated by a thickness of the deposited thermoelectric film, one of said opposed first and second major surfaces being in contact with said header.

47. The thermoelectric system of claim 44, wherein the patterned thermoelectric material comprises opposite conductivity type thermoelements arranged in a matrix pattern.

48. The thermoelectric system of claim 47, wherein said matrix pattern comprises alternating rows of said opposite conductivity type thermoelements.

49. The thermoelectric system of claim 48, wherein said header comprises interconnecting members configured to connect said alternating rows of said opposite conductivity type thermoelements.

50. The thermoelectric system of claim 47, wherein said matrix pattern comprises a first set of said thermoelements and a second set of said thermoelements, said thermoelements of said first set having a length L1 and a width W1 and said thermoelements of said second set having a length L2 and a width W2, with a separation distance C in a row direction and a separating distance D in a column direction such that C and D are less than L1, L2, and W1, W2.

51. The thermoelectric system of claim 50, wherein L1 is in a range of 1 mm to 5 mm, L2 is in a range of 1 mm to 5 mm, W1 is in a range of 5 to 50 μm, and W2 is in a range of 5 to 50 μm.

52. The thermoelectric system of claim 51, wherein D is approximately 10 μm, and C is in a range of ˜2 to 10 μm.

53. The thermoelectric system of claim 44, wherein the patterned thermoelectric material is a high zt thermoelectric film.

54. The thermoelectric system of claim 53, wherein the hight zt thermoelectric film comprises at least one of a superlattice material, a quantum well material, and a quantum-dot material.

55. The thermoelectric system of claim 53, wherein the high zt thermoelectric film has a range of thickness from 5 to 20 μm.

56. An electronic device according to claim 30 wherein the chip includes first interconnection members connected to the first major surfaces of the thermoelements such that the first interconnecting members connect adjacent thermoelements of opposite conductivity types, the electronic device further comprising:

a header including thereon second interconnecting members, said header mounted on the second major surfaces of the thermoelements such that the thermoelements are between the chip and the header and such that the second interconnection members connect adjacent thermoelements of opposite conductivity types.