A current-sensing and correction circuit having programmable temperature compensation circuitry that is incorporated into a pulse width modulation controller of a buck mode DC—DC converter. The front end of the controller contains a sense amplifier, having an input coupled via a current feedback resistor to a common output node of the converter. The impedance of a MOSFET, the current through which is sampled by a sample and hold circuit is controlled by the sense amplifier unit. A sensed current correction circuit is coupled between the sample and hold circuit and the controller, and is operative to supply to the controller a correction current having a deterministic temperature-compensating relationship to the sensed current. The ratio of correction current to sensed current equals a value of one at a predetermined temperature, and has other values at temperatures other than at that temperature.

Patent
   RE42037
Priority
Dec 14 2001
Filed
Apr 20 2009
Issued
Jan 18 2011
Expiry
Nov 26 2022
Assg.orig
Entity
Large
1
17
all paid
0. 1. An apparatus for generating a regulated direct current (DC) output voltage comprising:
a DC—DC converter coupled to a supply voltage, and being operative to generate a regulated output voltage derived from said supply voltage, said DC—DC converter having a pulse width modulation generator which generates a PWM switching signal that switchably controls operation of a switching circuit containing first and second electronic power switching devices coupled between respective first and second power supply terminals, a common node thereof being coupled through an inductor element to an output voltage terminal; and
a controller for controlling the operation of said PWM generator, said controller including
a sense amplifier unit having an input coupled to said first power supply terminal, a second input and an output,
a current feedback resistor electrically coupled between said common output node and said second input of said sense amplifier unit,
a variable impedance coupled to said output of said sense amplifier unit and to said second input of said sense amplifier unit, said variable impedance configured to vary in impedance in response to said output of said sense amplifier unit,
a sample and hold circuit coupled to said variable impedance, and being operative to sample and hold current flowing through said variable impedance as a sensed current, and
a sensed current correction circuit, coupled between said sample and hold circuit and said controller, and being operative to supply, to said controller, a correction current having a prescribed temperature-compensating relationship to said sensed current as sampled and held by said sample and hold circuit.
0. 19. A method of controlling the operation of a DC—DC converter, said DC—DC converter being coupled to a supply voltage, and being operative to generate a regulated output voltage derived from said supply voltage, said DC—DC converter including
a pulse width modulation generator, which generates a PWM switching signal that switchably controls operation of a switching circuit containing first and second electronic power switching devices coupled between respective first and second power supply terminals, a common node thereof being coupled through an inductor element to an output voltage terminal, and
a controller for controlling the operation of said PWM generator, said controller including a sense amplifier unit having a first input coupled to said first power supply terminal, a second input and an output, a current feedback resistor coupled between said common output node and said second input of said sense amplifier unit, a variable impedance coupled to said output of said sense amplifier unit, said variable impedance configured to vary in impedance in response to said output of said sense amplifier unit, and a sample and hold circuit coupled to said variable impedance, and being operative to sample and hold current flowing through said variable impedance as a sensed current,
said method comprising the steps of:
(a) generating a correction current having a prescribed temperature-compensating relationship to said sensed current as sampled and held by said sample and hold circuit; and
(b) coupling said correction current to said controller, so that said controller controls the operation of said PWM generator in accordance with said correction current.
0. 25. A power supply comprising:
a first switch coupled to a first voltage supply terminal and to a common output node;
a second switch coupled to the common output node and to a second voltage supply terminal;
a control circuit operable to provide a first switching signal to the first switch and a second switching signal to the second switch; wherein the first and second switches are turned on and off in response to the first and second switching signals, respectively;
a current sense circuit generating a sensed current that is related to an output current of the power supply; and
a sensed current correction circuit, coupled to the current sense circuit and the control circuit, and being operative to provide, to the control circuit, a correction current used to adjust the first and second switching signals, the correction current having a prescribed temperature-compensating relationship to said sensed current, wherein said correction current is a combination of said sensed current, a first compensating current and a second compensating current.
0. 2. The apparatus according to claim 1, wherein said prescribed temperature-compensating relationship of said correction current to said sensed current is such that the ratio of said correction current to said sensed current equals one at a predetermined temperature, and has a values other than one at temperatures other than said predetermined temperature.
0. 3. The apparatus according to claim 1, wherein said prescribed temperature-compensating relationship of said correction current to said sensed current is such that the ratio of said correction current to said sensed current follows a deterministic curve at temperatures other than said predetermined temperature.
0. 4. The apparatus according to claim 3, wherein said first electronic power switching device comprises a MOSFET, and said deterministic curve approximates a variation of drain-source resistance of said MOSFET with temperature.
0. 5. The apparatus according to claim 3, wherein said sensed current correction circuit includes a programming element that is operative to change the slope of said deterministic curve.
0. 6. The apparatus according to claim 1, wherein said prescribed temperature-compensating relationship of said correction current to said sensed current is such that said correction current equals said sensed current at a predetermined temperature and, at temperatures above said predetermined temperature the ratio of said correction current to said sensed current is less than one, and at temperatures below said predetermined temperature the ratio of said correction current to said sensed current is greater than one.
0. 7. The apparatus according to claim 1, wherein said sensed current correction circuit includes a programming element that is effective to establish said prescribed temperature-compensating relationship to said current as sampled and held by said sample and hold circuit.
0. 8. The apparatus according to claim 1, wherein
said sample and hold circuit is operative to generate first and second sensed currents, each of which is representative of said current as sampled and held by said sample and hold circuit, and
said sensed current correction circuit includes
a first sensed current path, that is operative to process said first sensed current to produce first and second scaled versions of said sensed current, and
a second sensed current path, coupled with said first sensed current path, and being operative to combine said second sensed current with said first and second scaled versions of said sensed current to produce said control current.
0. 9. The apparatus according to claim 8, wherein said first sensed current path is operative to process said first sensed current in accordance with a programmable circuit element to produce first and second scaled versions of said sensed current.
0. 10. The apparatus according to claim 9, wherein said first current path includes said programmable circuit element, and first and second auxiliary amplifier circuits coupled to said programmable circuit element to produce said first and second scaled versions of said sensed current.
0. 11. The apparatus according to claim 10, wherein said first current path includes a current flow direction circuit coupled with one of said first and second auxiliary amplifier circuits and being operative to supply one of said first and second scaled versions of said sensed current with a prescribed current flow direction relative to said second sensed current.
0. 12. The apparatus according to claim 11, wherein said current flow direction circuit comprises a current mirror circuit coupled to said first auxiliary amplifier circuit and being operative to supply said first scaled version of said sensed current with said prescribed current flow direction relative to said second sensed current.
0. 13. The apparatus according to claim 11, wherein said current flow direction circuit comprises a third auxiliary amplifier circuit coupled to said first auxiliary amplifier circuit and being operative to supply said first scaled version of said sensed current with said prescribed current flow direction relative to said second sensed current.
0. 14. A power supply comprising:
a buck mode pulse width modulator (PWM) DC—DC converter circuit having an input, a high side output and a low side output;
a high side switch coupled between a first voltage supply terminal and common output node, and being operative to control current flow therethrough in response to said high side output;
a low side switch coupled between said common output node and to a second voltage supply terminal, and being operative to control current flow therethrough in response to said low side output;
a sense amplifier unit having a first input, a second input and an output, said second input coupled to said second voltage supply terminal;
a current feedback resistor electrically coupled between said common output node and said first input of said sense amplifier;
a variable impedance component electrically connected to said output of said sense amplifier unit and to said first input of said sense amplifier, said variable impedance component configured to vary in impedance in response to said output of said sense amplifier unit;
a sample and hold circuit coupled to said variable impedance component, and being operative to sample and hold current flowing through said variable impedance component as a sensed current; and
a sensed current correction circuit, coupled between said sample and hold circuit and said buck mode PWM DC—DC converter, and being operative to supply, to said input of said buck mode PWM DC—DC converter, a correction current having a prescribed temperature-compensating relationship to said sensed current as sampled and held by said sample and hold circuit.
0. 15. The power supply according to claim 14, wherein said prescribed temperature-compensating relationship of said correction current to said sensed current is such that the ratio of said correction current to said sensed current follows a deterministic curve at temperatures other than said predetermined temperature.
0. 16. The power supply according to claim 15, wherein said first electronic power switching device comprises a MOSFET, and said deterministic curve approximates a variation of drain-source resistance of said MOSFET with temperature.
0. 17. The power supply according to claim 16, wherein said sensed current correction circuit includes a programming element that is operative to change the slope of said deterministic curve.
0. 18. The power supply according to claim 14, wherein said prescribed temperature-compensating relationship of said correction current to said sensed current is such that said correction current equals said sensed current at a predetermined temperature and, at temperatures above said predetermined temperature the ratio of said correction current to said sensed current is less than one, and at temperatures below said predetermined temperature the ratio of said correction current to said sensed current is greater than one.
0. 20. The method according to claim 19, wherein said prescribed temperature-compensating relationship of said correction current to said sensed current is such that the ratio of said correction current to said sensed current equals one at a predetermined temperature, and has values other than one at temperatures other than said predetermined temperature.
0. 21. The method according to claim 19, wherein said prescribed temperature-compensating relationship of said correction current to said sensed current is such that the ratio of said correction current to said sensed current follows a deterministic curve at temperatures other than said predetermined temperature.
0. 22. The method according to claim 21, wherein said first electronic power switching device comprises a MOSFET, and said deterministic curve approximates a variation of drain-source resistance of said MOSFET with temperature.
0. 23. The method according to claim 21, wherein step (a) comprises establishing the slope of said deterministic curve using a programming element.
0. 24. The method according to claim 19, wherein said prescribed temperature-compensating relationship of said correction current to said sensed current is such that said correction current equals said sensed current at a predetermined temperature and, at temperatures above said predetermined temperature the ratio of said correction current to said sensed current is less than one, and at temperatures below said predetermined temperature the ratio of said correction current to said sensed current is greater than one.
0. 26. The power supply according to claim 25, wherein the prescribed temperature-compensating relationship of the correction current to the sensed current is such that the ratio of the correction current to the sensed current follows a deterministic curve at temperatures other than a predetermined temperature.
0. 27. The power supply according to claim 26, wherein the second switch comprises a metal-oxide-semiconductor field-effect transistor (MOSFET), and the deterministic curve approximates an inverse of a variation of drain-source resistance of the MOSFET with temperature.
0. 28. The power supply according to claim 26, wherein the sensed current correction circuit includes a programming element that is operative to change the slope of the deterministic curve.
0. 29. The power supply according to claim 25, wherein the prescribed temperature-compensating relationship of the correction current to the sensed current is such that the correction current equals the sensed current at a predetermined temperature and, at temperatures above the predetermined temperature the ratio of the correction current to the sensed current is less than one, and at temperatures below the predetermined temperature the ratio of the correction current to the sensed current is greater than one.
0. 30. The power supply according to claim 25, wherein the current sense circuit comprises:
a sense amplifier unit having a first input, a second input and an output, the first input coupled to the common output node and the second input coupled to the second voltage supply terminal;
a variable impedance component coupled to the output of the sense amplifier unit and to the first input of the sense amplifier unit, the variable impedance component configured to vary in impedance in response to the output of the sense amplifier unit; and
a sensed current providing circuit coupled to the variable impedance component, and being operative to provide a sensed current in accordance with a current flowing through the variable impedance.
0. 31. The power supply according to claim 30, wherein the sensed current providing circuit comprises a sample and hold circuit operative to sample and hold current flowing through the variable impedance component as a sensed current.
0. 32. The power supply according to claim 30, wherein the variable impedance component comprises an n-channel metal-oxide-semiconductor field-effect transistor (NFET).


ICORRECTED=ISENSE*(1−(rPROGRAM/rLOWtc)+(rPROGRAM/rHIGHtc)).

This temperature-compensated current ICORRECTED is coupled to the controller's error amplifier circuitry in place of the sensed current ISENSE, as described above.

FIG. 4 contains a family of deterministic curves, that graphically depict the temperature-compensating relationship (i.e., ratio) of the temperature-compensated or correction current ICORRECTED to the sense current ISENSE over a typical operational temperature range (−20° C. to +125° C.), for a number of different resistance values RPROGRAM of the programming resistor 310, and with the two currents IHIGHtc and ILOWtc being the same at the above-referenced value of 25° C. As shown therein, for the temperature (25° C.) at which the two currents IHIGHtc and ILOWtc are equal, from the above equation for ICORRECTED, the ratio of ICORRECTED to ISENSE, i.e., ICORRECTED/ISENSE=1.0.

Since the temperature coefficient of resistance of resistor 325 is greater than the temperature coefficient of resistance of resistor 335, the ratio of the resistance of resistor 325 to the resistance of programming resistor 310 will increase with temperature faster than the ratio of the resistance of resistor 335 to the resistance of programming resistor 310. As a result, as the temperature increases, the contribution of the current component IHIGHtc into node 365 will decrease faster than the contribution of the current ILOWtc away from node 365, so that the composite current ICORRECTED will decrease.

Thus, for temperatures greater than the current-equality (IHIGHtc=ILOWtc) temperature, ICORRECTED/ISENSE will be less than 1.0, while for temperatures below the current-equality (IHIGHtc=ILOWtc) temperature, ICORRECTED/ISENSE will be greater than 1.0, as shown.

FIG. 5 diagrammatically shows a second embodiment of the current sensing circuit of the invention, in which the first embodiment of FIG. 3 is modified to incorporate an additional gain stage in place of the current mirror circuitry that is used to supply the replicated current component IHIGHtc to the output node. In particular, PFETs 350 and 360 of the first embodiment are replaced with a gain stage 500 having a third auxiliary amplifier 510 which drives a PFET 520. Amplifier 510 has its non-inverting (+) input 512 coupled to a node 514, which is connected in common to a scaling resistor 530 referenced to VCC and NFET 340. Scaling resistor 530 has a resistance rLOWtc2. Amplifier 510 has its inverting (−) input 511 coupled to a node 515, which is connected in common to a scaling resistor 540 referenced to VCC and PFET 520. Scaling resistor 540 has a resistance rHIGHtc2.

This modified architecture operates in the same manner as current mirror PMOSFETs 350 and 360, but modifies the current output of PMOSFET 520 dependent on temperature.

Resistance rHIGHtc2 has a higher thermal coefficient of resistance than resistance rLOWtc2. At some reference temperature, such as the temperature at which resistance rHIGHtc and resistance rLOWtc are equal, as described above, resistance rHIGHtc2 and resistance rLOWtc2 are equal. At this temperature, the current through the resistance rHIGHtc 325, and NMOSFET 340 into resistance rLOWtc2 530 is replicated by PMOSFET 520 through resistance rHIGHtc2 540. As the temperature increases above this point, the ratio of rHIGHtc2/rLOWtc2 increases and, conversely, the current out of PMOSFET 520 decreases. The current out of PMOSFET 520, or IHIGHtc, becomes equal to: ISENSE*(RPROGRAM/RHIGHtc)*(RLOWtc2/RHIGHtc2).

As described above, the current out of NMOSFET 370, or ILOWtc, is ISENSE*(RPROGRAM/RLOWTC).

The corrected current is ISENSE+IHIGHtc−ILOWtc, or
ISENSE(1+RPROGRAM(RLOWtc2/(RHIGHtc+RHIGHtc2+)−(1/RLOWtc)).

This gives a higher rate of change with temperature compared to the first embodiment, which is:
ISENSE(1+RPROGRAM((1/RHIGHtc)−(1/RLOWtc))).

It may be noted that additional gain stages such as gain stage 500 may be added for additional increases in thermal gain.

This temperature-compensated current ICORRECTED is coupled to the controller's error amplifier circuitry in place of the sensed current ISENSE, as described above.

As will be appreciated from the foregoing description, the inability of a simple scaling resistor installed between the common node of a DC—DC converter to a controller sense port to provide compensation for the temperature-responsive behavior of the on-state resistance of the lower NFET in the converter, (which may be as high as forty percent over a typical operating range), is successfully addressed by the current-sensing circuit of the invention, which provides programmable, continuous compensation for temperature variations of an output switching MOSFET of a buck mode DC—DC converter.

By coupling copies of the sampled current, that has been sensed through a sense resistor coupled to the common MOSFET node of the DC—DC converter, to prescribed programming and scaling resistors coupled to high and low auxiliary sense amplifiers, which drive ‘high’ temperature coefficient (hightc’) and ‘low’ temperature coefficient (‘lowtc’) associated, controlled ‘hightc’ and ‘lowtc’ current paths, a corrected current can be derived as a combination of the sensed current and the controlled ‘hightc’ and ‘lowtc’ currents. Due to the directions of current flow of these three current components relative to output the node, a composite temperature-compensated output current ICORRECTED can be defined in as:
ICORRECTED=ISENSE−ILOWtc+IHIGHtc or, in terms of the resistors, as:
ICORRECTED=ISENSE*(1−(rPROGRAM/rLOWtc)+(rPROGRAM/rHIGHtc)).

Thus the ratio of ICORRECTED to ISENSE can be written as:
ICORRECTED/ISENSE=1−(rPROGRAM/rLOWtc)+(rPROGRAM/rHIGHtc).

In a second embodiment an additional gain stage is inserted in place of the current mirror circuitry that is used to supply the replicated current component IHIGHtc to the output node, so that the output current of the PMOSFET is modified in dependence on temperature. The corrected current is ISENSE+IHIGHtc−ILOWtc, or
ISENSE(1+RPROGRAM(RLOWtc2/(RHIGHtc+RHIGHtc2+)−(1/RLOWtc)).

As noted above, this gives a higher rate of change with temperature compared to the first embodiment, as:
ISENSE(1+RPROGRAM((1/RHIGHtc)−(1/RLOWtc))).

The temperature-compensated current ICORRECTED is coupled to the controller's error amplifier circuitry to track the temperature variations in the drain-source resistance of the lower MOSFET of the converter.

While I have shown and described several embodiments in accordance with the present invention, it is to be understood that the same is not limited thereto but is susceptible to numerous changes and modifications as known to a person skilled in the art. I therefore do not wish to be limited to the details shown and described herein, but intend to cover all such changes and modifications as are obvious to one of ordinary skill in the art.

Isham, Robert Haynes

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