A system and method is described for connecting a logic circuit simulation to a hardware peripheral that includes a computer running software for communicating data to and from the hardware peripheral. The software transmits the data received from the hardware peripheral to the device being simulated by the logic circuit simulation. The computer also transmits the data received from the device being simulated by the electronic circuit simulation to the hardware peripheral. This allows the user to test the device being simulated using real hardware for input and output instead of simulated hardware.
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49. A computer readable medium having computer instructions executable in a host computer for communicating data between a simulation of an electronic device carried out in a program executing in said host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device running at a higher speed than said simulation, the instructions performing:
receiving data from said hardware peripheral device;
transmitting said data received from said hardware peripheral to said electronic circuit simulation;
receiving data from said electronic circuit simulation; and
transmitting said data received from said electronic circuit simulation to said hardware peripheral device;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation and said transmitting said data received from said simulation are executed in a third thread.
40. An apparatus for communicating data between a simulation of an electronic device carried out by a program executing in a host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device running at a higher speed than said simulation, the apparatus comprising:
a. a memory;
b. computer instructions executable by said host computer for:
receiving data from said hardware peripheral device;
transmitting said data received from said hardware peripheral device to said electronic circuit simulation;
receiving data from said electronic circuit simulation; and
transmitting said data received from said electronic circuit simulation to said hardware peripheral device;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation and said transmitting said data received from said simulation are executed in a third thread.
21. A computer readable medium having computer instructions executable in a host computer for communicating data between a simulation of an electronic device carried out in a program executing in said host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device running at a higher speed than said simulation, the instructions performing:
receiving data from said hardware peripheral device;
transmitting said data received from said hardware peripheral to said electronic circuit simulation;
receiving data from said electronic circuit simulation; and
transmitting said data received from said electronic circuit simulation to said hardware peripheral device;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation is executed in a third thread, and said transmitting said data received from said simulation is executed in a fourth thread.
11. An apparatus for communicating data between a simulation of an electronic device carried out by a program executing in a host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device running at a higher speed than said simulation, the apparatus comprising:
a memory;
computer instructions executable by said host computer for:
receiving data from said hardware peripheral device;
transmitting said data received from said hardware peripheral device to said electronic circuit simulation;
receiving data from said electronic circuit simulation; and
transmitting said data received from said electronic circuit simulation to said hardware peripheral device;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation is executed in a third thread, and said transmitting said data received from said simulation is executed in a fourth thread.
31. A method for communicating data between a simulation of an electronic device carried out by a program executing in a host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device operating at a higher speed than said simulation, the method comprising:
receiving data from said hardware peripheral device using peripheral device interface software running on said computer;
transmitting said data received from said hardware peripheral device to said simulation through a programming language interface;
receiving data from said simulation through said programming language interface; and
transmitting said received data from said simulation to said hardware peripheral device using peripheral device interface software running on said host computer;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation and said transmitting said data received from said simulation are executed in a third thread.
1. A method for communicating data between a simulation of an electronic device carried out by a program executing in a host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device operating at a higher speed than said simulation, the method comprising:
receiving data from said hardware peripheral device using peripheral device interface software running on said computer;
transmitting said data received from said hardware peripheral device to said simulation through a programming language interface;
receiving data from said simulation through said programming language interface; and
transmitting said received data from said simulation to said hardware peripheral device using peripheral device interface software running on said host computer;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation is executed in a third thread, and said transmitting said data received from said simulation is executed in a fourth thread.
58. A method for communicating data between a simulation of an electronic device carried out by a program executing on a host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device running at a higher speed than said simulation, the method comprising:
receiving data from said hardware peripheral device using peripheral device interface software running on said computer;
storing said data received from said hardware peripheral device in a first buffer;
retrieving said data stored in said first buffer;
modifying said retrieved data to make said data suitable for transmission to said simulation;
transmitting said data received from said hardware peripheral to said simulation through a programming language interface;
receiving data from said simulation through said programming language interface;
storing said data received from said simulation in a second buffer;
retrieving said data stored in said second buffer;
modifying said retrieved data to make said data suitable for transmission to said hardware peripheral device; and
transmitting said received data from said simulation to said hardware peripheral device using peripheral device interface software running on said host computer;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation and said transmitting said data received from said simulation are executed in a third thread.
10. A method for communicating data between a simulation of an electronic device carried out by a program executing on a host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device running at a higher speed than said simulation, the method comprising:
receiving data from said hardware peripheral device using peripheral device interface software running on said computer;
storing said data received from said hardware peripheral device in a first buffer;
retrieving said data stored in said first buffer;
modifying said retrieved data to make said data suitable for transmission to said simulation;
transmitting said data received from said hardware peripheral to said simulation through a programming language interface;
receiving data from said simulation through said programming language interface;
storing said data received from said simulation in a second buffer;
retrieving said data stored in said second buffer;
modifying said retrieved data to make said data suitable for transmission to said hardware peripheral device; and
transmitting said received data from said simulation to said hardware peripheral device using peripheral device interface software running on said host computer;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation is executed in a third thread, and said transmitting said data received from said simulation is executed in a fourth thread.
60. A computer readable medium having computer instructions for communicating data between a simulation of an electronic device carried out by a program executing in a host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device running at a higher speed than said simulation, the instructions performing:
receiving data from said hardware peripheral device using peripheral device interface software running on said computer;
storing said data received from said hardware peripheral in a first buffer in memory;
retrieving said data stored in said first buffer;
modifying said retrieved data to make said data suitable for transmission to said simulation;
transmitting said data received from said hardware peripheral device to said simulation through a programming language interface;
receiving data from said simulation through said programming language interface;
storing said data received from said simulation in a second buffer in memory;
retrieving said data stored in said second buffer;
modifying said retrieved data to make said data suitable for transmission to said hardware peripheral device; and
transmitting said received data from said simulation to said hardware peripheral device using peripheral device interface software running on said host computer;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation and said transmitting said data received from said simulation are executed in a third thread.
59. An apparatus for communicating data between a simulation of an electronic device carried out by a program executing in a host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device running at a higher speed than said simulation, the apparatus comprising:
a. a computer having a memory; and
b. computer instructions executable by said host computer for:
receiving data from said hardware peripheral device using software running on said computer;
storing said data received from said hardware peripheral device in a first buffer in memory;
retrieving said data stored in said first buffer;
modifying said retrieved data to make said data suitable for transmission to said simulation;
transmitting said data received from said hardware peripheral device to said simulation through a programming language interface;
receiving data from said simulation through said programming language interface;
storing said data received from said simulation in a second buffer in memory;
retrieving said data stored in said second buffer;
modifying said retrieved data to make said data suitable for transmission to said hardware peripheral device; and
transmitting said received data from said simulation to said hardware peripheral device using software running on said host computer;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation and said transmitting said data received from said simulation are executed in a third thread.
30. A computer readable medium having computer instructions for communicating data between a simulation of an electronic device carried out by a program executing in a host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device running at a higher speed than said simulation, the instructions performing:
receiving data from said hardware peripheral device using peripheral device interface software running on said computer;
storing said data received from said hardware peripheral in a first buffer in memory;
retrieving said data stored in said first buffer;
modifying said retrieved data to make said data suitable for transmission to said simulation;
transmitting said data received from said hardware peripheral device to said simulation through a programming language interface;
receiving data from said simulation through said programming language interface;
storing said data received from said simulation in a second buffer in memory;
retrieving said data stored in said second buffer;
modifying said retrieved data to make said data suitable for transmission to said hardware peripheral device; and
transmitting said received data from said simulation to said hardware peripheral device using peripheral device interface software running on said host computer;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation is executed in a third thread, and said transmitting said data received from said simulation is executed in a fourth thread.
20. An apparatus for communicating data between a simulation of an electronic device carried out by a program executing in a host computer and a hardware peripheral device attached to said host computer, said hardware peripheral device running at a higher speed than said simulation, the apparatus comprising:
a. a computer having a memory;
b. computer instructions executable by said host computer for:
receiving data from said hardware peripheral device using software running on said computer;
storing said data received from said hardware peripheral device in a first buffer in memory;
retrieving said data stored in said first buffer;
modifying said retrieved data to make said data suitable for transmission to said simulation;
transmitting said data received from said hardware peripheral device to said simulation through a programming language interface;
receiving data from said simulation through said programming language interface;
storing said data received from said simulation in a second buffer in memory;
retrieving said data stored in said second buffer;
modifying said retrieved data to make said data suitable for transmission to said hardware peripheral device; and
transmitting said received data from said simulation to said hardware peripheral device using software running on said host computer;
wherein said receiving data from said hardware peripheral device is executed in a first thread, said transmitting said data received from said hardware peripheral device is executed in a second thread, said receiving data from said simulation is executed in a third thread, and said transmitting said data received from said simulation is executed in a fourth thread.
2. The method of
3. The method of
6. The method of
8. The method of
9. The method of
12. The apparatus of
a buffer in said memory; and
computer instructions executable by the computer for storing data received from said hardware peripheral device in said buffer.
13. The apparatus of
14. The apparatus of
a buffer in said memory; and
computer instructions executable by the computer for storing data received from said electronic circuit simulation in said buffer.
15. The apparatus of
16. The apparatus of
17. The apparatus of
18. The apparatus of
19. The apparatus of
22. The computer readable medium of
23. The computer readable medium of
24. The computer readable medium of
25. The computer readable medium of
26. The computer readable medium of
27. The computer readable medium of
28. The computer readable medium of
29. The computer readable medium of
32. The method of
33. The method of
36. The method of
38. The method of
39. The method of
41. The apparatus of
a. a buffer in said memory; and
b. computer instructions executable by the computer for storing data received from said hardware peripheral device in said buffer.
42. The apparatus of
43. The apparatus of
a. a buffer in said memory; and
b. computer instructions executable by the computer for storing data received from said electronic circuit simulation in said buffer.
44. The apparatus of
45. The apparatus of
46. The apparatus of
47. The apparatus of
48. The apparatus of
50. The computer readable medium of
51. The computer readable medium of
52. The computer readable medium of
53. The computer readable medium of
54. The computer readable medium of
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57. The computer readable medium of
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The present application is a reissue of U.S. patent application Ser. No. 10/158,648, entitled “Apparatus and Method for Connecting Hardware to a Circuit Simulation,” filed on May 31, 2002, now U.S. Pat. No. 7,266,490, issued Sep. 4, 2007, which is a continuation-in-part application of copending U.S. patent application, Ser. No. 09/751,573, entitled “Method for Connecting a Hardware Emulator to a Network”, filed on Dec. 28, 2000, now U.S. Patent 7,050,962, issued on May 23, 2006, which claims the benefit of Provisional Application No. 60/193,169, filed on Mar. 28, 2000.
Prior to reducing an integrated circuit design to a form suitable for fabrication, the integrated circuit design is often simulated in software on a computer to allow the design to be optimized and debugged. Typically, using a hardware description language (e.g., Verilog), the circuit designer prepares a description of the integrated circuit, which is then compiled into a software model to be simulated on the computer (e.g., an engineering workstation).
When an integrated circuit that connects to peripheral hardware, such as an LCD display or a Universal Serial Bus (USB) port, is simulated, the peripheral hardware is modeled in the hardware description language and communication with the peripheral hardware is also simulated. However, such a model of the peripheral hardware does not behave completely accurately and correctly. There are often logical, electrical, or timing differences between the simulation model and the physical peripheral hardware. When the integrated circuit is manufactured and connected to the actual peripheral hardware, these problems will become apparent and the integrated circuit will often need to be redesigned to compensate for them.
The present invention allows a logic circuit simulator running on a host computer (e.g., a personal computer) and simulating a circuit (“simulated device”) to connect to a physical peripheral hardware device. The present invention provides a method and an apparatus for transferring data between a circuit simulation and the peripheral hardware device. In one embodiment, an interface software program also installed on said host computer is provided to handle communication between the operating system drivers for the peripheral hardware device and the simulated device. The peripheral hardware device can be, for example, a computer display monitor.
According to the present invention, data sent to a simulated device from a physical peripheral hardware device is received by the interface software and stored in buffers in the existing memory in the host computer. Said interface software in said host computer repackages the data into a second format for transmission to said simulated device. In one embodiment, the data from said physical peripheral hardware device is sent to the operating system of said host computer. Said interface software intercepts said data and examines it. If said data is intended for said simulated device, said interface software loads it into said data buffers, subsequently repackages said data into a second format for transmission to said simulated device and sends said repackaged data to the simulated device. If said data from said physical peripheral hardware device is not intended for said simulated device, said interface software program sends said data on to said host computer operating system.
Similarly, the interface software in the host computer repackages data received from the simulated device into proper format for transmission to the physical peripheral hardware device. Under this arrangement, the existing memory in the host computer is used to buffer data communicated between said simulated device and said physical peripheral hardware device. In one embodiment, the data from said simulated device is sent to the interface software program. If said data is intended for said physical peripheral hardware device, said interface software program repackages said data and sends said data to said host computer operating system for transmission to said physical peripheral hardware device. Said operating system is notified that said data is intended for said physical peripheral hardware device because said interface software program uses a specific application program interface (API) of the operating system used specifically to access said physical peripheral hardware device.
In one embodiment, the interface software of the host computer is implemented as a multithread program including four executing threads. One thread is a task that receives data from the physical peripheral hardware device and stores said received data in a first buffer. A second thread is a task that polls said first buffer for said received data. This second thread repackages said received data and sends said repackaged data via the simulation interface to the simulated device. A third thread is a task that receives data from said simulated device via said simulation interface and stores said received data in a second buffer. A fourth thread is a task that polls said second buffer for said data received from said simulated device. Said fourth thread repackages said data received from said simulated device and sends said repackaged data to said physical peripheral hardware device using an API of the operating system software of said host computer.
In another embodiment, the interface software of the host computer is implemented as a multithread program, as in the previous embodiment, except that the second buffer is eliminated and the third and fourth threads are combined into a single thread. In this embodiment, the tasks of the single thread receive data from the simulated device via the simulation interface, repackages said received data and sends said repackaged to said physical peripheral hardware device using an API of the operating system software of said host computer. This approach is possible because a circuit simulation runs at a much slower speed than the physical peripheral hardware device, such that data received from the simulated device can be repackaged and sent to the physical peripheral hardware device before the next data packet's arrival from the circuit simulation.
In yet another embodiment, the interface software of the host computer is implemented as a multithreaded program having, in one instance, two executing threads. One thread is a task that receives data from the physical peripheral hardware device, stores said received data in a buffer, retrieves said stored data for repackaging, and sends said repackaged data via a simulation interface to the simulated device. Another thread is a task that receives data from said simulated device via said simulation interface from said simulated device, repackages said data and sends said repackaged data to said physical peripheral hardware device using an API of the operating system software of said host computer.
Further features and advantages of various embodiments of the invention are described in the detailed description below, which is given by way of example only.
The present invention will be understood more fully from the detailed description given below and from the accompanying drawings of the preferred embodiment of the invention, which, however, should not be taken to limit the invention to the specific embodiment but are for explanation and understanding only.
In the following detailed description, to simplify the description, like elements are provided like reference numerals.
Software that allows a logic circuit simulator running on a host computer (e.g., a personal computer) and simulating a circuit (“simulated device”) to connect to a physical peripheral hardware device is described. In the following description, numerous specific details are set forth, such as the peripheral interface, the operating system, the type of computer, etc., in order to provide a thorough understanding of the present invention. It will be obvious, however, to one skilled in the art that these specific details need not be used to practice the present invention. In other instances, well known structures, functions, and software programs have not been shown in detail in order not to unnecessarily obscure the present invention.
A circuit simulation program 203 runs at a higher level than the operating system and uses the operating system to communicate with the user to display information via a peripheral such as a monitor or a printer. Said simulation program also uses the operating system to get information from a user via the mouse or keyboard. The operating system 204 also allows said simulation 203 and other applications to be running simultaneously and allocates time and resources to all applications according to set priorities.
One embodiment of the invention is shown as SoftBridge program 200, an application program that runs on top of the operating system, which controls the computer resources allocated to it. The SoftBridge program 200 can communicate to the simulation 203 via a software interface called a programming language interface (PLI) 206.
Note that the SoftBridge program 200 can use the hardware peripheral APIs 202 to access the hardware peripherals indirectly. In some cases, to increase performance for example, it may be necessary for the SoftBridge program 200 to access the driver software 205 directly, bypassing the operating system 204 and the APIs provided by the operating system.
The user interface 201 is the part of the SoftBridge program 200 that allows the human user to enter information and control operation of the program 200. Said user interface 201 also gives results back to the human user.
In prior art, a circuit simulation of a device that drives a hardware peripheral would output raw data. An engineer would then look over the data and compare it manually to a specification for said hardware peripheral to determine whether the data is correct. This manual checking of data is a time consuming operation that is prone to human error and limits the amount of simulation that can be run because time in the development process must be allocated for humans to check the results. Another prior art method is to create a circuit simulation of the hardware peripheral (“simulated peripheral”) and have the simulated device drive the simulated peripheral and observe that the correct behavior occurs. This method requires that an engineer write a model for said hardware peripheral. Not only does this take time to develop said model, but the model itself is prone to human error because it may not be completely correct and may thus not accurately model the true behavior of the peripheral hardware. Because the circuit simulation software must now simulate not only the device that drives the software but also the peripheral hardware device being driven, the simulation software runs much slower.
In prior art, a simulated device that receives data from a hardware peripheral would need to have raw data written by an engineer and then used by the simulation software as stimuli for the device. This manual creation of data is a time consuming operation that is prone to human error and limits the amount of simulation that can be run because time in the development process must be allocated for humans to create the data. Another prior art method is to create a circuit simulation of the hardware peripheral and have the simulated peripheral drive the simulated device and observe that the behavior is correct. This method requires that an engineer write a model for the hardware peripheral. Not only does this take time to develop said model, but the model itself is prone to human error because it may not be completely correct and may thus not accurately model the true behavior of the peripheral hardware. Because the circuit simulation software must now simulate not only the device that drives the software but also the peripheral hardware device being driven, the simulation software runs much slower.
In other prior art, a hardware peripheral device is connected, pin by pin, to another hardware peripheral device called a hardware modeler interface, which is in turn connected to a host computer. Said host computer runs a circuit simulation of a device. Whenever said simulated device intends to stimulate said hardware peripheral, said simulation software notifies special hardware modeling software, which forces said hardware modeler interface to assert or deassert signals to said hardware peripheral according to the simulated device outputs. Similarly, whenever said hardware peripheral outputs change, said signals are sent to said hardware modeler interface, which notifies said hardware modeling software, which in turn notifies said simulation software, which stimulates said simulated device. This method requires very specialized software, the hardware modeling software, to interface between the simulation software and the hardware modeler interface. This hardware modeling software must continually be rewritten to be compatible with new operating systems, new host computers, or new simulation software. The hardware modeler interface is a costly, specialized piece of hardware that must physically be connected to the hardware peripheral. Said hardware modeler interface is limited to connecting to certain hardware peripheral devices by the type and size of the connectors that it has available. For example, to connect to an ISA card, said hardware modeler interface must have an ISA connector and to connect to a PCI card, said hardware modeler interface must have a PCI connector. To be able to connect to any kind of peripheral device would require said hardware modeler interface to comprise an extremely large circuit board with dozens of connectors, or consist of dozens of different boards for connecting to different peripheral hardware devices.
The present invention overcomes the limitations of the prior art by interfacing a real hardware peripheral to the circuit simulation of said device, taking advantage of standard software that is easily available and has already been fully tested. This standard software includes driver software and APIs that are written by the hardware peripheral manufacturer and are included in most standard operating systems. As shown in
Thread 4 consists of a data reception routine 307 that retrieves data from circuit simulator 203 via a PLI. Thread 4 may obtain said data by polling the circuit simulator or alternatively via an interrupt mechanism that signals the thread whenever data is available from said circuit simulator. Said data reception routine 307 stores said received data in shared memory buffer 306. Thread 3 consists of data transmission routine 305 that polls said shared buffer 306. When data is available in said shared buffer 306, said data reception routine 305 retrieves said data. If necessary, said data reception routine 305 modifies said data to be acceptable to the hardware peripheral. Said data reception routine 305 then transmits said data to said hardware peripheral either via the operating system API 202 or directly to the hardware drivers.
In this embodiment, the SoftBridge program 200 has a stop routine 308 that takes input from the user in order to stop all executing threads of the program.
Thread 3 consists of a data reception routine 307 that retrieves data from circuit simulator 203 via a PLI and a data transmission routine 305 that transmits said data to the hardware peripheral either via the operating system API 202 or directly to the hardware drivers. Thread 3 may obtain said data by polling the circuit simulator or alternatively via an interrupt mechanism that signals the thread whenever data is available from said circuit simulator. Said data reception routine 307 sends said received data to said data reception routine 305 that modifies said data to be acceptable to the hardware peripheral, if necessary, then transmits said data to said hardware peripheral either via the operating system API 202 or directly to the hardware drivers. This embodiment takes advantage of the fact that the circuit simulator 203 is running much slower than the software of the SoftBridge program 200 and that the hardware peripheral can receive data at a faster rate than the software can send it. Therefore there is only a single thread to retrieve data from the circuit simulator and send it to the hardware peripheral. In this embodiment, the SoftBridge program 200 can perform the entire operation of thread 3 without slowing down the circuit simulator or the hardware peripheral. Unlike the embodiment shown in
In this embodiment, the SoftBridge program 200 has a stop routine 308 that takes input from the user in order to stop all executing threads of the program.
Thread 2 consists of a data reception routine 307 that retrieves data from circuit simulator 203 via a PLI and a data transmission routine 305 that transmits said data to the hardware peripheral either via the operating system API 202 or directly to the hardware drivers. Thread 2 may obtain said data by polling the circuit simulator or alternatively via an interrupt mechanism that signals the thread whenever data is available from said circuit simulator. Said data reception routine 307 sends said received data to said data reception routine 305 that modifies said data in order to be acceptable to the hardware peripheral, if necessary, then transmits said data to said hardware peripheral either via the operating system API 202 or directly to the hardware drivers.
In this embodiment, the SoftBridge program 200 has a stop routine 308 that takes input from the user in order to stop all executing threads of the program.
Various modifications and adaptations of the operations described here would be apparent to those skilled in the art based on the above disclosure. Many variations and modifications within the scope of the present SoftBridge program 200 are therefore possible. The present SoftBridge program 200 is set forth by the following claims.
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
4590581, | May 09 1983 | Synopsys, Inc | Method and apparatus for modeling systems of complex circuits |
4635218, | May 09 1983 | Synopsys, Inc | Method for simulating system operation of static and dynamic circuit devices |
4744084, | Mar 01 1985 | Mentor Graphics Corporation | Hardware modeling system and method for simulating portions of electrical circuits |
5299313, | Jul 28 1992 | U S ETHERNET INNOVATIONS, LLC | Network interface with host independent buffer management |
5303347, | Dec 27 1991 | HEWLETT-PACKARD DEVELOPMENT COMPANY, L P | Attribute based multiple data structures in host for network received traffic |
5307459, | Jul 28 1992 | U S ETHERNET INNOVATIONS, LLC | Network adapter with host indication optimization |
5479355, | Sep 14 1993 | System and method for a closed loop operation of schematic designs with electrical hardware | |
5740448, | Jul 07 1995 | Oracle America, Inc | Method and apparatus for exclusive access to shared data structures through index referenced buffers |
5748806, | Oct 15 1992 | PMC-SIERRA, INC | Deskew circuit in a host interface circuit |
5748875, | Jun 12 1996 | SIMPOD, INC | Digital logic simulation/emulation system |
5761486, | Aug 21 1995 | Fujitsu Limited | Method and apparatus for simulating a computer network system through collected data from the network |
5822520, | Dec 26 1995 | Oracle America, Inc | Method and apparatus for building network test packets |
5838950, | Oct 15 1992 | PMC-SIERRA, INC | Method of operation of a host adapter integrated circuit |
5848236, | Mar 22 1996 | Oracle America, Inc | Object-oriented development framework for distributed hardware simulation |
5850345, | Jan 29 1996 | Fuji Xerox Co., Ltd. | Synchronous distributed simulation apparatus and method |
5881269, | Sep 30 1996 | International Business Machines Corporation | Simulation of multiple local area network clients on a single workstation |
5889954, | Dec 20 1996 | Ericsson Inc. | Network manager providing advanced interconnection capability |
5907696, | Jul 03 1996 | GOOGLE LLC | Network device simulator |
5963726, | Mar 20 1998 | National Instruments Corporation | Instrumentation system and method including an improved driver software architecture |
6047387, | Dec 16 1997 | Winbond Electronics Corp. | Simulation system for testing and displaying integrated circuit's data transmission function of peripheral device |
6108309, | Dec 08 1997 | Verizon Patent and Licensing Inc | SONET network element simulator |
6141689, | Oct 01 1993 | International Business Machines Corp. | Method and mechanism for allocating switched communications ports in a heterogeneous data processing network gateway |
6151567, | May 27 1994 | Hamilton Sundstrand Corporation; Sundstrand Corporation | Data communication analysis and simulation tool |
6202044, | Jun 13 1997 | SIMPOD, INC | Concurrent hardware-software co-simulation |
6230114, | Oct 29 1999 | Synopsys, Inc | Hardware and software co-simulation including executing an analyzed user program |
6243833, | Aug 26 1998 | International Business Machines Corporation | Apparatus and method for self generating error simulation test data from production code |
6263302, | Oct 29 1999 | Synopsys, Inc | Hardware and software co-simulation including simulating the cache of a target processor |
6279122, | Aug 26 1998 | International Business Machines Corporation | Apparatus and method for self generating error simulation test data from production code |
6307877, | Oct 23 1995 | Keysight Technologies, Inc | Programmable modem apparatus for transmitting and receiving digital data, design method and use method for the modem |
6324492, | Jan 20 1998 | Microsoft Technology Licensing, LLC | Server stress testing using multiple concurrent client simulation |
6345242, | Mar 22 1996 | Sun Microsystems, Inc. | Synchronization mechanism for distributed hardware simulation |
6347388, | Jun 03 1997 | VERISITY LTD | Method and apparatus for test generation during circuit design |
6389379, | May 02 1997 | Cadence Design Systems, INC | Converification system and method |
6405145, | Mar 20 1998 | National Instruments Corporation | Instrumentation system and method which performs instrument interchangeability checking |
6418392, | Mar 20 1998 | National Instruments Corporation | System and method for simulating operations of an instrument |
6560641, | Mar 29 2000 | Unisys Corporation | System, method, and adapter card for remote console emulation including remote control of a peripheral device |
6584436, | Oct 29 1999 | Synopsys, Inc | Hardware and software co-simulation including executing an analyzed user program |
6597727, | Oct 04 1995 | Agilent Technologies, Inc | Programmable modem apparatus for transmitting and receiving digital data, design method and use method for the modem |
6757367, | Sep 20 1999 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | Packet based network exchange with rate synchronization |
6772107, | Nov 08 1999 | Oracle International Corporation | System and method for simulating activity on a computer network |
6850577, | Sep 20 1999 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | Voice and data exchange over a packet based network with timing recovery |
6862635, | Nov 13 1998 | CIT LENDING SERVICES CORPORATION | Synchronization techniques in a multithreaded environment |
6898233, | Oct 04 1995 | Keysight Technologies, Inc | Programmable modem apparatus for transmitting and receiving digital data, design method and use method for the modem |
6904110, | Jul 31 1997 | SAPPHIRE COMMUNICATIONS, INC | Channel equalization system and method |
20020067757, | |||
20020101824, | |||
20040143655, | |||
20040148610, |
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