Systems and methods for self-test of a radar altimeter

Abstract

systems and methods for testing a signal generated by a direct digital synthesizer (DDS) in a radar altimeter. In an embodiment of the method, a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal is generated. The generated voltage signal is integrated over a predefined range of clock signals. The integration is sampled at a previously defined clock tick. The sample is compared to a desired value and an indication that the radar altimeter is malfunctioning is provided if the comparison exceeds a predefined threshold value. The radar altimeter system is deactivated if an indication that the radar altimeter is malfunctioning has been provided.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is related to co-pending U.S. patent application Ser. No. 11/306,185. The contents of which are hereby incorporated by reference.

BACKGROUND OF THE INVENTION

Frequency Modulated/Continuous Wave (FM/CW) Radar Altimeters need ways in which to verify proper operation. In current radar altimeters, self-testing is performed in a system that uses a Bulk Acoustic Wave (BAW) device that is relatively expensive. These systems fail to accurately detect improper system operation.

Therefore, there exists a need to replace expensive BAW devices and to implement a self-test that more effectively identifies when the radar altimeter is performing outside of acceptable limits.

BRIEF SUMMARY OF THE INVENTION

The present invention provides systems and methods for testing a signal generated by a Direct Digital Synthesizer (DDS) in a radar altimeter. In an embodiment of the method, a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal is generated. The generated voltage signal is integrated over a predefined number of clock signals. The integration is sampled at a previously defined clock tick. The sample is compared to a desired value and an indication that the radar altimeter is malfunctioning is provided if the comparison exceeds a predefined threshold value.

The radar altimeter system is deactivated if an indication that the radar altimeter is malfunctioning has been provided.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

The preferred and alternative embodiments of the present invention are described in detail below with reference to the following drawings.

FIG. 1 is a block diagram of an example radar altimeter formed in accordance with the present invention;

FIG. 2 is a flow diagram of an example process performed by the system shown in FIG. 1.

FIG. 3 illustrates components of the system shown in FIG.

1;

FIGS. 4A-D illustrate timing diagrams of signals produced by some of the components shown in FIG. 3; and

FIG. 5 illustrates exemplary details of one of the components shown in FIG. 3.

FIG. 6 illustrates an embodiment of the transmitter 24 from FIG. 1. In this embodiment, the transmitter 24 includes a Direct Digital Synthesizer (DDS) 600, a clock 608, a first component 614 configured to generate a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS 600 based on a clock-based reference signal, a second component that is an integrator 618 configured to integrate the generated voltage signal over a predefined range of clock signals, a third component that 624 configured to sample the integration at a previously defined clock tick; a forth component that is a comparator 620 configured to compare the sample to a desired value, and a fifth component 626 configured to provide an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.

FIG. 7 illustrates a flow diagram of an example process 700. The process begins at 702 with generating a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal. The process proceeds to 704 with integrating the generated voltage signal over a predefined range of clock signals. The process proceeds to 706 with sampling the integration at a previously defined clock tick and to 708 with comparing the sample to a desired value. The process proceeds to 710 with providing an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.

While the preferred embodiment of the invention has been illustrated and described, as noted above, many changes can be made without departing from the spirit and scope of the invention. Accordingly, the scope of the invention is not limited by the disclosure of the preferred embodiment. Instead, the invention should be determined entirely by reference to the claims that follow.

Claims

1. A radar altimeter system including a transmitter having a direct digital synthesizer (DDS) and a digital Phase lock loop, the system comprising:

a first component configured to generate a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal;

a second component configured to integrate the generated voltage signal over a predefined range of clock signals;

a third component configured to sample the integration at a previously defined clock tick;

a fourth component configured to compare the sample to a desired value; and

a fifth component configured to provide an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.

2. The system of claim 1, further comprising a device configured to deactivate the radar altimeter system if an indication that the radar altimeter is malfunctioning has been provided.

3. The system of claim 1, wherein the second component includes a device configured to perform a reset function.

4. A method for testing a signal generated by a direct digital synthesizer (DDS) in a radar altimeter, the method comprising:

generating a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal;

integrating the generated voltage signal over a predefined range of clock signals;

sampling the integration at a previously defined clock tick;

comparing the sample to a desired value; and

providing an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.

5. The method of claim 4, further comprising deactivating the radar altimeter system if an indication that the radar altimeter is malfunctioning has been provided.

6. The method of claim 4, further comprising performing a reset function.

7. A method for testing a signal generated by a direct digital synthesizer (DDS) in a radar altimeter, the method comprising:

activating the radar altimeter in a normal mode of operation;

integrating a generated voltage signal between a turnaround point and a clock tick;

comparing a detected integration value to a reference voltage value; and

deactivating the radar altimeter system if the comparison is outside a predefined threshold value.

8. The method of claim 7, wherein activating further comprises generating a voltage signal.

9. The method of claim 8, wherein generating further comprises generating the voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock based reference signal.

10. The method of claim 7, wherein comparing further comprises sampling the integration at a previously defined clock tick.

11. The method of claim 7, further comprising performing a reset function.

12. A radar altimeter system including a transmitter having a direct digital synthesizer, (DDS) and a digital Phase lock loop, the system comprising:

a first component configured to generate a voltage signal derived by comparing a fixed reference frequency signal to a ramped frequency signal generated by the DDS based on a clock-based reference signal;

a second component configured to integrate the generated voltage signal over a predefined range of clock ticks;

a third component configured to generate an output signal representing a comparison of the integration to a desired value;

a fourth component configured to sample the comparison at a previously defined clock tick; and

a fifth component configured to provide an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.

13. The system of claim 12, further comprising a device configured to deactivate the radar altimeter system if an indication that the radar altimeter is malfunctioning has been provided.

14. The system of claim 12, wherein the second component includes a device configured to perform a reset function.

15. A method for testing a signal generated by a direct digital synthesizer, (DDS) in a radar altimeter, the method comprising:

generating a voltage signal derived by comparing a fixed reference frequency signal to a ramped frequency signal generated by the DDS based on a clock-based reference signal;

integrating the generated voltage signal over a predefined range of clock signals;

generating an output signal representing a comparison of the integration at a previously defined clock tick to a desired value; and

providing an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.

16. The method of claim 15, further comprising deactivating the altimeter if an indication that the radar altimeter is malfunctioning been provided.

17. The method of claim 15, further comprising performing a reset function.