A power control circuit for an optical information recording device is disclosed. A power sampling signal from a photodiode is transmitted to a peal envelope acquiring circuit and a bottom envelope acquiring circuit and then sampled and held, which is fed-back to a laser diode driving circuit. The laser diode driving circuit alters a driving signal emitted to the laser diode according to the fed-back signal to adjust the power of the optical signal emitted from the laser diode. Therefore, cost is reduced and the power control circuit is particularly suitable for high-speed recordable optical disk drive.
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0. 22. A method for controlling a bias power of an optical disk device, the method comprising:
generating a power sampling signal by sensing the power generated by the optical disk device; and
controlling the bias power of the optical disk device based on an average level of the power sampling signal within a plurality of bias periods, wherein the frequency of the average level of the power sampling signal is lower than the frequency of the power sampling signal.
0. 21. A method for controlling a write power of an optical disk device, the method comprising:
generating a power sampling signal by sensing the power generated by the optical disk device; and
controlling the write power of the optical disk device based on an average level of the power sampling signal within a plurality of write periods, wherein the frequency of the average level of the power sampling signal is lower than the frequency of the power sampling signal.
0. 15. A method for controlling a power of an optical disk device for writing data to an optical disk, the method comprising:
generating a power sampling signal according to the power of the optical disk device for writing data to the optical disk; and
controlling the power of the optical disk device based on an envelope of the power sampling signal, wherein the frequency of the envelope of the power sampling signal is lower than the frequency of the power sampling signal.
0. 30. A power control circuit for controlling a bias power of an optical disk device, the power control circuit comprising:
an element for sensing the power generated by the optical disk device to generate a power sampling signal; and
a controlling circuit for controlling the bias power of the optical disk device based on an average level of the power sampling signal within a plurality of bias periods, wherein the frequency of the average level of the power sampling signal is lower than the frequency of the power sampling signal.
0. 29. A power control circuit for controlling a write power of an optical disk device, the power control circuit comprising:
an element for sensing the power generated by the optical disk device to generate a power sampling signal; and
a controlling circuit for controlling the write power of the optical disk device based on an average level of the power sampling signal within a plurality of write periods, wherein the frequency of the average level of the power sampling signal is lower than the frequency of the power sampling signal.
0. 23. A power control circuit for controlling a power of an optical disk device for writing data to an optical disk, the power control circuit comprising:
an element for generating a power sampling signal according to the power of the optical disk device for writing data to the optical disk; and
a controlling circuit for controlling the power of the optical disk device based on an envelope of the power sampling signal, wherein the frequency of the envelope of the power sampling signal is lower than the frequency of the power sampling signal.
0. 1. A method for controlling a bias power of an optical disk device, comprising:
generating a bottom envelope signal from a power sampling signal sensed by a photodiode of the optical disk device;
sampling the bottom envelope signal; and
controlling a bias power of the optical disk device responsive to the sampled bottom envelope signal,
wherein a frequency of the bottom envelope signal is lower than that of the power sampling signal.
0. 2. The method according to
obtaining a negative half-wave of the power sampling signal;
selecting a candidate signal from the negative half-wave of the power sampling signal and the bottom envelope signal; and
obtaining a bottom value of the candidate signal as a next bottom envelope signal.
0. 3. The method according to
0. 4. A method for controlling a write power of an optical disk device, comprising:
generating a peak envelope signal from a power sampling signal sensed by a photodriode of the optical disk device;
sampling the peak envelope signal; and
controlling a write power of the optical disk device responsive to the sampled peak envelope signal,
wherein a frequency of the peak envelope signal is lower than that of the power sampling signal.
0. 5. The method according to
obtaining a postive half-wave of the power sampling signal;
selecting a candidate signal from the positive half-wave of the power sampling signal and the peak envelope signal; and
obtaining a peak value of the candidate signal as a next peak envelope signal.
0. 6. The method according to
0. 7. A bias power control circuit of an optical disk drive comprising:
a bottom envelope acquiring circuit for outputting a bottom envelope signal responsive to a power sampling signal sensed by a photodiode of the optical disk device; and
a bias-period sample-and-hold circuit for sampling and outputting the bottom envelope signal wherein the bias power is controlled according to the sampled bottom envelope signal, and
wherein a frequency of the bottom envelope signal is lower than that of the power sampling signal.
0. 8. The bias power control circuit of
a selector for outputting a candidate signal selected from the bottom envelope signal and a negative half-wave of the power sampling signal; and
a bottom detector for obtaining a bottom value of the candidate signal as a next bottom envelope signal.
0. 9. The basis power control circuit of
0. 10. The bias power control circuit of
0. 11. A write power control circuit for an optical disk drive comprising:
a peak envelope acquiring circuit for outputting a peak envelope signal in responsive to a power sampling signal by a photodiode of the optical disk device; and
a write-period sample-and-hold circuit for sampling and outputting the peak envelope signal wherein the write power is controlled according to the sampled peak envelope signal, and wherein a frequency of the peak envelope signal is lower than that of the power sampling signal.
0. 12. The write power control circuit of
a selector for outputting a candidate signal selected from the peak envelope signal and a positive half-wave of the power sampling signal; and
a peak detector for obtaining a peak value of the candidate signal as a next peak envelope signal.
0. 13. The write power control circuit of
0. 14. The write power control circuit of
0. 16. The method according to claim 15, wherein the step of generating comprises:
generating the power sampling signal according to the power of the optical disk device for writing data to the optical disk sensed by a photodiode of the optical disk device.
0. 17. The method according to claim 15, wherein the power of the optical disk device comprises a write power of the optical disk device and the envelope of the power sampling signal comprises a peak envelope of the power sampling signal, the step of controlling comprising:
controlling the write power of the optical disk device based on the peak envelope of the power sampling signal.
0. 18. The method according to claim 17, wherein the step of controlling further comprises:
obtaining a positive half-wave of the power sampling signal;
selecting a output signal from the positive half-wave of the power sampling signal and a peak envelope signal corresponding to the peak envelope of the power sampling signal; and
obtaining a peak level of the output signal as a next peak envelope signal.
0. 19. The method according to claim 15, wherein the power of the optical disk device comprises a bias power of the optical disk device and the envelope of the power sampling signal comprises a bottom envelope of the power sampling signal, the step of controlling comprising:
controlling the bias power of the optical disk device based on the bottom envelope of the power sampling signal.
0. 20. The method according to claim 19, wherein the step of controlling further comprises:
obtaining a negative half-wave of the power sampling signal;
selecting a output signal from the negative half-wave of the power sampling signal and a bottom envelope signal corresponding to the bottom envelope of the power sampling signal; and
obtaining a bottom level of the output signal as a next bottom envelope signal.
0. 24. The power control circuit according to claim 23, wherein the element comprises a photodiode.
0. 25. The power control circuit according to claim 23, wherein the power of the optical disk device comprises a write power of the optical disk device and the envelope of the power sampling signal comprises a peak envelope of the power sampling signal, the controlling circuit controlling the write power of the optical disk device based on the peak envelope of the power sampling signal.
0. 26. The power control circuit according to claim 25, wherein the controlling circuit comprises:
a positive half-wave rectifier for obtaining a positive half-wave of the power sampling signal;
a multiplexer for selecting a output signal from the positive half-wave of the power sampling signal and a peak envelope signal corresponding to the peak envelope of the power sampling signal; and
a peak detector for obtaining a peak level of the output signal as a next peak envelope signal.
0. 27. The power control circuit according to claim 23, wherein the power of the optical disk device comprises a bias power of the optical disk device and the envelope of the power sampling signal comprises a bottom envelope of the power sampling signal, the controlling circuit is controlling the bias power of the optical disk device based on the bottom envelope of the power sampling signal.
0. 28. The power control circuit according to claim 27, wherein the controlling circuit comprises:
a negative half-wave rectifier for obtaining a negative half-wave of the power sampling signal;
a multiplexer for selecting a output signal from the negative half-wave of the power sampling signal and a bottom envelope signal corresponding to the bottom envelope of the power sampling signal; and
a bottom detector for obtaining a bottom level of the output signal as a next bottom envelope signal.
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This is a continuation of application Ser. No. 10/082,331, Filed Feb. 26, 2002 now U.S. Pat. No. 6,661,757.
1. Field of the Invention
This invention relates in general to a power control circuit for an optical information recording device. More specifically, this invention relates to a power control circuit suitable for a high-speed optical information recording device.
2. Description of Related Art
The optical information recording apparatus, such as a recordable (or re-writable) optical disk drive, becomes wide-used and popular because of a high demand of high capacity back-up. When a recordable optical disk drive records data or information to a Recordable/Re-Writable Compact Disc (CD-R/CD-RW), beam for recording data is generated by a laser diode. The laser diode has to provide three optical signals with different power during the entire recording process. The data region of an optical disc will alter its state in response to the optical signal with specified power.
However, the characteristic of the laser diode varies with the environment temperature and time. During the recording process, as the recording time increases, the temperature of the laser diode increases. Namely, under the condition that the driving signals inputted to the laser diode are the same, the laser diode outputs optical signals having different power due to different temperature. When the laser diode is aged, the optoelectronic characteristic of the laser diode may change. Therefore, a power control circuit for compensating power variation due to change of the optical characteristic of the laser diode is highly required. If the bias power is not compensated, the laser diode may completely turn off during certain periods, and to turn on the laser diode again requires a larger current or a longer time.
The erase-period sample-and-hold circuit 204 is controlled by an erase sampling control signal ESC to sample the power sampling signal PI within the erase period, by which an erase-period sample-and-hold signal EPSH is generated and then fed-back to a feedback control circuit 205. The feedback control circuit 205 converts the erase-period sample-and-hold signal EPSH to a signal that is acceptable to the laser diode driving circuit 202 and then transmits the converted signal to the laser diode driving circuit 202. The write-period sample-and-hold circuit 206 is controlled by a write sampling control signal WSC to sample the power sampling signal PI within the write period, by which a write-period sample-and-hold signal WPSH is generated and then fed-back to a feedback control circuit 205. The feedback control circuit 205 converts the write-period sample-and-hold signal WPSH to a signal that is acceptable to the laser diode driving circuit 202 and then transmits the converted signal to the laser diode driving circuit 202. The bias-period sample-and-hold circuit 208 is controlled by a bias sampling control signal BSC to sample the power sampling signal PI within the bias period, by which a bias-period sample-and-hold signal BPSH is generated and then fed-back to the feedback control circuit 205. The feedback control circuit 205 converts the bias-period sample-and-hold signal EPSH to a signal that is acceptable to the laser diode driving circuit 202 and then transmits the converted signal to the laser diode driving circuit 202. Accordingly, the laser diode driving circuit 202 alters the driving signal that is outputted to the laser diode D1 according to the erase-period sample-and-hold signal EPSH, the write-period sample-and-hold signal WPSH, and the bias-period sample-and-hold signal BPSH so as to adjust the erase power, the write power and the bias power of the optical signal, by which the compensation for the optical signal is completed.
The sampling time for the general sample-and-hold circuit has to be larger than a specified value so that the sample-and-hold circuit can operate normally. As the technology of the recordable optical disk drive is highly developed, a high-speed recordable optical disk drive becomes the main product gradually in the market. However, if the recordable optical disk drive is operated in high speed, the frequency of power sampling signal PI increases, causing that intervals of the write period and the bias period are shortened. In the situation, because the general sample-and-hold circuit is not fast enough, the sampling time becomes too long so that the signal levels in the write period and the bias period of the sampling signal PI cannot be correctly sampled.
According to the foregoing description, an object of this invention is to provide a power control circuit for an optical information recording apparatus. Due to its low cost, the power control circuit of the invention is suitable for a high-speed optical information recording apparatus.
According to the object(s) mentioned above, a power control circuit is provided. The power control circuit is used for an optical disk drive, wherein the optical disk drive has a diode driving circuit, a light emitting diode and a photo diode. The diode driving circuit is used for outputting a driving signal to the light emitting diode, the light emitting diode generates an optical signal corresponding to the driving signal, and the photo diode is used for sensing the optical signal to generate a power sampling signal correspondingly. The power control circuit comprises an erase-period sample-and-hold circuit, a peak envelope acquiring circuit, a bottom envelope acquiring circuit, a write-period sample-and-hold circuit and a bias-period sample-and-hold circuit. The erase-period sample-and-hold circuit is used for receiving the power sampling signal, and then outputting an erase-period sample-and-hold signal to the diode driving circuit. The peak envelope acquiring circuit is used for receiving the power sampling signal and outputting a peak envelope signal. The bottom envelope acquiring circuit is used for receiving the power sampling signal and outputting a bottom envelope signal. The write-period sample-and-hold circuit is used for receiving the peak envelope signal, and outputting a write-period sample-and-hold signal to the diode driving circuit. The bias-period sample-and-hold circuit is used for receiving the bottom envelope signal, and outputting a bias-period sample-and-hold signal to the diode driving circuit. Thereby, the diode driving circuit alters the driving signal according to the erase-period sample-and-hold signal, the write-period sample-and-hold signal, and the bias-period sample-and-hold signal so that power of the optical signal is adjusted.
The invention further provides a power control circuit for an optical disk drive, wherein the optical disk drive has a diode driving circuit, a light emitting diode and a photo diode. The diode driving circuit is used for outputting a driving signal to the light emitting diode, the light emitting diode generates an optical signal corresponding to the driving signal, and the photo diode is used for sensing the optical signal to generate a power sampling signal correspondingly. The power control circuit comprises an erase-period sample-and-hold circuit, a peak envelope sample-and-hold circuit and a bottom envelope sample-and-hold circuit. The erase-period sample-and-hold circuit is used for receiving the power sampling signal, and then outputting an erase-period sample-and-hold signal to the diode driving circuit. The peak envelope sample-and-hold circuit is used for receiving the power sampling signal and outputting a write-period sample-and-hold signal to the diode driving circuit. The bottom envelope sample-and-hold circuit is used for receiving the power sampling signal and outputting a bias-period sample-and-hold signal to the diode driving circuit. Thereby, the diode driving circuit alters the driving signal according to the erase-period sample-and-hold signal, the write-period sample-and-hold signal, and the bias-period sample-and-hold signal so that power of the optical signal is adjusted.
While the specification concludes with claims particularly pointing out and distinctly claiming the subject matter which is regarded as the invention, the objects and features of the invention and further objects, features and advantages thereof will be better understood from the following description taken in connection with the accompanying drawings in which:
A power sampling signal from a photodiode is transmitted to a peal envelope acquiring circuit and a bottom envelope acquiring circuit and then sampled and held, which is fed-back to a laser diode driving circuit. The laser diode driving circuit alters a driving signal emitted to the laser diode according to the fed-back signal to adjust the power of the optical signal emitted from the laser diode. Therefore, a low-cost and high-speed recordable optical disk drive can be made.
<<First Embodiment>>
The peak envelope acquiring circuit 510 is used for detecting an envelope formed by a positive peak of the power sampling signal PI so that a peak envelope signal PE is generated and outputted. The bottom envelope acquiring circuit 512 is used for detecting an envelope formed by a negative peak of the power sampling signal PI so that a bottom envelope signal BE is generated and outputted. The peak envelope signal PE and the bottom envelope signal BE are respectively transmitted to the write-period sample-and-hold circuit 506 and the bias-period sample-and-hold circuit 508.
Additionally, the erase-period sample-and-hold circuit 504 is controlled by an erase sample-and-hold control signal ESC to sample the power sampling signal PI within the erase period, by which an erase-period sample-and-hold signal EPSH is generated and fed-back to the feedback control circuit 505. The feedback control circuit 505 converts the erase-period sample-and-hold signal EPSH to a signal that is acceptable to the laser diode driving circuit 502 and then transmits the converted signal to the laser diode driving circuit 502. The erase write-period sample-and-hold circuit 506 is controlled by a write sample-and-hold control signal WSC to sample the peak envelope signal PE, by which a write-period sample-and-hold signal WPSH is generated and fed-back to the feedback control circuit 507. The feedback control circuit 507 converts the write-period sample-and-hold signal WPSH to a signal that is acceptable to the laser diode driving circuit 502 and then transmits the converted signal to the laser diode driving circuit 502. The bias-period sample-and-hold circuit 508 is controlled by a bias sample-and-hold control signal BSC to sample the bottom envelope signal BE, by which a bias-period sample-and-hold signal BPSH is generated and fed-back to the feedback control circuit 507. The feedback control circuit 507 converts the bias-period sample-and-hold signal BPSH to a signal that is acceptable to the laser diode driving circuit 502 and then transmits the converted signal to the laser diode driving circuit 502. Accordingly, the laser diode driving circuit 502 alters the driving signal that is outputted to the laser diode D1 according to the erase-period sample-and-hold signal EPSH, the write-period sample-and-hold signal WPSH, and the bias-period sample-and-hold signal BPSH so as to adjust the magnitudes of the erase power, the write power and the bias power of the optical signal, by which the compensation for the optical signal is completed.
As described above, in stead of directly sampling the power sampling signal PI having a much higher frequency, the peak envelope signal PE and the bottom envelope signal BE that have lower frequencies are respectively sampled by the write-period sample-and-hold circuit 506 and the bias-period sample-and-hold circuit 508. Accordingly, it can effectively prevent from that the frequency of the power sampling signal PI is too high to get its signal level accurately by the sample-and-hold circuit. According to the invention, due to low frequencies of the peak envelope signal PE and the bottom envelope signal BE, a general low-speed sample-and-hold circuit can be normally operated to compensate the optical signals emitted from the laser diode D1. Unlike the conventional one, no sample-and-hold circuit that is operated under high frequency is required, and therefore cost for high-speed sample-and-hold circuit can be saved.
Similarly, the bottom envelope acquiring circuit 512 is similar to the peak envelope acquiring circuit 510, which a negative half-wave rectifier 702 is used for replacing the positive half-wave rectifier 702 in
<<Second Embodiment>>
The erase-period sample-and-hold circuit 904 is controlled by an erase sample-and-hold control signal ESC to sample the power sampling signal PI within the erase period, by which an erase-period sample-and-hold signal EPSH is generated and fed-back to the feedback control circuit 905. The feedback control circuit 905 converts the erase-period sample-and-hold signal EPSH to a signal that is acceptable to the laser diode driving circuit 902 and then transmits the converted signal to the laser diode driving circuit 902.
The peak envelope sample-and-hold circuit 906 is controlled by a write sample-and-hold control signal WSC to sample the power sampling signal PI within the write period, by which a write-period sample-and-hold signal WPSH is generated and fed-back to the feedback control circuit 907. The feedback control circuit 907 converts the write-period sample-and-hold signal WPSH to a signal that is acceptable to the laser diode driving circuit 902 and then transmits the converted signal to the laser diode driving circuit 902.
The bottom envelope sample-and-hold circuit 908 is controlled by a bias sample-and-hold control signal BSC to sample the power sampling signal PI within the bias period, by which a bias-period sample-and-hold signal BPSH is generated and fed-back to the feedback control circuit 909. The feedback control circuit 909 converts the bias-period sample-and-hold signal BPSH to a signal that is acceptable to the laser diode driving circuit 902 and then transmits the converted signal to the laser diode driving circuit 902.
Accordingly, the laser diode driving circuit 902 alters the driving signal that is outputted to the laser diode D3 according to the erase-period sample-and-hold signal EPSH, the write-period sample-and-hold signal WPSH, and the bias-period sample-and-hold signal BPSH so as to adjust the erase power, the write power and the bias power of the optical signal, by which the compensation for the optical signal is completed.
Similarly, as shown in
When the bias sampling control signal BSC is logic “1”, the multiplexer 1014 outputs the power sampling signal PI as the output signal S′, and when the bias sampling control signal BSC is logic “0”, the multiplexer 1014 outputs the bias-period sample-and-hold signal BPSH as the output signal S′. The output signal Q corresponds to the output signal S′ with negative level. The bias-period sample-and-hold signal BPSH corresponds to the peaks of the output signal Q′.
As shown in FIGS. 9 and 10A˜10B, because the write sampling control signal WSC and the bias sampling control signal BSC are used for controlling the multiplexers 1004, 1014 respectively, for example logic “1” in the time intervals T1, T3 and logic “0” in the time intervals T2, the frequencies of the write sampling control signal WSC and the bias sampling control signal BSC of the invention are much lower than the frequency of the power sampling signal PI. For a high-speed optical information recording apparatus, unlike the conventional power control circuit that requires a sample-and-hold circuit capable of being operated in high frequency, although the frequency of the power sampling signal PI is still very high, but the write sampling control signal WSC and the bias sampling control signal BSC with lower frequencies are only required to achieving its purposes. Therefore, cost of the device can be significantly saved.
According to the power control circuit for the optical information recording apparatus of the invention, a low-speed sample-and-hold at low cost can be used for acquiring the signal level of the high-frequency power sampling signal, so that the optical signal can be properly adjusted for an application of a high-speed optical recording disc. This invention is particularly suitable for low-cost and high-speed optical information recording apparatus.
While the present invention has been described with a preferred embodiment, this description is not intended to limit our invention. Various modifications of the embodiment will be apparent to those skilled in the art. It is therefore contemplated that the appended claims will cover any such modifications or embodiments as fall within the true scope of the invention.
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