A jitter measuring method and device, which is capable of measuring jitters in serial digital signal without high-frequency reference clock. The jitter measuring device comprises a rough length measuring unit for measuring rough length for each pulse of the serial digital signal according to a reference clock, and a phase error measuring unit for measuring the phase errors between the edges of the reference clock and the serial digital signal by multi-phase clocks, which are generated by a multi-phase generator according to the reference clock. The jitter measuring device computes the precise length according to the rough length and the phase error, and measures the jitters from the precise length by filters.
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0. 21. A jitter measuring device for measuring jitters in a digital signal, the jitter measuring device comprising:
a pulse length measuring unit for receiving the digital signal and a reference clock and measuring pulse length for each pulse of the digital signal according to the reference clock;
a pulse selecting unit for selecting the pulse lengths corresponding to a length selection signal as selected pulse lengths;
a length difference calculating unit for receiving the selected pulse lengths and calculating length difference for each selected pulse length; and
a jitter calculating unit for receiving the length differences and calculating an average of the length differences of the jitters.
0. 13. A jitter measuring method for measuring jitters in a digital signal, the jitter measuring method comprising the steps of:
receiving the digital signal and a reference clock;
measuring pulse length for each pulse of the digital signal according to the reference clock;
selecting the pulse lengths corresponding to a length selection signal as selected pulse lengths;
calculating an average pulse length among the selected pulse lengths;
receiving the selected pulse lengths and the average pulse length and calculating length difference for each selected pulse length with the average pulse length; and
receiving the length differences and calculating an average of the length differences as the jitters.
0. 1. A jitter measuring device for measuring jitters in a serial digital signal, the jitter measuring device comprising:
a pulse length measuring unit for receiving the serial digital signal and a reference clock and measuring pulse length for each pulse of the serial digital signal according to the reference clock;
a pulse selecting unit for selecting the pulse lengths corresponding to a length selection signal as selected pulse lengths;
an average length calculating unit for calculating an average pulse length among the selected pulse lengths;
a length difference calculating unit for receiving the selected pulse lengths and the average pulse length and calculating length difference for each selected pulse length with the average pulse length; and
a jitter calculating unit for receiving the length differences and calculating an average of the length differences as the jitters.
0. 2. The jitter measuring device according to
a rough length measuring unit for receiving the serial digital signal and the reference clock and generating a rough pulse length for each pulse of the serial digital signal;
a multi-phase signal generator for generating multi-phase clocks according to the reference clock;
a phase error measuring unit for receiving the serial digital signal, the reference clock and the multi-phase clocks, and generating a positive edge phase error and a negative edge phase error for each pulse of the serial digital signal; and
a length integrating unit for receiving the rough pulse length, the positive edge phase error and the negative edge phase error, and calculating the pulse length for each pulse of the serial digital signal.
0. 3. The jitter measuring device according to
0. 4. The jitter measuring device according to
a plurality of positive-edge triggered flip-flops generating a positive edge phase error signal by receiving the reference clock and the multi-phase clocks as input signals and receiving the serial digital signal as a trigger signal;
a plurality of negative-edge triggered flip-flops for generating a negative edge phase error signal by receiving the reference clock and the multi-phase clocks as input signals and receiving the serial digital signal as a trigger signal; and
a decoder for receiving the positive edge phase error signal and the negative edge phase error signal and generating the positive edge phase error and the negative edge phase error according to a look-up table.
0. 5. The jitter measuring device according to
0. 6. The jitter measuring device according to
0. 7. The jitter measuring device according to
0. 8. The jitter measuring device according to
0. 9. A jitter measuring method for measuring jitters in a serial digital signal, comprising the steps of:
generating multi-phase clocks according to a reference clock;
measuring rough pulse length for each pulse of the serial digital signal according to the reference clock;
measuring positive/negative edge phase errors of the positive/negative edges of the serial digital signal according to the reference clock and the multi-phase clocks;
calculating pulse length for each pulse according to the rough pulse length and the positive/negative edge phase errors;
selecting the pulse lengths matching one of length selection signals as selected pulse lengths;
calculating an average pulse length of the selected pulse lengths;
calculating length error for each selected pulse length with the average pulse length; and
calculating an average of the length errors as the jitters.
0. 10. The method according to
subtracting the positive edge phase error from the rough pulse length to generate a computed result; and
adding the negative edge phase error to the computed result as the pulse length.
0. 11. The method according to
0. 12. The method according to
0. 14. The jitter measuring method according to claim 13, wherein the step of measuring pulse length comprises:
receiving the digital signal and the reference clock and generating a rough pulse length for each pulse of the serial digital signal;
generating multi-phase clocks according to the reference clock;
receiving the digital signal, the reference clock and the multi-phase clocks, and generating a positive edge phase error and a negative edge phase error for each pulse of the digital signal; and
receiving the rough pulse length, the positive edge phase error and the negative edge phase error, and calculating the pulse length for each pulse of the digital signal.
0. 15. The jitter measuring method according to claim 14, wherein the step of generating a rough pulse length is to count pulse number of the reference clock for each pulse as the rough pulse length.
0. 16. The jitter measuring method according to claim 15, wherein the step of generating a positive edge phase error and a negative edge phase error comprises the steps of:
generating a positive edge phase error signal according to the reference clock and the multi-phase clocks as input signals and the digital signal as a trigger signal;
generating a negative edge phase error signal according to the reference clock and the multi-phase clocks as input signals and the digital signal as a trigger signal; and
receiving the positive edge phase error signal and the negative edge phase error signal and generating the positive edge phase error and the negative edge phase error according to a look-up table.
0. 17. The jitter measuring method according to claim 16, wherein the step of calculating the pulse length performs subtraction and addition operations with respect to the rough pulse length, the positive edge phase error, and the negative edge phase error.
0. 18. The jitter measuring method according to claim 17, wherein the step of calculating the average pulse length is to perform a low-pass filtering procedure.
0. 19. The jitter measuring method according to claim 17, wherein the step of calculating the average of the length differences of the jitters is to perform a low-pass filtering procedure.
0. 20. The jitter measuring method according to claim 17, wherein the step of calculating the length difference utilizes is to perform a subtraction procedure.
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Since the pulse length Ti of the serial digital signal have different period ranges (for example, the range of CD-ROM system is from 3T to 11T), the jitter measuring device 10 of the invention utilizes the pulse selecting unit 12 to select the pulse lengths having the same range to calculate the jitter in the serial digital signal. The pulse selecting unit 12 selects the pulse lengths having the same range according to a length selection signal and outputs the pulse lengths as selected pulse lengths. For instance, if the length selection signal is 5, the pulse selecting unit 12 selects the pulse lengths close to 5T as the selected pulse lengths. Of course, the pulse selecting unit 12 may immediately output the selected pulse lengths close to the length selection signal. Alternatively, a memory may be utilized to store all the pulse lengths, and the pulse lengths close to the length selection signal may be output after a period of time.
Then, the jitter measuring device 10 of the present invention utilizes an average length calculating unit 13 to calculate an average length Ta of the selected pulse lengths Ti. The average length calculating unit 13 may be a low-pass filter, as shown in
Y(N+1)=(1/M)*X(N)+[(M−1)/M]*Y(N) (2).
In this embodiment, the selected pulse lengths Ti is the input data X(N) and the average length Ta is the output data Y(N+1).
Next, the jitter measuring device 10 utilizes the length difference calculating unit 14 to calculate the length differences between each selected pulse length Ti and the average length Ta. The length difference calculating unit 14 may be a subtracter, which subtracts the average length Ta from the selected pulse lengths Ti to get length differences Tc. Finally, the jitter measuring device 10 utilizes the jitter calculating unit 15 to calculate an average of the length differences as a jitter for output. Similar to the average length calculating unit 13, the jitter calculating unit 15 may be implemented by a low-pass filter.
Step S702: measuring the rough pulse length for each pulse of the serial digital signal, wherein the rough pulse length for each pulse of the serial digital signal is the pulse number of a reference clock during the pulse. The frequency of the reference clock does not have to be too high.
Step S704: measuring the phase errors, wherein the phase error between the positive/negative edge of the serial digital signal and the positive edge of the reference clock is measured according to a plurality of multi-phase clocks. Because the multi-phase clocks are generated according to the reference clock, the multi-phase clocks and the reference clock have the same frequency.
Step S706: calculating the fine pulse length according to the rough pulse length and the phase errors. The fine pulse length is calculated by subtracting the rough pulse length from the positive edge phase error, and then by adding the negative edge phase error to get the fine pulse length.
Step S708: selecting the fine pulse lengths matching the length selection signal as the selected pulse lengths Ti. Because the fine pulse lengths are not fixed length (for example, the pulse lengths of the CD-ROM system are between 3T and 11T), the fine pulse lengths having the same range have to be selected to compute the jitter. Alternately, it is possible to select fine pulse lengths matching one of two or more length selection signals.
Step S710: calculating the average length of the selected pulse lengths Ti as an average pulse length Ta.
Step S712: calculating the length errors between each selected pulse length Ti and the average pulse length Ta. The length errors can be the length differences or the length standard deviation.
Step S714: calculating the jitter by calculating the average of the length errors.
In summary, the jitter measuring device of the present invention measures the jitter in the serial digital signal according to the reference clock having lower frequency, and is free from the problem of providing a reference clock having high frequency accordingly.
While certain exemplary embodiments have been described and shown in the accompanying drawings, it is to be understood that such embodiments are merely illustrative of and not restrictive on the broad invention, and that this invention not be limited to the specific construction and arrangement shown and described, since various other modifications may occur to those ordinarily skilled in the art.
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