An error correction coding device includes a time divider for dividing field data of L packets into N data packets and (L-N) parity packets, a first rs (Reed-Solomon) encoder adding parities of a predetermined number of bytes to the data packets, respectively, a storage unit for storing the data packets, and a second rs encoder generating parity packets corresponding to the stored data packets. An error correction decoding device includes a first rs decoder correcting errors in a horizontal direction of the field data using parities of the predetermined number of bytes included in the L packets, a storage unit storing the error-corrected data packets, and a second rs decoder correcting errors in a vertical direction of the field data using the parity packets. Thus, the error correction can be strongly performed using parities existing in the horizontal and vertical directions with respect to the field data.
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0. 65. An encoding device comprising:
a randomizer which randomizes a data stream; and
a first encoder which horizontally encodes the data stream randomized by the randomizer;
wherein the data stream is time-divided into at least two groups and is input to the randomizer to be randomized separately.
0. 71. A stream processing method in a digital broadcasting transmitter, the method comprising:
a randomizing which randomizes a data stream; and
a first encoding operation which horizontally encodes the randomized data stream,
wherein the data stream is time divided into at least two groups and is input to the randomizing to be randomized separately.
23. An error correction coding device for a digital transmitter system comprising:
a first encoder for generating parity packets corresponding to a predetermined number of data packets; and
a second encoder for adding parities of a predetermined number of bytes to the data packets and the parity packets;
wherein the parities added by the second encoder are generated based on a part of the data packets excluding a header part and a parity part.
18. An error correction coding method for a digital transmitter system comprising:
a step of storing a predetermined number of data packets;
a first encoding step of generating parity packets corresponding to the stored data packets;
a step of randomizing the data packets and the parity packets in a predetermined pattern; and
a second encoding step of adding parities of a predetermined number of bytes to the randomized data packets and parity packets.
26. An error correction coding method for a digital transmitter system comprising:
a first encoding step of generating parity packets corresponding to a predetermined number of data packets; and
a second encoding step of adding parities of a predetermined number of bytes to the data packets and the parity packets;
wherein the parities added by the second encoder are generated based on a part of the data packets excluding a header part and a parity part.
13. An error correction coding device for a digital transmitter system comprising:
a storage unit for storing a predetermined number of data packets;
a first rs (Reed-Solomon) encoder for generating parity packets corresponding to the stored data packets;
a randomizer for randomizing the data packets and the parity packets in a predetermined pattern; and
a second rs encoder for adding parities of a predetermined number of bytes to the randomized data packets and parity packets.
39. An error correction decoding device for a digital receiver system comprising:
a first rs (Reed-Solomon) decoder for correcting errors of a predetermined number of data packets using parities of a predetermined number of bytes included in the data packets;
a storage unit for storing the error-corrected data packets; and
a second rs decoder for correcting errors of the data packets using the-parity packets;
wherein the second rs decoder updates the data packets stored in the storage unit based on the error-corrected data packets.
49. An error correction decoding device for a digital receiver system comprising:
a first rs (Reed-Solomon) decoder for correcting errors of a predetermined number of data packets using parities of a predetermined number of bytes included in the data packets;
a randomizer for derandomizing the data packets and parity packets in a predetermined pattern;
a storage unit for storing the error-corrected data packets; and
a second rs decoder for correcting errors of the data packets using the parity packets;
wherein the second rs decoder updates the data packets stored in the storage unit based on the error-corrected data packets.
44. An error correction method for a digital receiver system comprising:
a first decoding step of correcting errors of a predetermined number of data packets using parities of a predetermined number of bytes included in the data packets;
a step of storing the error-corrected data packets;
a second decoding step of correcting errors of the data packets error-corrected at the first decoding step using parity packets;
a step of updating the stored data packets based on the data packets error-corrected at the second decoding step; and
a third decoding step of correcting errors of the updated data packets using the parities of the predetermined number of bytes.
7. An error correction coding method for a digital transmitter system comprising:
a first encoding step of adding parities of a predetermined number of bytes to a predetermined number of data packets, respectively;
a step of storing the data packets having the parities of the predetermined number of bytes added thereto;
a second encoding step of generating the parity packets corresponding to the stored data packets; and
a third encoding step of adding the parities of the predetermined number of bytes to the parity packets;
wherein the second encoding step generates the parity packets corresponding to a remaining part of the data packets except for a header part and the parities.
53. An error correction decoding method for a digital receiver system comprising:
a first decoding step of correcting errors of a predetermined number of data packets using parities of a predetermined number of bytes included in the data packets;
a step of derandomizing the data packets and parity packets in a predetermined pattern; a step of storing the data packets error-corrected at the first decoding step;
a second decoding step of correcting errors of the data packets error-corrected at the first decoding step using the parity packets;
a step of updating the stored data packets based on the data packets error-corrected at the second decoding step; and
a third decoding step of correcting errors of the updated data packets using the parities of the predetermined number of bytes.
1. An error correction coding device for a digital transmitter system comprising:
a first rs (Reed-Solomon) encoder for adding parities of a predetermined number of bytes to a predetermined number of data packets, respectively;
a storage unit for storing the data packets having the parities of the predetermined number of bytes added thereto; and
a second rs encoder for generating parity packets corresponding to the stored data packets;
wherein the first rs encoder adds the parities of the predetermined number of bytes to the parity packets, and the storage unit stores the parity packets having the parities of the predetermined number of bytes added thereto; and
wherein the second rs encoder generates the parity packets corresponding to a remaining part of the data packets except for a header part and the parities.
36. A digital transmitter system comprising:
an error correction coding unit for generating parity packets corresponding to a predetermined number of data packets, and coding the data packets and the parity packets by adding parities of a predetermined number of bytes to the data packets and the parity packets, respectively;
a sync signal inserter for inserting a sync signal into the coded data;
a pulse shaping filter for pulse-shaping the data into which the sync signal is inserted; and
a radio frequency (RF) unit for converting the pulse-shaped data into a signal of a transmission channel band and transmitting the converted signal;
wherein the error correction coding unit comprises a storage unit for storing the data packets, a second rs encoder for generating the parity packets corresponding to the stored data packets, a randomizer for randomizing the data packets and the parity packets in a predetermined pattern, and a first rs encoder for adding the parities of the predetermined number of bytes to the randomized data packets and parity packets.
57. A digital receiver system comprising:
a tuner for converting a received signal of a selected band into a baseband signal;
a frequency and timing restorer for restoring a frequency offset and a timing offset of the received signal;
an analog signal remover for removing an analog signal included in the received signal;
an equalizer for removing an inter-symbol interference of the received signal;
an error correction decoding unit for correcting errors of data packets of the received signal using parities of a predetermined number of bytes and parity packets; and
a randomizer for derandomizing the parity rackets in a predetermined pattern;
wherein the second rs decoder corrects the errors of the data packets using the derandomized parity packets;
wherein the error correction decoding unit comprises a first rs decoder for correcting the errors of the predetermined number of data packets using the parities of the predetermined number of bytes included in the data packets, a storage unit for storing the error-corrected data packets, and a second rs decoder for correcting the errors of the data packets using the parity packets; and
wherein the second rs decoder updates the data packets stored in the storage unit based on the error-corrected data packets.
29. A digital transmitter system comprising:
an error correction coding unit for generating parity packets corresponding to a predetermined number of data packets, and coding the data packets and the parity packets by adding parities of a predetermined number of bytes to the data packets and the parity packets, respectively;
a sync signal inserter for inserting a sync signal into the coded data;
a pulse shaping filter for pulse-shaping the data into which the sync signal is inserted; and
a radio frequency (RF) unit for converting the pulse-shaped data into a signal of a transmission channel band and transmitting the converted signal;
wherein the error correction coding unit comprises a first rs (Reed-Solomon) encoder for adding the parities of the predetermined number of bytes to the predetermined number of data packets, respectively, a storage unit for storing the data packets having the parities of the predetermined number of bytes added thereto, and a second rs encoder for generating the parity packets corresponding to the stored data packets; and
wherein the first rs encoder adds the parities of the predetermined number of bytes to the parity packets, and the storage unit stores the parity packets having the parities of the predetermined number of bytes added thereto.
2. The error correction coding device as claimed in
3. The error correction coding device as claimed in
4. The error correction coding device as claimed in
5. The error correction coding device as claimed in
wherein the first rs encoder adds the parities of the predetermined number of bytes to the parity packets, and the storage unit stores the parity packets having the parities of the predetermined number of bytes added thereto.
6. The error correction coding device as claimed in
wherein the first rs encoder adds the parities of the predetermined number of bytes to the parity packets, and the storage unit stores the parity packets having the parities of the predetermined number of bytes added thereto.
8. The error correction coding method as claimed in
9. The error correction coding method as claimed in
10. The error correction coding method as claimed in
generating parity packets with respect to the data packets which contain a predetermined-byte parity and are stored in the storage unit with the parities except for the header part; and
re-arranging the parity packets which contain a predetermined-byte parity with the parities.
11. The error correction coding method as claimed in
12. The error correction coding method as claimed in
14. The error correction coding device as claimed in
15. The error correction coding device as claimed in
16. The error correction coding device as claimed in
17. The error correction coding device as claimed in
19. The error correction coding method as claimed in
20. The error correction coding method as claimed in
21. The error correction coding method as claimed in
22. The error correction coding method as claimed in
24. The error correction coding device as claimed in
25. The error correction coding device as claimed in
27. The error correction coding method as claimed in
28. The error correction coding method as claimed in
30. The digital transmitter system as claimed in
31. The digital transmitter system as claimed in
32. The digital transmitter system as claimed in
33. The digital transmitter system as claimed in
34. The digital transmitter system as claimed in
35. The digital transmitter system as claimed in
37. The digital transmitter system as claimed in
38. The digital transmitter system as claimed in
40. The error correction decoding device as claimed in
41. The error correction decoding device as claimed in
42. The error correction decoding device as claimed in
wherein the second rs decoder corrects the errors of the data packets using the derandomized parity packets.
43. The error correction decoding device as claimed in
45. The error correction method as claimed in
46. The error correction method as claimed in
47. The error correction method as claimed in
48. The error correction method as claimed in
50. The error correction decoding device as claimed in
51. The error correction decoding device as claimed in
52. The error correction decoding device as claimed in
54. The error correction decoding method as claimed in
55. The error correction decoding method as claimed in
56. The error correction decoding method as claimed in
58. The digital receiver system as claimed in
59. The digital receiver system as claimed in
60. The digital receiver system as claimed in
61. The digital receiver system as claimed in
wherein the second rs decoder updates the data packets stored in the storage unit based on the error-corrected data packets.
62. The digital receiver system as claimed in
63. The digital receiver system as claimed in
64. The digital receiver system as claimed in
0. 66. The encoding device of claim 65, further comprising:
a sync signal which inserts a sync signal into an output of the first encoder;
a pulse shaping filter which pulse-shapes the output into which the sync signal is inserted; and
a radio frequency (RF) unit which converts the pulse-shaped output into a signal of a transmission channel band and transmits the converted signal.
0. 67. The encoding device of claim 65, further comprising:
a first encoder which vertically encodes a data area of the data stream to generate a second parity area and outputs the data stream comprising the data area and the first parity to the randomizer;
wherein the first encoder horizontally encodes the data area and the first parity area to generate a second parity area.
0. 68. The encoding device of claim 67, further comprising:
a storage unit which stores the data area of the data stream to be encoded by the second encoder; and
a header inserter which generates a header corresponding to the first parity area generated in the stream by the second encoder and inserts the generated header into the stream,
wherein the first encoder encodes the header generated by the header inserter and the first parity area in the horizontal direction to generate a third parity area.
0. 69. The encoding device of claim 65, wherein the second encoder performs Reed-Solomon (rs) encoding.
0. 70. The encoding device of claim 65, wherein the data stream is robust data processed to be robust against errors.
0. 72. The method of claim 71, further comprising:
inserting a sync signal into an output of the first encoding operation;
pulse-shaping the output into which the sync signal is inserted; and
converting the pulse-shaped output into a signal of a transmission channel band and transmitting the converted signal.
0. 73. The method of claim 71, further comprising:
a second encoder operation which vertically encodes a data area of the stream to generate a first parity area and outputs the data stream comprising the data area and the first parity;
wherein the randomizing randomizes the first parity area generated by the first encoding operation, and randomizes the data area, and
wherein the first encoding operation horizontally encodes the data area and the first parity area.
0. 74. The method of claim 73, further comprising:
storing the data area of the data stream to be encoded in the second encoding operation;
generating a header corresponding to the first parity area generated in the stream by the second encoding operation, and inserting the generated header into the stream; and
encoding the header and the first parity area in the horizontal direction to generate a third parity area.
0. 75. The method of claim 71, wherein the first encoding operation comprises performing Reed-Solomon (rs) encoding.
0. 76. The method of claim 71, wherein the data stream is robust data processed to be robust against errors.
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The present application is a reissue application of U.S. Pat. No. 7,337,386 filed on May 24, 2004.
More than one reissue application has been filed for the reissue of U.S. Pat. No. 7,337,386 filed May 24, 2004. The present application is the parent reissue application of continuation reissue application of U.S. application Ser. No. 12/712,965.
This application claims the benefit of U.S. Provisional Patent Application Nos. 60/478,342 filed Jun. 16, 2003 and 60/495,873 filed Aug. 19, 2003 in the U.S. Patent and Trademark Office, and Korean Patent Application No. 2003-67522 filed Sep. 29, 2003 in the Korean Intellectual Property Office, the disclosures of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a digital transmitter/receiver system, and more particularly to an error correction coding/decoding device and method for a digital transmitter/receiver system.
2. Description of the Related Art
Here, it is exemplified that the RS encoder 113 comprises an RS (207,187), t=10 code, which has an error correction capability of 10 bytes. An RS data block has a size of 207 bytes including input data of 187 bytes and an RS parity of 20 bytes, which is added for the error correction, and constitutes one segment (hereinafter referred to as “packet”) along with a segment sync signal.
The input data, which is inputted from an MPEG transport system, has a structure of an MPEG2-TS (Transport Stream) in which one packet is composed of 188 bytes. The MPEG2-TS packet is composed of a 1-byte sync signal, 3-byte header including a PID (Packet Identifier), and 184-byte payload data.
The input data is converted into a random form in the randomizer 111, and the RS parity of 20 bytes for the error correction is added to the randomized data in the RS encoder 113. Then, the data is convolution-interleaved in the interleaver 115, and then trellis-encoded with a ratio of 2/3 through the trellis encoder 117.
Through the above-described process, the error correction encoding of the input data is performed.
The error correction decoding device 300 of the receiver system as described above corrects an error occurring in the transmission channel environment and the transmitter system. Especially, the RS encoder 113 and the RS decoder 315 serve to correct a burst error in association with the convolution interleaver/deinterleaver.
Recently, as the necessity for indoor, portable and mobile receiving services of ground-wave digital broadcasts is increasing, it is required to stably receive data even in the inferior channel environments. However, the error correction coding method of the existing ATSC transmission system cannot guarantee a stable receiving of data in the inferior channel environment where many errors occur. Thus, there is a demand for a strong error correction coding device and method having a capability of correcting more errors.
The present invention has been developed in order to solve the above drawbacks and other problems associated with the conventional arrangement. An aspect of the present invention is to provide a digital transmitter/receiver system having a strong error correction coding/decoding device that can guarantee a receiving performance in an inferior channel environment, and an error correction coding/decoding method thereof.
To achieve the above aspects and/or other features of the present invention, there is provided an error correction coding device for a digital transmitter system comprising a first RS (Reed-Solomon) encoder for adding parities of a predetermined number of bytes to a predetermined number of data packets, respectively, a storage unit for storing the data packets having the parities of the predetermined number of bytes added thereto, and a second RS encoder for generating the parity packets corresponding to the stored data packets, wherein the first RS encoder adds the parities of the predetermined number of bytes to the parity packets, and the storage unit stores the parity packets having the parities of the predetermined number of bytes added thereto. Here, the data packet is one of a normal data packet and a robust data packet.
The second RS encoder generates the parity packets corresponding to a remaining part of the data packets except for a header part.
In an exemplary embodiment of the present invention, the error correction coding device further comprises a header inserter for inserting headers to the parity packets generated from the second RS encoder, respectively, and a randomizer for randomizing the data packets and the parity packets in a predetermined pattern before the first RS encoder adds the parities of the predetermined number of bytes thereto.
In another embodiment of the present invention, there is provided an error correction coding method comprising a first encoding step of adding parities of a predetermined number of bytes to a predetermined number of data packets, respectively, a step of storing the data packets having the parities of the predetermined number of bytes added thereto, a second encoding step of generating the parity packets corresponding to the stored data packets, and a third encoding step of adding the parities of the predetermined number of bytes to the parity packets.
The second encoding step generates the parity packets corresponding to a remaining part of the data packets except for a header part.
In an exemplary embodiment of the present invention, the error correction coding method further comprises the steps of inserting headers to the parity packets generated at the second encoding step, and randomizing the data packets and the parity packets in a predetermined pattern before the first encoding step and the third encoding step.
In still another embodiment of the present invention, there is provided an error correction decoding device for a digital receiver system comprising a first RS (Reed-Solomon) decoder for correcting errors of a predetermined number of data packets using parities of a predetermined number of bytes included in the data packets, a storage unit for storing the error-corrected data packets, and a second RS decoder for correcting errors of the data packets using the parity packets, wherein the second RS decoder updates the data packets stored in the storage unit based on the error-corrected data packets. Here, the data packet is one of a normal data packet and a robust data packet.
In an exemplary embodiment of the present invention, the error correction decoding device further comprises a randomizer for derandomizing the parity packets in a predetermined pattern, and the second RS decoder corrects the errors of the data packets using the derandomized parity packets. Also, the first RS decoder performs the error correction once again with respect to the updated data packets.
In still another embodiment of the present invention, there is provided an error correction decoding method comprising a first decoding step of correcting errors of a predetermined number of data packets using parities of a predetermined number of bytes included in the data packets, a step of storing the error-corrected data packets, a second decoding step of correcting errors of the data packets error-corrected at the first decoding step using the parity packets, a step of updating the stored data packets based on the data packets error-corrected at the second decoding step, and a third decoding step of correcting errors of the updated data packets using the parities of the predetermined number of bytes.
In an exemplary embodiment of the present invention, the error correction decoding method further comprises the steps of derandomizing the parity packets in a predetermined pattern before the second decoding step, and randomizing the derandomized parity packets in the predetermined pattern before the third decoding step.
Accordingly, the transmitter generates parities of the predetermined number of bytes included in the packets and the predetermined number of parity packets, and the receiver performs an error correction using the parities of the predetermined number of bytes and the predetermined number of parity packets, so that a stronger error correction can be achieved.
The above aspects and features of the present invention will be more apparent by describing certain embodiments of the present invention with reference to the accompanying drawings, in which:
Certain embodiments of the present invention will be described in greater detail with reference to the accompanying drawings.
In the following description, same drawing reference numerals are used for the same elements even in different drawings. The matters defined in the description such as a detailed construction and elements are nothing but the ones provided to assist in a comprehensive understanding of the invention. Thus, it is apparent that the present invention can be carried out without those defined matters. Also, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail.
The digital transmitter system includes an error correction coding device 400 according to the present invention, a sync inserter 511, a pilot inserter 513, a pulse shaping filter 515, and an RF unit 517.
The error correction coding device 400 according to an embodiment of the present invention includes a FIFO (First-In First-Out) unit 411, a time divider 413, a randomizer 415, a first RS encoder 417, a storage unit 419, a second RS encoder 421, a header inserter 423, an interleaver 425, and a trellis encoder 427.
The FIFO unit 411 buffers data packets MPEG2-TS-packetized by an MPEG transmitter system (not illustrated) in a FIFO manner. Here, the data packet may be either of a normal data packet and a robust data packet that is more robust than the normal data packet in the channel environment.
The time divider 413 divides a field time with respect to the data packets outputted from the FIFO unit 411 and parity packets outputted from the header inserter 423. For example, it divides L packets except for field sync signals into N data packets and (L-N) parity packets.
The randomizer 415 randomizes the N data packets or the (L-N) parity packets outputted from the time divider 413 in accordance with a predetermined pattern. That is, the randomizer 415 first randomizes the N data packets outputted from the FIFO unit 411, and then randomizes the (L-N) parity packets.
The first RS encoder 417 adds parities of a predetermined number of bytes to the respective randomized packets. The first RS encoder 417 first adds parities to the N randomized data packets, and then adds parities to the (L-N) parity packets.
The storage unit 419 stores the packets to which the parities are added by the first RS encoder 417.
The second RS encoder 421 generates the (L-N) parity packets based on the N data packets stored in the storage unit 419. That is, the second RS encoder 421 adds the parities of (L-N) bytes corresponding to the (L-N) packets.
The header inserter 423 inserts headers of a predetermined number of bytes to the (L-N) parity packets generated from the second RS encoder 421. The (L-N) header-inserted parity packets are inputted to the time divider 413, and then outputted to the randomizer 415 through the time divider 413.
Thereafter, the (L-N) parity packets are randomized through the randomizer 415, and the parities of the predetermined number of bytes are added to the (L-N) packets through the first RS encoder 417. The (L-N) packets having the parities added thereto are then stored in the storage unit 419.
The interleaver 425 interleaves the L packets to which the parities of the predetermined number of bytes are added to rearrange the L packets in the unit of a byte, and the trellis encoder 427 trellis-encodes the interleaved data to rearrange the interleaved data in the unit of a bit.
The data, error-correction-coded by the error correction coding device 400 as described above, is inputted to the sync inserter 511, and a segment sync signal and a field sync signal are inserted into the data. The pilot inserter 513 generates a pilot signal having a power lower than an average power of symbol data, and adds the pilot signal to the data. The pulse shaping filter 515 is a filter having a specified roll-off factor, and performs a pulse shaping of the data. The RF unit 517 up-converts the data into an RF channel band signal to be transmitted, and outputs the RF channel band signal to an antenna.
The data packets MPEG2-TS-packetized by the MPEG transmitter system (not illustrated) are inputted to the FIFO unit 411 (step S11). The N data packets ((a) in
The first RS encoder 417 adds a 20-byte parity ((b) in
The N packets to which the 20-byte parities are added ((a) and (b) in
When the N packets ((a) and (b) in
Alternatively, the second RS encoder 421 may generate (312-N) parity packets ((d) and (e) in
The header inserter 423 inserts 3-byte headers to the (312-N) parity packets ((d) in
The (312-N) parity packets ((c) and (d) in
The 20-byte parities ((e) in
Then, the packets are rearranged in the unit of a byte through the interleaver 425, and then rearranged in the unit of a bit through the trellis encoder 427 to complete the error correction coding (step S27).
The error correction coding of the data packets MPEG2-TS-packetized by an MPEG transmitter system is performed along two paths. Here, the data packet may be either of a normal data packet and a robust data packet that is more robust than the normal data packet in the channel environment.
The first path processes the N data packets outputted through a FIFO unit 717, and the second path processes the (312-N) parity packets generated based on the N packets stored in a storage unit 711.
First, the storage unit 711 stores the N input data packets ((a) in
A header inserter 715 inserts 3-byte headers ((c) in
The (312-N) parity packets ((c) and (d) in
Meanwhile, after the N-th data packet, which is the last data packet among the N data packets outputted from the FIFO unit 717 that is the first path, is inputted, the (312-N) parity packets outputted from the header inserter 715 are inputted to the time divider 719.
Accordingly, the data outputted from the time divider has the form composed of (a), (b) and (c) parts in
The N data packets and the (312-N) parity packets outputted from the time divider 719 are randomized in a predetermined pattern through a randomizer 721 (step S77).
The first RS encoder 723 adds the 20-byte parities ((b) and (e) in
Thereafter, an interleaving and a trellis encoding are performed to complete the error correction encoding (step S81).
As described above, since the field data error-correction-encoded according to the embodiments of the present invention has the parity of the predetermined number of bytes per packet and the predetermined number of parity packets, the data can strongly be error-correction-encoded and then transmitted.
The digital receiver system includes a tuner 811, a frequency restorer 813, a timing restorer 815, an analog signal remover 817, an equalizer 819, a phase compensator 821, and an error correction decoding device 900.
The tuner 811 selects one of received band signals, and converts the selected band signal into a baseband signal.
The frequency restorer 813 and the timing restorer 815 restore a frequency offset and a timing offset of the received signal.
The analog signal remover 817 removes an analog signal included in the selected band signal.
The equalizer 819 removes an ISI (Inter-Symbol Interference) of the received signal, and the phase compensator 821 compensates for a phase error of the received signal.
The error correction decoding device 900 detects an error corresponding to the error correction coding method performed by the error correction coding device 400 or 700 of the digital transmitter system illustrated in
Hereinafter, the error correction decoding device 900 of a digital receiver system according to the present invention will be explained in detail.
The error correction decoding device 900 includes a trellis decoder 911, a deinterleaver 913, a FIFO unit 915, a first RS decoder 917, a randomizer 919, a storage unit 921, a second RS decoder 923, and a derandomizer 925.
The trellis decoder 911 and the deinterleaver 913 perform a trellis decoding and a deinterleaving corresponding to the trellis encoding and the interleaving used in the transmitter.
The deinterleaved data packets are buffered. Here, the data packet may be either of a normal data packet and a robust data packet that is more robust than the normal data packet in the channel environment.
The first RS decoder 917 corrects errors in a horizontal direction of the field data using parities of a predetermined number of bytes included in the data packets.
The randomizer 919 randomizes the data in a predetermined pattern.
The second RS decoder 923 corrects the errors of the data packets in a vertical direction of the field data using parity packets.
The storage unit 921 stores the data error-corrected through the first and second RS decoders 917 and 923 and information on whether the errors are corrected.
The derandomizer 925 derandomizes the data packets error-corrected in the horizontal direction through the first RS decoder 917 in the predetermined pattern.
Through the above-described process, the error correction of the data of the digital receiver system is completed.
First, with reference to
The data outputted from the deinterleaver 913 is inputted to the first RS decoder 917 through the FIFO unit 915.
The first RS decoder 917 corrects the errors in the horizontal direction of the field data ((a), (c) and (d) in
The randomizer 919 derandomizes only the parity packets ((c) and (d) in
The storage unit 921 stores the data error-corrected in the horizontal direction through the first RS decoder 917 and the information on whether the errors are corrected (step S114).
The second RS decoder 923 corrects the errors of the N randomized data packets ((a) in
Then, the second RS decoder 923 updates the data stored in the storage unit 921 based on the data error-corrected in the vertical direction and the information on whether the errors are corrected (step S118).
The randomizer 919 again randomizes only the derandomized parity packets ((c) and (d) in
The first RS decoder 923 performs the error correction once again with respect to the N randomized data packets and the (312-N) parity packets ((a), (c) and (d) in
The derandomizer 925 derandomizes the error-corrected data in the predetermined pattern, so that the error correction in the receiver system is completed (step S124).
Next, with reference to
The data outputted from the deinterleaver 913 is inputted to the first RS decoder 917 through the FIFO unit 915.
The first RS decoder 917 corrects the errors in the horizontal direction of the N data packets and the (312-N) parity packets ((a), (c) and (d) in
The randomizer 919 derandomizes the 312 packets ((a), (c) and (d) in
The storage unit 921 stores the data error-corrected through the first RS decoder 917 and the information on whether the errors are corrected (step S214).
The second RS decoder 923 corrects the errors of the N data packets ((a) in
Then, the second RS decoder 923 updates the data stored in the storage unit 921 based on the error-corrected data and the information on whether the errors are corrected (step S218).
The randomizer 919 again randomizes the N derandomized parity packets and the (312-N) parity packets ((a), (c) and (d) in
Thereafter, the first RS decoder 923 performs the error correction once again in the horizontal direction with respect to the 312 packets ((a), (c) and (d) in
The derandomizer 925 derandomizes the error-corrected and randomized data in the predetermined pattern, so that the error correction in the receiver system is completed (step S224).
As described above, the error correction coding/decoding device for a digital transmitter/receiver system has a superior error correction capability by performing the error correction using parities of the predetermined number of bytes included in the packets and the predetermined number of parity packets, and thus it is possible to perform a stronger data transmission/reception in the inferior channel environments.
Also, the data coded by the error correction coding device for a digital transmitter system according to the present invention can be error-corrected by the existing receiver side error correction decoding device, and recognized and processed as a null packet of the parity packets.
According to the present invention, the transmitter generates parities of the predetermined number of bytes included in the packets and the predetermined number of parity packets, and the receiver performs an error correction using the parities existing in the horizontal and vertical directions with respect to the field data structure, so that a stronger error correction can be achieved.
Also, by preparing headers and parities of the predetermined number of bytes with respect to the predetermined number of parity packets, the system according to the present invention is compatible with the existing receiver system.
The foregoing embodiment and advantages are merely exemplary and are not to be construed as limiting the present invention. The present teaching can be readily applied to other types of apparatuses. Also, the description of the embodiments of the present invention is intended to be illustrative, and not to limit the scope of the claims, and many alternatives, modifications, and variations will be apparent to those skilled in the art.
Chang, Yong-deok, Park, Sung-Woo
Patent | Priority | Assignee | Title |
8635129, | Sep 29 2006 | Audible, Inc. | Customized content delivery |
Patent | Priority | Assignee | Title |
4660196, | Aug 08 1983 | Viasat, Inc | Digital audio satellite transmission system |
4998252, | Aug 06 1987 | SONY CORPORATION, 7-35 KITASHINAGAWA-6, SHINAGAWA-KU, TOKYO, JAPAN A CORP OF JAPAN | Method and apparatus for transmitting digital data |
5107505, | Jul 07 1988 | ENERTEC S A | Circuit of encoding and formatting data for rotating head recorders |
5535191, | Jun 28 1995 | Seiko Instruments Inc | Method and apparatus for switching between redundant hardware in a wireless data communication system |
5550640, | Feb 19 1992 | HITACHI CONSUMER ELECTRONICS CO , LTD | Digital video signal recording and reproducing apparatus and method for setting a number of compression blocks according to different operational modes |
5557420, | Nov 05 1991 | Sony Corporation | Method and apparatus for recording video signals on a record medium |
5587803, | Apr 01 1992 | Mitsubishi Denki Kabushiki Kaisha | Digital signal recording and reproducing apparatus and error-correcting apparatus |
5606422, | May 11 1991 | Sony Corporation | Method and apparatus for recording video signals on a record medium |
5629940, | Nov 27 1985 | PROTOCOL-IP COM, L L C | Transmitting and receiving long messages in a wireless one-way communication system while reserving selected slots for short messages |
5649297, | Oct 21 1994 | Seiko Instruments Inc | Transmitting digital data using multiple subcarriers |
5745644, | Nov 05 1991 | Sony Corporation | Method and apparatus for encoding a digital video signal |
5815046, | Feb 11 1997 | Intel Corporation | Tunable digital modulator integrated circuit using multiplexed D/A converters |
5818032, | Jan 03 1997 | Encoded color halftone micro-dots for high density digital information storage | |
6029265, | Oct 11 1996 | NEC Corporation | Error control device |
6081301, | Jan 13 1999 | Samsung Electronics Co., Ltd.; SAMSUNG ELECTRONICS CO , LTD | DTV circuitry for measuring multipath distortion based on ghosting of data segment synchronizing signals |
6160803, | Jan 12 1998 | GOOGLE LLC | High processing gain spread spectrum TDMA system and method |
6285662, | May 14 1999 | Nokia Siemens Networks Oy | Apparatus, and associated method for selecting a size of a contention window for a packet of data system |
6292921, | Mar 13 1998 | THOMSON LICENSING S A | Error correction device and optical disk reader comprising such a device |
6317462, | Oct 22 1998 | Lucent Technologies Inc. | Method and apparatus for transmitting MPEG video over the internet |
6401228, | Feb 19 1996 | Sony Corporation | Data decoding apparatus and method and data reproduction apparatus |
6404817, | Nov 20 1997 | AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD | MPEG video decoder having robust error detection and concealment |
6430159, | Dec 23 1998 | CISCO SYSTEMS CANADA CO | Forward error correction at MPEG-2 transport stream layer |
6453441, | Mar 13 1998 | Thomson Licensing S.A. | Error correcting device and optical disk reader comprising same |
6490727, | Oct 07 1999 | HARMONIC INC | Distributed termination system for two-way hybrid networks |
6763025, | Mar 12 2001 | Inceptia LLC | Time division multiplexing over broadband modulation method and apparatus |
7031781, | May 19 1999 | Sony Corporation | Recording apparatus, recording method and recording medium |
7194001, | Mar 12 2001 | Inceptia LLC | Time division multiplexing over broadband modulation method and apparatus |
7209455, | Nov 29 2000 | Alcatel Canada Inc | Physical layer interface system and method for a wireless communication system |
7310810, | May 19 1999 | Saturn Licensing LLC | Broadcasting apparatus and method, receiving apparatus and method, and medium |
7487273, | Sep 18 2003 | Genesis Microchip Inc. | Data packet based stream transport scheduler wherein transport data link does not include a clock line |
7577163, | Aug 24 2000 | TELECOM HOLDING PARENT LLC | Apparatus and method for facilitating data packet transportation |
7840882, | Feb 28 2006 | LG Electronics Inc | DTV transmitting system and receiving system and method of processing broadcast signal |
20010053225, | |||
20020181581, | |||
20020194570, | |||
20030053493, | |||
20030099303, | |||
20040109092, | |||
20070140369, | |||
20090052353, | |||
20100061698, | |||
EP996292, | |||
JP11298449, | |||
JP3229548, | |||
JP3255729, | |||
KR100155702, | |||
WO3003747, |
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