The location of a transponder or micro-transponder (MT) device can be determined relative to a remote locator (RL) device. The RL transmits a multi-frame ping to the MT when initiated by a user. The MT receives the multi-frame ping, and transmits a multi-frame reply that can be hollowed out to conserve transmit power and reduce interference between devices. The RL calculates a distance between the RL and the MT using the time-of-flight (TOF) between the transmission of a ping and the receipt of a reply. The user designates one or more threshold ranges for the MT relative to the RL. The RL provides a user alert whenever the MT travels outside a threshold range. Alerts can be provided through a number of mechanisms including an audible alert, a visible alert, a vibrating alert, an email message, an SMS message, an instant message, a pager message, a telephone call, etc.
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1. A remote locator that is configured to communicate with a transponder as a monitoring center for an electronic fence, the remote locator comprising:
a user input device;
a time control circuit that is arranged to provide timing control signals according to an internal clock in the remote locator;
a transmitter that is arranged to transmit a structured multi-frame transmission to the transponder when activated such that the structured multi-frame transmission has a transmit cadence and frequency that is determined by the internal clock of the remote locator, wherein the structured multi-frame transmission is coded with an identifier recognized by the transponder;
a receiver that is arranged to capture samples when activated with an array of capture buffers;
a circular correlator that is arranged to identify a correlation and a correlation phase in response to the captured samples from the receiver; and
a processor that is arranged in cooperation with the time control circuit, the transmitter, the receiver and the circular correlator, wherein the processor is arranged to initialize the remote locator in a slow ping mode, wherein in the slow ping mode the processor is arranged for:
coding a first structured multi-frame transmission with a unique identifier that is associated with the transponder;
selectively transmitting a ping during a first time interval with the transmitter, wherein the ping comprises the first structured multi-frame transmission that is coded with the unique identifier;
capturing samples with the array of capture buffers and the receiver over a first predetermined time interval that is sufficient to accumulate values for multiple transmissions of the a first sequence from the transponder;
evaluating the captured samples with the circular correlator to determine if the captured samples correlate with an expected first reply transmission for the first sequence from the transponder;
detecting a reply from the transponder when the captured samples correlate with the expected first reply transmission;
determining a distance between the remote locator and the transponder based on a time of flight between the transmission of the ping and the receipt of the reply from the transponder;
evaluating the distance relative to a first threshold associated with the electronic fence; and
activating an a first alarm mechanism when the distance between the remote locator and the transponder is determined to exceed the first threshold associated with the electronic fence mode.
16. A transponder that is configured to communicate with a remote locator that is arranged as a monitoring center for an electronic fence, the transponder comprising:
a time control circuit that is arranged to provide timing control signals, wherein the time control circuit is arranged to generate a low frequency clock and also arranged to selectively generate a high frequency clock;
a sleep timer that is responsive to the low frequency clock;
a mode control logic that is arranged to change an operating mode of the transponder in response to mode commands, wherein the mode commands comprise one of an activate fence mode command, an adjust transmission length mode command, and a calibrate mode command;
a transmitter that is operated from the high frequency clock when active, wherein the transmitter is arranged to transmit a structured multi-frame transmission to the remote locator when activated such that the structured multi-frame transmission has a transmit cadence and frequency that is determined by the internal clock of the remote locator, wherein the structured multi-frame transmission is coded with an identifier recognized by the remote locator;
a receiver that is operated from the high frequency clock when active, wherein the receiver is arranged to capture samples when activated;
a correlator that is arranged to identify a correlation and a correlation phase in response to captured samples from the receiver; and
a processor that is arranged in cooperation with the time control circuit, the transmitter, the receiver and the correlator, wherein the processor is arranged to initialize the transponder in a sleep mode,
wherein in the sleep mode the transponder is arranged for:
disabling the high frequency clock in the time control circuit;
operating the sleep timer with the low frequency clock; and
initiating a wake-up interval in response to the sleep timer;
wherein in the wakeup wake-up interval the transponder is arranged for:
enabling the high frequency clock in the time control circuit;
enabling the receiver after the high frequency clock is stable;
capturing samples with the receiver when a time for capture is identified;
processing the captured samples by:
determining if a ping correlates with an expected transmission from the remote locator, wherein processing the captured samples comprises:
coding a first structured multi-frame transmission with the unique identifier that is associated with the remote locator when the ping correlates with the expected transmission from the remote locator; and
transmitting a reply ping with the transmitter when the ping correlates with the expected transmission from the remote locator; and
activating the sleep mode after the processing of the captured samples is completed.
2. The remote locator of
3. The remote locator of
4. The remote locator of
5. The remote locator of claim 1 3, wherein the reply transmission length is adjusted by selectively instructing the transponder to hollow out the a frame for reply transmissions such that transponders that are closest to the remote locator utilize the transponder utilizes less transmit power than those transponders that are furthest from the remote locator.
6. The remote locator of
7. The remote locator of
8. The remote locator of
9. The remote locator of
10. The remote locator of
11. The remote locator of
12. The remoter remote locator of
13. The remoter remote locator of
14. The remote locator of
15. The remote locator of
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the sequence sequences of encoded transmissions, where each sequence is arranged to provide a portion of an ID code, clock synchronization and calibration information. Each receiver validates the ID code for the transmission, and decodes information. The frequency, phase, and starting time of the coded transmission sequence is determined by the transmission sequence itself such that clock recovery can be performed without additional information. The MT can be a wearable circuit such as a band or collar, affixed to an object, embedded in an object, or an implantable bionic device.
Frequency and phase information in the MT is initially recovered from one portion of the transmission from the RL, and further refined using a bootstrapping process. Timing location within the frame (e.g., coarse timing) is recovered in another portion of the transmission from the RL. After the timing, phase and frequency are recovered, data reception can be scheduled with a degree of certainty. The data is extracted and a reply message is transmitted from the MT back to the RL, where similar signal processing functions are performed. The carefully corrected round-trip time of the transmission sequence is used to identify distance between the RL and the MT. A synthetic round-trip Doppler shift, which is independent of the MT's internal clock, is measured to and correlated against the relative motion of the RL and MT to assess the magnitude of a directional vector between the RL to the MT. The magnitude of the directional vector is determined by the round-trip time of flight between the transmission and receipt of the reply.
The presently described system has the ability to identify a location of a MT with a RL utilizing an asymmetric transmission system. The signals captured by the MT will typically not be aligned in time with the start and end of a complete pattern in the sequence (e.g., a 2047 chip sequence). However, the RL is arranged to transmit repeated patterns over time in the sequence. The MT is arranged to cyclically capture a complete pattern in the sequence, even though the captured pattern may be rotated in time relative to the start and end of a complete pattern. A circular correlator can be used to evaluate the captured signals such that the captured signals are properly identified by the MT, despite the rotation status of the pattern. Since the MT does not have a priori knowledge of the timing related to transmission and reception from the RL, circular correlations of the received transmissions are used by the MT to determine the fine and coarse timing. A circular correlation correlator is a correlator that operates on a sequence of fixed length, where the sequence may be circularly shifted in time such that the beginning of the original sequence may be received in the shifted sequence after the end of the original sequence. While a general correlator may not give valid timing information, the circular correlation correlator will provide valid timing information when the captured signals are not aligned in time with the start and end of a complete pattern.
The presently described asymmetric transmission system can be configured such that the MT receives a relatively high power transmission of a structured signal from the RL, while the reply or acknowledgement transmission from the MT to the RL is a very low power transmission. An example MT is configured to operate in a very low power “inactive” mode or “sleep mode”, where the MT “activates” or “wake-ups wakes up” for brief intervals to listen for the transmission from the RL. The MT correlates each piece of its received structured signals to determine if these signals are coded with an identification code (ID Code) that is specifically associated with the MT. The MT also determines the precise frequency, timing, phase, and cadence for which a reply transmission can be transmitted back to the RL from the received structured signals. The reply transmission that is transmitted from the MT to the RL is a very low power transmission of short duration (a short structured signal) such that significant battery life is conserved. Although the reply transmission is a very low power transmission, the RL is arranged to utilize an integration and circular correlation technique to increase the signal-to-noise level of the captured reply transmission.
In the presently described system, a reply transmission signal is transmitted back to the RL from an MT, where the MT synthesizes timing, frequency, phase, and cadence for the reply transmission from signals that are received by the MT from the RL. The frequency of the reply transmission from the MT differs from the original frequency from the RL's transmission by a Doppler shift (ignoring other noise and minor error sources). As such, the RL can predict the reply transmission frequency with a very small margin of error. The potential uncertainty of the reply transmission frequency is small enough so that the phase rotation over several tens of transmission sequences is much less than one turn (one phase rotation through 360 degrees). This allows the RL to sample the reply transmission and add (or integrate), either in the analog domain or the digital domain, the respective samples from reply transmission sequence. Since noise sums as a square root and signal sums linearly, the signal-to-noise ratio for the captured signal is increased, allowing reception of a much lower level signal than would otherwise be the case without the use of exhaustive computation.
Example System
The example RL device includes a first antenna (ANT1) that is coupled to a first transmit/receive switch (SW1). The first transmit/receive switch (SW1) is coupled to a first transmitter block and a first receiver block in response to a first control signal (TX1/RX1N). A transmission sequence (e.g., TSEQ) is coupled to the first transmitter block when transmission commences, where the sequence is determined by an ID code. The first receiver block is coupled to the baseband and signal processing block. Time control is provided to the transmitter, receiver, baseband processing, and the processor in the form of various control signals (CLK1, RCLK1, TCLK1 and BBCLK1). The processor receives inputs and coordinates the operation of the baseband processing, signal analysis, memory buffering, input processing, display processing, audio processing, and any other necessary communication processing. The memory processing can include random access memory (RAM), read-only memory (ROM), as well as non-volatile memory (NVM) such as Flash memory, battery backed up RAM, EEPROM, as well as other NVM type technologies.
Additional antennas (e.g., ANT1B) can also be coupled to the receiver block of the RL such as through an additional switch (SW1B). The selection of the antenna can be accomplished by a select control signal (SEL) that is arranged to operate the additional switch (SW1B) as a multiplexer between the various antennas. The various antennas can be arranged (e.g., orthogonal to one another) as diversity antennas that are used to gain additional information about signal strength, distance and Doppler, etc.
The example MT device includes a second antenna (ANT2) that is coupled to a second transmit/receive switch (SW2). The second transmit/receive switch (SW2) is coupled to a second transmitter block and a second receiver block in response to another control signal (TX2/RX2N). A reply sequence (e.g., RSEQ) is coupled to the second transmitter block when transmission commences, where the sequence is determined by the ID code. The second receiver block is arranged to provide in-phase and quadrature signals (I and Q) that are captured in a buffer (e.g., a memory buffer such as a digital buffer or an analog sample buffer). The capture buffer is coupled to a correlator in a baseband signal processor block, which can provide both direct form correlation and FFT correlation functions. The FFT correlator is arranged to provide a circular correlation function of the received I/Q data with the complex I/Q data related to the ID code. A signal analyzer and a processor are both arranged to receive the data output from the correlator for evaluation. Time control is provided to the transmitter, receiver, and the processor in the form of various additional control signals (TCLK2, RCLK2 and CLK2). The processor receives inputs and coordinates the operation of the correlator, signal analysis, sequence generation, memory buffering, and other related tasks. The memory for the processor can include random access memory (RAM), read-only memory (ROM), as well as non-volatile memory (NVM) such as Flash memory, battery backed up RAM, EEPROM, as well as other NVM type technologies.
Current technology systems for locating people and things have a rather short battery life, which can limit their use. The present disclosure describes a small device (e.g., a transponder or a micro-transponder) that has a long battery life by suspending energy consumption until operation is required. Since the MT device needs to be in an active state for very brief intervals, the battery life is extended substantially. Although cellular telephone technologies can be used to determine position in conjunction with a global positioning system (GPS) set, the energy required to operate conventional cellular telephones even in a standby mode will rapidly deplete small batteries. In addition, a GPS set in such an application would awaken from sleep, and perform a cold start location fix, which process will consume a considerable amount of energy that again rapidly depletes the battery. The present disclosure contemplates that a portable location technology is preferably operated intermittently to minimize power consumption, and thus addresses some of the problems from conventional location determination techniques.
The present disclosure has analyzed and identified problems with current Doppler shift technology such as found in GPS signals. Although GPS signals may be detected efficiently by means of FFT correlation, there are approximately 28 GPS satellites that include a significant level of Doppler ambiguity from about ±15 ppm. For a GPS signal of 1.5 GHz and a capture interval of 1 msec, a Doppler shift of roughly 22 KHz kHz maximum requires on the order of several tens of Doppler bins or correlation attempts to identify the Doppler shift. The processing efforts necessary to utilize a conventional GPS technology are unacceptable for the presently disclosed use. For example, the MT in the current disclosure is searching for a single code, and in addition, need not contend with huge velocities, and thus does not require any Doppler bins. Moreover, the present disclosure describes an apparatus and system that has reduced capture times relative to conventional technologies, where the magnitude of the processing is reduced by approximately two orders of magnitude.
Example Remote Locator (RL)
The RL includes a processor that can be any appropriate processing means including but not limited to at least one: micro-processor, micro-controller, CISC processor, RISC processor, or application specific integrated circuit (ASIC), to name a few. The processor is arranged to: receive and evaluate inputs, control outputs, log data, retrieve logged data, and execute programs. The processor is thus arranged to communicate with any number of circuit components such as: a time control circuit, an input circuit, a display output circuit, an audio output or input circuit, a storage circuit, and a memory circuit.
Example inputs can be from any number of sources such as: an interrupt signal, a wake-up timer, a keyboard device, a keypad device, one or more buttons, a touch-screen (passive or active), a touch-panel, a joystick device, a joy-pad device, a mouse device, a touch-pad device, another processor and an input generated by a software program. Voice recognition under software control can be used in conjunction with an audio circuit to generate an input.
Audio circuits can be used as an indication means for reporting information to a user of the RL device, as well as to provide navigation and location information. The audio output device can be an audio driver circuit for a headphone type device or a speaker type device. In one example, a speaker is included in the RL. In another example, a headphone jack is provided in the RL for a user to connect a headphone type device, or perhaps an external speaker connection.
Display circuits can also be used as an indication means for reporting information to a user of the RL device, as well as to provide navigation and location information. Example display circuits can provide any appropriate video output such as, for example: an LED type display, an LCD type display, an active display, a passive display, a black and white display, a monochromatic display, and/or a color display. In some examples, the user interface can be integrated with the video output device such as, for example, a touch screen that is integrated with an LCD display. In other examples, the user input interface is separate from the video output device.
The processor in the RL of the present disclosure can be arranged to cooperate with a compass sensor device. The compass sensor can be an integrated circuit, a discrete circuit, or some other device that is arranged to provide compass sensor information that is related to a directional orientation of the RL. The compass sensor can be a digital compass device or an analog compass device that is arranged to work with an analog-to-digital converter, for example, to provide a comparable function.
The processor is arranged to apply fence mode control logic in response to a variety of user inputs for activating and deactivating a variety of operating modes as will be described. The fence mode control logic and any related settings for the RL can be provided in a read-only memory (ROM) that is loaded into a conventional memory for execution by the processor, or by some equivalent mechanism such as a non-volatile memory (NVM), a flash memory device, and hard-coded instructions in a micro-controller, to name a few. In another example, the processor and memory can be replaced with a programmable logic device (PLD), a specially designed circuit such as an application specific integrated circuit (ASIC), as well as others devices that are arranged to provide similar functionality.
The RL is operated to send a transmission that consists of a series of coded signals. The code is generated by a unique identifier (e.g., an ID Code) that is associated with a specific MT. A sequence generator is arranged to evaluate the unique identifier and create a transmit sequence. After the coded sequence is generated for the unique identifier, additional information is encoded into the transmit sequence. In one example, the additional information can be command/control instructions for the MT. Only one sequence need be transmitted to accomplish communication, timing synchronization, and sequence validation. The output of the sequence generator (e.g., TSEQ) can be filtered such as by a low pass filter (LPF1) prior to coupling the signal to the transmitter block.
The transmitter block is arranged to carrier modulate (e.g., multi-phase shift keying, binary phase shift keying, quadrature phase shift keying, differential phase shift keying, continuous phase modulation, multiple amplitude and phase shift keying, etc.) the coded signals with a carrier frequency, a spread spectrum carrier, and/or a frequency hopping method. The transmit-receive switch (SW1) is arranged to couple the carrier modulated coded signals to the antenna (ANT1) during the transmit sequence. A band-limiting filter (e.g., BPF1) can be provided between the antenna and the transmit-receive switch (SW1) such that out-of-band signals are ignored. The band-limiting filter (BPF1) can be any filter that provides reasonable band-limiting functions such as: a passive band-pass filter, an active band-pass filter, a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, a comb filter, or a strip-line filter, to name a few.
The RL is operated to receive a transmission from the MT that consists of another series of coded signals. The coded signal is similarly generated by the MT with a unique identifier (e.g., the ID Code) that is associated with the specific MT. The receiver block is arranged to receive carrier modulated (e.g., multi-phase shift keying, binary phase shift keying, quadrature phase shift keying, differential phase shift keying, continuous phase modulation, multiple amplitude and phase shift keying, etc.) coded signals from the antenna (ANT1) via SW1. The received signals are handled by a baseband processor that can also provide signal-processing functions. Alternatively, the baseband processor is arranged to provide captured signals to the processor, which is arranged to handle various signal-processing functions.
Various timing signals that are employed by the RL are generated by a time control circuit as illustrated in
The described RL performs distance measurement by a round trip time measurement. For example, the round trip time can be determined by the difference in time between the transmission of a ping from the RL to the MT, and the subsequent reply transmission of an acknowledgement from the MT back to the RL, offset by any other delays. The fence mode control logic in the RL is arranged such that the RL transmits a ping to the MT at regular intervals. Each ping corresponds to a multi-frame transmission as will be described in more detail later. When the MT is within an appropriate range, the RL will receive a reply from the MT in response to each corresponding ping, where the reply also corresponds to a multi-frame transmission. The fence mode control logic operates from a set of user selected settings that include one or more threshold distances for activating an alert. When the calculated distance exceeds one or more threshold distances, the RL communicates an alert to the user through any appropriate mechanism, such as: an audible alert, a visible alert, a vibrating alert, or an alert that is provided through some other external communication.
Example Micro-Transponder (MT)
Various processing methods are employed to perform base-band processing and signal analysis in the MT, including a correlator block and a signal analyzer block. The correlator block may include an FFT correlator and a direct-form correlator. The signal analyzer is arranged to evaluate the outputs from the FFT correlator and/or the direct form correlator, to determine if the received transmission sequence is identified with the specific MT. When the sequence is appropriately identified, various timing signals are adjusted such that the frequency and phase of the digitally synthesized transmitter and receiver signal(s) are precisely aligned in the MT with the carrier frequency observed in the previously received signal(s). Information from the coded signals is extracted by the processor once the transmission sequence is validated. Such information can include command and control instructions for the MT such as, for example, set sleep interval to a new time lapse (e.g., 10 minutes), log receiver signal strength, log invalid received signals, log receiver frequency and phase, transmit logged data, change to slow ping mode, change to fast ping mode, etc.
It is important to note that the processor in the MT of the present disclosure is arranged to apply fence mode control logic in response to signals that are received from the RL. The fence mode control logic and any related settings for the MT can be provided in any of the above described memory devices, or as hard-coded instructions in a micro-controller, to name a few. In another example, the processor and memory can be replaced with a PLD, a specially designed circuit such as an ASIC, as well as others devices that are arranged to provide similar functionality.
A reply message is transmitted from the MT to the RL such that the RL can identify, locate, and receive data from the MT. The reply message is generated with a reply sequence generator that is keyed from the unique identifier (ID Code), similar to the transmit sequence generator. A low pass filter (e.g., LPF2) can be placed between the sequence generator and the transmitter block in the MT. The transmitter block is coupled to antenna ANT2 via switch SW2 to cause the coded reply transmission (e.g., COM31, COM32).
Since an example MT operates with limited energy, the MT is normally operated in a low power or sleep mode. The energy consumed in the sleep mode is sufficient to operate a sleep timer that operates from a low frequency clock. According to a pre-determined time interval, the MT is activated (e.g., wakeup is asserted by the sleep timer) and the MT looks for a signal to receive while operating a high frequency clock. When no identifiable signal can be received, the MT returns to the sleep mode, where the high frequency clock is disabled. The high frequency clock can be enabled and disabled by a respective control signal (e.g., HF EN).
Various timing signals that are employed by the MT (or MT) are generated by a time control circuit as illustrated in
The time control circuit can include additional functionality to calibrate the low frequency clock against the more accurate high frequency clock with a calibration logic circuit. The calibration logic circuit can include any number of high frequency counters (HF CNTR), low frequency counters (LF CNTR), and digital comparator circuits (COMP), as well as other logic circuits such as registers, latches and related logic. In operation the calibration logic is enabled when a calibration signal (CAL) is asserted, such as in response to the processor when applying mode control logic.
The above described remote locator (RL) can be arranged to provide a relatively high power transmission signal (e.g., 1 Watt).
In one example, the MT is further arranged to reduce power consumption by providing a hollowed out transmission reply. Although the start time for each subsequent frame in the reply transmission will always be at identical intervals, the content of each frame will be thinned or hollowed out. The hollowed out reply transmission frame concepts will be described in further detail below with respect to
The transponder (MT) is arranged to synthesize its own internal frequency for transmitting an acknowledgement signal by using the timing information that it acquires from the RL. The timing information that is received from the RL by the MT is Doppler shifted relative to the original transmission frequencies from the RL. The resulting synthesized frequency of the MT, while extremely accurate, corresponds to a Doppler shifted version of the original transmission frequencies form from the RL. The acknowledgment signal from the MT is received by the RL, but is again Doppler shifted relative to the transmitting frequencies from the MT. The Doppler shift that result results from the round trip of the signal transmissions (i.e., transmission from the RL to the MT, and reply transmission from the MT to the RL) is hereinafter referred to as the synthetic round-trip Doppler Shift.
Example Operating Environment
Initially, a user selects a central location for the RL to be positioned within a desired geographic area. Once in place, the user selects any number of alert ranges that are centered from the RL's position in the area. For the present example, two alert ranges are illustrated as two concentric circles that are centered about the RL. However, it is understood that any number of alert ranges can be selected, where the alert method methods employed by each alert range can be different from one another.
After the alert ranges are selected, the fence mode can be activated. When fence mode is activated, the RL will periodically communicate with the MT and track the distance between the RL and the MT. When the MT travels beyond the selected alert range (see e.g., MT′), the RL communicates an alert to the user.
The user alert can be provided from the RL in any number of ways. In one example, the RL is arranged to activate an audible sound such as a fire alarm. In another example, the RL is arranged to activate a flashing warning light. In still another example, the RL includes a vibrating alert mechanism. In yet another example, the RL is arranged to establish a communication link through an external communication interface such as a serial port, a parallel port, a network communication port, as well as any other type of port. The various communication interfaces can be arranged to send an email message, an SMS message, an instant message, a pager message, a telephone call, or any other type of user alert.
Example Transmitter
The crystal oscillator is arranged to provide an oscillator signal as a clock signal (CLOCK) having a first phase (φ1) for the timing control circuit. In one example the crystal oscillator has a nominal frequency around 26.14 MHz, which can optionally be adjustable (e.g., via signal FREQ. TRIM). The oscillator can be a crystal-type oscillator, or any other oscillator that has a substantially stable oscillation frequency.
The timing control circuit includes a feedback control loop with an optional divider circuit that is arranged to synthesize a frequency. The control loop includes a phase detector, a low pass filter (LPF), a voltage controlled oscillator (VCO), and an optional divider circuit. The phase (φ1) of the reference clock signal (e.g., CLOCKREF) is compared to a phase (φ2) from a feedback signal (e.g., CLOCK′) by the phase detector to determine if the resulting clocks signal (CLOCK) is operating in phase with the reference clock (CLOCKREF). The output of the phase detector corresponds to a phase difference signal (φDIFF), which is provided to the low pass filter to generate a control voltage (VTUNE) for the VCO. The VCO adjusts the output frequency of clock signals CLKP and CLKN, which are out of phase with one another by 180 degrees. The feedback signal (CLOCK) is also provided from the VCO to the optional divider circuit. The output of the divider circuit is provided to the phase detector as signal CLOCK′, which closes the control loop. Moreover, the VCO frequency can optionally be provided to another divider circuit, which generates synthesized frequencies that are associated with a sine and cosine function.
In one example, the VCO has a nominal output frequency of 1.83 GHz, the feedback loop divider circuit has a divide ratio of 70, and the phase detector is arranged to adjust the VTUNE signal via the low pass filter such that the average value of the 26.14 MHz signal is matched to 1.83 GHz/70. Other reference signals can be employed to yield the same result by adjusting the divider ratio in the control loop divider circuit. Moreover, the output of the VCO can be further adjusted by the output divider circuit (e.g., divide ratio of 2) to yield synthesized frequencies corresponding to SIN(915 MHz) and COS(915 MHZ) or any other desired frequency.
The pattern generator includes a code control block and a pseudo-noise generator block. The code control block is arranged to provide the pre-determined patterns, keyed from an ID Code, for “A”, “B”, and “C” sequenced patterns as will be described later. The pseudo-noise generator generates complex numbers (e.g., I and Q) from the codes based on the timing signals (pattern timing) for sequencing the pattern. In one example, the pseudo noise generator block is arranged to provide 2047 complex numbers. The complex sequence (I and Q) is provided to an interpolation filter and timing control block, which is arranged to adjust the fine timing associated with the I and Q signals, and provides I′ and Q′, which are associated with a complex interpolated baseband signal. An integrator circuit is used to integrate the difference between the transmitted and received frequencies to adjust the fine timing (fine timing adjust). The interpolator provides fine timing adjustment for the I and Q complex numbers (e.g., 8192/2047), and provides low-pass filtering for the transmitter. The integrator circuit can be initialized by an initialization parameter such as fINIT and/or φINIT.
The interpolated complex baseband signals (I′ and Q′) are provided to the cordic rotator. The cordic rotator adjusts the rotational phase of the complex baseband signals (in the digital domain) in response to a phase adjustment signal (e.g., rotation phase). The phase adjustment signal is provided by another integrator that integrates the frequency offset. The integrator circuit can again be initialized by an initialization parameter such as fINIT and/or φINIT. The output of the complex cordic rotator is a frequency shifted complex baseband signal (I″ and Q″), where the frequency shifting is undertaken by the digital synthesis operations by the interpolation filter and the cordic rotator.
The complex modulator is arranged to receive the frequency shifted complex baseband signals (I″ and Q″), and the sine and cosine timing signals to provide a modulated signal output. The modulated signal output can be provided to a power amplifier (not shown) that is coupled to an antenna for transmission of the modulated signal. The various timing control signals (e.g., clock frequency, clock phase, clock offset) are adjusted such that the rate, fine-timing, and phase of the modulated signal output has sufficient timing information embedded in the resulting signal.
The code control is based on a unique identifier (ID Code). In one example, the unique identifier is provided to a polynomial generator. In another example, the unique identifier is stored in a volatile memory. In yet another example, the unique identifier is stored in a non-volatile storage such as a flash memory device, a ROM, an EPROM, an EEPROM, a dip-switch, or some other means. In still another example, the pattern that was created with the ID code is stored in a memory device or a look-up table instead of the unique identifier.
Example Transmission Sequence
Each MT in the system has a unique identifier (e.g., an M-bit address) that is used to uniquely designate a specific MT. In one example, the unique identifier is a 33-bit address code that yields approximately 8.58 billion unique identifiers. The M-bit address can be dispersed over the various patterns. In one example, a 33 bit code is evenly dispersed over the three sequences such that 11-bits are coded in “sequence A”, 11-bits are coded in “sequence B”, and 11-bits are coded in “sequence C”. In another example, the codes are not evenly dispersed over the transmission sequence. In still another example, the same code is used for each of the patterns. Each symbol that is transmitted is thus encoded according to the respective coding bits for the corresponding sequence portion. The terms “baud” and “chip” can also be used to refer to symbols.
The correlation of sequence “A” is used to verify that the first portion (e.g., the first 11-bits or bits 0-10) of the unique identifier is coded in the transmission. When a correlation is detected, fine baud and carrier timing can be derived. Further, the block timing of the patterns is now known. However, the pattern's repetition index is unknown, and therefore gross frame timing is unknown. Since the “A” pattern is repeated over the first-time interval, it is possible to accumulate the signals by adding them on top of one another before correlation is performed such that signal sensitivity is improved. In one example MT, the accumulation of signals is unnecessary. In another example MT, the accumulation of signals is performed during a repetitive tracking mode.
Once the “A” pattern has been acquired, the MT continues sampling to locate the “B” sequence. The correlation of sequence “B” is used to verify that the second portion (e.g., e.g., the second 11-bits or bits 11-21) of the unique identifier is coded in the transmission. As previously described, the “B” sequence is shifted over time. For example, a first B sequence includes coded bauds B0, B1, . . . , BM, while the second B sequence (B′) includes coded bauds B1, B2, . . . , BM, B0. When correlation is achieved with the MT's “B” sequence, the MT identifies a stream position within the “B” sequence. Combining the pattern block timing derived from “A” with the block rotation of the correlated portion of “B”, the index of the correlated “B” pattern is known, and from this the timing of all frame elements can be inferred. Once the transmission stream position is determined from the shift pattern, the MT schedules the reception of sequence “C”, whose arrival can now be predicted.
For the above described “B” sequencing example, a single baud shift is used between subsequent transmissions. Other shifting methods can be used such that the step size for shifting between subsequent transmissions can be a different integer number of baud shifts (e.g., 2, 3, 4, etc.) or a non-integer number of baud shift shifts (e.g., ½ baud, ¾ baud, 1½ baud, 2¼ baud, etc.), or a shift in samples of either an integer or non-integer variety. In another example, the shifting mechanisms between subsequent transmission can be replaced by a carrier phase rotation, where each subsequent transmission has the carrier phase rotated by a fixed amount.
Frame “C” has a third portion of the unique identifier encoded therein, and possible command and control data for the MT (or other data for the RL). The correlation of sequence “C” is used to verify that the third portion (e.g., the third 11-bits or bits 22-33) of the unique identifier is coded in the transmission. The “C” sequence can also be very slowly modulated with a few bits of data. For example, up to 63 bits of data and an error correction code (ECC) can be transferred in sequence “C”. In one example, the chips or transmit symbols are encoded by inverting or not-inverting patterns of “C” in the transmission frame. Examples of coded command and control information were previously described above.
For the above described “C” sequence, data is encoded using an inverting and non-inverting encoding method. Other data encoding methods can be used such as encoding the data with a shifting bit pattern similar to the “B” sequence. For example, a “000” binary code can be encoded, and each increment in the binary code is the same pattern shifted by an incremental shift step (e.g., ½ baud step, 1 baud step, 2 baud step, etc.). The data message nominally in “C” can be encoded with a pattern timing changes as in the nominal section “B” previously described.
The MT transmits sequences A and B in substantially the same format as that described above. However, since the RL initiated the transmission and does not have a “wake-up” period creating an ambiguity in when reception begins, the transmission sequence from the MT can be shorter overall. The shortened transmission period helps minimize the MT's energy consumption. Frame “C” is similarly formatted, but may include other reported data such as: current temperature, heart rate, blood pressure, etc.
The timing and carrier signals for transmission in the MT are derived from the RL's clock as measured against the internal MT clock. The RL in turn correlates these signals, similar to the MT, and determines the exact round-trip time. The RL also determines deviations in the signal timing with respect to its own clock, which the MT attempted to mimic. The deviation in the signal timing is a consequence of Doppler shift, noise, and oscillator instability.
An example system has the following general information for full non-hollowed transmissions:
An example system has the following RL TX parameters for full non-hollowed transmissions:
An example system has the following MT TX parameters for full non-hollowed transmissions:
The receiver frequency is digitally synthesized from a locally generated clock circuit (e.g., a crystal oscillator). The carrier wave from the RL is also digitally synthesized from its own locally generated clocking circuits, and will likely be mismatched from the receiver frequency in the MT. The mismatch may be related to thermal differences in the operating environment, heat transients in the circuits, crystal tolerances, processing differences between the MT and the RL, as well as other non-ideal effects. Moreover, the overall system is not synchronized so there is no way to initially know the starting phase, frequency and cadence associated with the transmissions.
The receiver portion of the communication system is initialized at time t1 to an initial frequency (f) that is designated as f=f0. However, the offset between the digitally synthesized receiver frequency and the carrier frequency from the received transmission is unknown at time t=t1. The MT is arranged to measure the phase associated with the received signals from pattern A as phase φ1. The phase measurement (e.g., φ1) can be generated by an output of the correlator.
At time t=t2, another portion of the transmission of pattern A is received, and the MT is arranged to measure the phase as φ2, and calculate a frequency offset error associated with the difference between the expected receiver frequency and the actual carrier wave from the RL's transmission. The frequency offset (foffset2) is determined by the difference in the phases and the elapsed time between transmissions as: foffset2=[φ2−φex2]/[360(t2−t1)] foffset2=(φ2−φex2)/(360(t2−t1)), where φex2 corresponds to the expected phase at time t2. It is important to note that the time between the first two measurements should be short enough to result in an expected relative phase difference of substantially less than 180 degrees to ensure that unresolveable unresolvable ambiguities do not occur. The expected phase is based on a reception interval for an integer period of frames that is reasonable based on expected transmission/reception time intervals. Notice that the expected phase for this time corresponds to φ1.
At time t=t3, another portion of the transmission of pattern A is received, and the MT is arranged to measure the phase as φ3, and calculate a frequency offset error associated with the difference between the expected receiver frequency and the actual carrier wave from the RL's transmission. The frequency offset (foffset3) is determined by the difference in the phases and the elapsed time between transmissions as: foffset2=[φ3−φex3]/[360(t3−t2)] foffset3=(φ3−φex3)/(360(t3−t2)), where φex3 corresponds to the expected phase at time t3. The expected phase is again based on a reception interval for an integer period of frames that is reasonable based on expected transmission/reception time intervals. It is important to note that the elapsed time for the first two measurements should again result in an expected relative phase difference of substantially less than 180 degrees to ensure that unresolveable unresolvable ambiguities do not occur. However, the absolute phase difference is expected to be significantly larger than 360 degrees such that the time difference between successive offset calculations can be gradually spaced further and further apart as the timing acquisition is adjusted by each subsequent estimate. Notice that the frequency error is gradually reduced with each subsequent adjustment until limited by the Allan Variance.
Example Receiver
The antenna is arranged to couple received signals to the LNA through the optional filter (e.g., a band-pass filter). The LNA is arranged to increase signal strength, and couple the increased signal to the mixers. The first mixer is arranged to generate an in-phase signal (I) with a cosine wave heterodyne, while the second mixer is arranged to generate a quadrature signal (Q) with a sine wave heterodyne. The in-phase signal is coupled to the ADC via LPF1 as signal IA, while the quadrature-phase signal is coupled to the ADC via LPF2 as signal QA.
The ADC is operated at a sampling frequency (fSAM) (fSAMP). The ADC can be implemented as a single A/D converter circuit with time division multiplexing between the IA and QA signals. The ADC can alternatively be implemented as two separate A/D converter circuits. The ADC circuits convert the IA and QA signals to quantized digital signals that are coupled to the buffer as signals ID and QD, respectively. The buffer can be implemented as one contiguous memory, as partitioned memory (e.g., MEM1, MEM2, etc.), or any other appropriate temporary storage that buffers the captured data.
The output of the buffer is coupled to the FFT processor, which converts the input signal to the frequency domain. The FFT of the reference signal is complex conjugate multiplied with the frequency domain representation of the captured signal. An inverse FFT of the product is taken, which is the circular correlation of the captured signal and the selected reference signal. Since the FFT reference is determined from the unique identifier of a MT (e.g., ID Code), the correlation of the FFT processor output will peak when a valid received code is identified in the signal. The carrier phase and pattern timing are also extracted from the received signals.
The multipliers are arranged to receive data from the first array and the second array to provide a multiplied output, yielding a product result that can be stored in a third array (ARRAY 3) as DM1-DMN. An inverse FFT is computed from the product identified in the third array (ARRAY 3), to retrieve the circular correlator output. The circular correlator output results can be stored in a fourth array (ARRAY 4), or can optionally overwrite the values from the third array (ARRAY 3). The contents of the fourth array (ARRAY 4), or the third array depending on the implementation, are a complex result that includes both magnitudes and phases. As illustrated in
Example Operational Flow
A transmission sequence is initialized with a unique identifier (ID Code). Sequences are generated for frame transmission such as sequence “A”, “B”, and “C” as previously described. Each of the “A”, “B”, and “C” sequences consists of bauds that are encoded with a portion of the unique code.
Next, the RL (or MT) then begins transmitting pattern “A”, and repeats transmitting pattern “A” (Note: un-shifted) until the entire “A” sequence is completed (e.g., 13×1024 sequential patterns, or frame “A”), or the equivalent time has expired for transmitting the pattern “A” frame in the case of hollowed frames. The RL then begins transmitting pattern “B”. For each subsequent transmission of pattern “B”, the pattern is shifted such as using a bit rotation algorithm, as previously described. After the entire sequence of “B” patterns is transmitted (e.g., 2000 sequential patterns, or frame “B”), or the equivalent time has expired for transmitting the pattern “B” frame in the case of hollowed frames, the RL begins transmitting the “C” pattern. The sequence of “C” patterns includes modulated data that may correspond to command and control information for the MT. After the modulated data is transmitted (e.g., 64 sequential pattern patterns, or frame “C”), or the equivalent time has expired for transmitting the pattern “C” frame in the case of hollowed frames, the RL stops transmitting and switches into a receive mode.
In the receive mode, signals are received from the MT with the RL in a similar format as provided between the RL and the MT. The RL can then calculate a distance and location based on the round-trip time and Doppler shift in the received signals as previously described. Moreover, the received “C” frame transmission may include data that is communicated between the MT and the RL, which is extracted and evaluated by the RL. Such data may include: physiological information such as heart rate, body temperature, blood pressure, heart rhythm, blood-sugar level, as well as other sensory information that is associated with a user of the MT.
Timing is refined by repeatedly scheduling capture intervals. The receiver waits, and then begins capturing a portion of the samples from each scheduled capture time, and attempts to correlate the captured samples with another portion of the reference that is keyed to the code for the MT. Each time the correlation indicates a match, the timing for the receiver is adjusted (bootstrapped) to further refine the time/frequency estimates. Eventually, the correlation of pattern A fails to match the coded reference and processing continues to capture and evaluate pattern B as will be described with respect to
After the predetermined time interval expires, the RL attempts to FFT correlate the accumulated/captured signals and noise with the first portion of the unique identifier for the specific RL. The accumulation of the captured patterns over the sequence using the described cyclic accumulation improves the signal levels and minimizes the impact of noise on the reception. When the correlation fails to identify a match, the RL determines that the transmission is intended for another device, that no transmission is present, or that an error has occurred, and returns to a sleep mode. Alternatively, the RL fine timing and phase information from the transmission sequence is used to refine the receiver timings for the RL. Processing then continues to capture and evaluate pattern B as will be described with respect to
As previously described with respect to the MT, sequence “B” is transmitted multiple times for receipt by the RL, where each subsequent “B” sequence is cyclically rotated with respect to the preceding sequence (e.g., see
After all of the samples for a pattern sequence (e.g., 4096 samples from a sequence of pattern “B”) are received (i.e., “pattern complete”), the RL will attempt to FFT correlate the integrated captured sequence with the previously generated pattern for pattern “B”. When the FFT correlation fails to identify a match, the RL falls into an error trap. Processing a received sequence may expire without match when the transmission is intended for another MT, or perhaps when an error has occurred. An error trap handles the remaining processing when an error occurs.
When the RL finds a correlation match for the generated pattern “B”, the RL can then determine the relative position of the matched pattern within the sequence (or within the frame) based on the shift position in the pattern that yields a match. Since the timing, phase, and frequency information are now known, the RL schedules to receive the “C” sequence. Processing continues for the RL in
In some examples example systems the “B” sequence is sampled four times at the transmitter, with each sequence step being four samples. For this example, the receiver samples at half the transmit rate so that each shift in the pattern corresponds to two buffer locations. In other words, the starting point for each “B” sequence capture for this example always corresponds to an even numbered buffer (e.g., 0, 2, 4, . . . ). The RL can then determine the relative position of the matched pattern within the sequence or frame by evaluating the starting point index to the buffer or sample bin that matches or correlates to the expected pattern.
Sequence “C” includes data modulated therein that may be coded with error correcting codes (ECC), where the coded information can be phase modulated and subsequently demodulated and decoded. When the time-period has not expired, capturing of the expected C sequence is resumed, followed by correlation determinations again. When the time-period has expired without a match of sequence “C”, the MT determines that the transmission is intended for another and traps an error condition appropriately. Alternatively, the MT finds a match for pattern “C” and evaluates the polarities of the symbols received in this frame, and extracts command and control information from the “C” sequence.
In the case of the MT, the completed capture of sequence C is followed by a transmission of sequences “A”, “B”, and “C2” (or some other order, perhaps, or even a different set of A′B′C′. Sequences “A” and “B” include a similar pattern as previously described for the RL, although shorter in length. Sequence “C2” is still the same number of frames except that data is encoded into the transmission for communication between the MT and the RL.
In the case of the RL, the completed capture of sequence C is followed by evaluation of the round-trip time to determine linear distance from the RL to the MT. A time difference is evaluated between the reception of two signals that are received from two different receiving antennas to help identify a vector for direction between the RL and the MT. An analysis of a Doppler shift in the received signals from the MT can also be used to assist in the determination of the directional vector. In addition, sequence “C” is evaluated to extract transferred information from the MT to the RL. Moreover, measurements from the compass sensor and can be utilized to assist in determining location.
Example Operational Features and Observations
The present disclosure merges “location request” polling with the location process itself. The RL device is arranged to provide a relatively lengthy, powerful, coded signal whose duration spans the polling interval of the MT. The MT very briefly samples the relevant spectrum, and finds a coded spread spectrum signal. In this event, the MT performs multiple signal captures from the lengthy transmission, making successively more accurate estimates of the signals frequency, cadence, and time reference. These estimates are limited in precision by the short-term stability (root Allan variance) of the MT's and RL's time bases (e.g., a quartz crystal oscillator) and by the relative acceleration between the RL and the MT. This Allan variance will typically be better than 1 part per billion, but the acceleration for observation periods of 0.25 seconds may be the order of: 10 meters/sec2 by 0.25 seconds, which would give a 2.5 meter/second Doppler change. This lurch is unusual, and typically, a 0.25 meter/second change or less is observed. A velocity change of 0.25 meter/second round-trip is 0.5 meter/second, which is a Doppler change of 0.5/3*108, or 1.6 parts per billion (ppb). Thus, the estimates of incoming signal frequency/sequence should have a precision of approximately two (2) parts per billion or better. Experimentally, two (2) ppb has been observed.
The MT can use the precise estimate of the received signal timing to synthesize a coded spread spectrum reply with substantially the same timing and carrier frequency. This reply signal is emitted shortly after the end of the incoming signal. Since the timing is accurately captured, the presence of a delay or gap doesn't materially degrade accuracy. For example, if the time-base error is 2 ppb, then a 30 ms delay translates into a time uncertainty of approximately 60 ps, which is about one centimeter of round trip distance.
The coded reply signal from the MT is sufficiently lengthy so that integration over time compensates for its relatively low power. The signal from the MT can be coherently processed by the RL since the return signal is coherent plus or minus the synthetic round-trip Doppler shift with the RL's time base. A cyclic set of 4096 complex capacitive integrators can be used to perform the process of signal accumulation to raise the weak signals up and out of the noise floor. The complex patterns (e.g., a pattern of length 2047 chips) have approximately 33 db dB of spreading gain. The addition of the cyclic integrators can achieve an additional 20 db dB of signal gain with the repetitive portions of the signal, yielding 53 db dB of total gain. A bandwidth reduction from 26 MHz down to about 100 Hz is achieved with this technique. The thermal noise over the 100 Hz bandwidth is approximately −154 dbm dBm, where reasonable signal reception is expected around a noise level of −140 dbm dBm. A maximum path loss of 150 dB is achieved for a +10 dbm dBm transmitter. The corresponding ideal free space range for this transmitter is approximately 1000 km assuming a 915 MHz signal and an omnidirectional antennae. This large free space range or loss margin is useful for building penetration, implanted devices, and so forth.
The capture duration in the MT is limited by the relative crystal frequency tolerance between the MT and the RL. With time and temperature, and taking advantage of periodic calibration signals, this tolerance can be managed to a few parts per million. Thus, the product of the signaling frequency and the crystal tolerance gives a frequency offset, which in turn indicates the maximum possible reception time without the use of multiple Doppler bins or repeated correlation attempts. For example at 915 MHz and with a 3.5 ppm frequency error, a capture period of 312 μs would correspond to a first complete signal null.
The RL will in general receive a signal whose cadence and frequency very closely match its internal crystal clock, and thus the RL can use long cyclic integration times, which greatly increase the available signal to noise ratio. The described coherent integration (or coherent accumulation) process has a signal power maximum when the signal has rotated through 180 degrees at the end of the capture interval. For a 3.5 ppm frequency tolerance, when the period of the spread signal is designed to be about 150 μs. It is advantageous to use a signal which is itself complex. Improved orthogonality between coded signals is achieved by using a complex signal. For example, the Gold codes used in the GPS system have a length of 1023 chips with a cross correlation of approximately −24 db dB for 1025 possible codes. The complex signaling codes employed in the presently described disclosure is on the order of length 2047 chips, with a cross-correlation of −33 db dB for 2048 possible codes. The use of complex codes allows for improved signal rejection.
The round trip Doppler shift between slowly moving objects (e.g., people walking) is on the order of 4-5 ppb. Slowly moving objects provide a significantly longer integration time in cases where the received signal is likely to be very close in frequency to the RL's time base. Even automobile speeds will result in a round-trip Doppler-shift of 200 ppb or less.
Power Conservation and Signal Interference Reduction by Hollowing Transmission Frames
The described system performs distance measurement measurements by round trip time measurements. The fence mode is arranged to provide regular tracking of the distances between the RL and the MT without excess energy consumption or spectral pollution. After a transponder and locator have exchanged signatures, they share very precise mutual clock rate information. The accuracy of this clock rate information, absent any Doppler shift, is one part per billion or better. As time elapses between transmissions, the unit time bases, which aren't perfectly steady, will drift with respect to each other. By calibrating the crystal oscillator in each unit (both the MT and the RL) against the high frequency clock in each unit, the accuracy of the clock rate information can be extend for periods of a minute or so. In sum, it is not necessary to use a long locator transmission to overcome time uncertainty. However, a long initial baseline for frequency determination is necessary to initially synchronize the clocks between the MT and the RL. Once synchronized/calibrated, excessive accumulation of reply transmissions from the MT is not necessary since precise timing is known.
To reduce power consumption and reduce interference from other devices, the transmission frames can be “hollowed out” or thinned. The benefit of hollowing out the transmission frames is that there is a drastic reduction of radio noise, allowing other equipment or other locators to operate in the same local area. The benefit of hollowing the MT and RL transmissions is a huge reduction in energy consumption and a reduction in interference with other devices.
The hollowing out of the MT reply signal can be done when the MT and the RL are relatively close to one another since the MT's low power signal is normally integrated by the RL. In fence mode, the RL is arranged to monitor the distance of a proximate MT such that power conservation by thinning or hollowing is possible.
When the MT is located very close to the RL, the RL has a very high signal-to-noise ratio (SNR) and the frames provided from the MT to the RL can be hollowed out since long integration is not necessary. As shown in
As the MT travels further from the RL, the SNR degrades slightly and the MT and RL can increase the energy being transmitted. As shown in
Since the low-speed clock is calibrated as a precise number of high-speed clock ticks, the transponder can sleep for short periods of time and resume with confidence regarding the approximate timing of upcoming signals, if needed. The problem of searching through A & B A and B for frame and packet timing information can be avoided in these instances. By allowing the transmitter to remain active, although quiet, the transmitter can later resume and the carrier and data phase timing are preserved. As a consequence of these factors, a synchronized transmitter and receiver can be arranged to operate as though a constant transmission is occurring, while ignoring the quiet times. Both the RL and the MT remain quiet during these portions of time while maintaining their respective high speed clocks active.
In general, when recent timing information is available and future sessions can be scheduled with good accuracy (˜ a few baud, or +/−200 nS ns or so), packets of sequence “A” can be reliably captured at the known times. These times can be close together or spaced apart in time. Receipt of the “A” transmission portion can be utilized to regain fine carrier timing since the gross timing from the “B” transmission is already known.
In situations such as fence mode, after the initial full capture sequence is used to acquire gross and fine timing, subsequent captures maybe be as few as four “A” packets in a burst (600 uS μs), or several individual “A” packets spread out over a few mS ms. If “C” modulated data is needed, then the “C” packet can be sent. In some applications where the coarse and fine timing have been acquired and the RL and MT have not lost communications between one another, as few as zero “B” or “C” packets might be sent. In other situations where the RL and the MT lose contact between one another and the sequence position is lost (e.g., the uncertainty is approximately 50 uS μs of drift for sequences that are 157 uS μs long), the “B” pattern is required to bring the timing back into proper operation.
Example Fence Mode Processing
As shown in
A long time period is required between wake-up intervals for the transponder in the fence mode. The time period for the wake-up interval is determined by the low frequency clock, while the transmitter and receiver is are operated with the high-frequency clock. In order to know precisely when the capture interval for the receiver is to occur, the high frequency clock and the low frequency clock need to be calibrated with respect to one another. Assuming the low frequency clock is operated as at a frequency of 32.768 KHz kHz and the high frequency clock is 26 MHz, a count of 3584 periods of the low frequency clock corresponds to 2,859,375 periods of the 26 MHz clock. During a calibration mode, the high frequency and low frequency counters are initialized to zero and the counters are enabled on the rising edge of the low frequency clock. After the low frequency counter achieves a count of 3584, the high frequency counter is stopped and evaluated. The error in the low frequency count is then determined from the difference between the expected count of the high frequency counter (e.g., 2,859,375) and the actual count from the high frequency counter. The calibration is completed by analyzing the desired wake-up time interval, determining how many high frequency clocks the error in the wake-up interval corresponds to, and calibrating the low frequency clock based on these factors.
The presently described system, apparatus, and methods take advantage of the acquired frequency knowledge to allow for synthesis of a time and phase coherent response to accurately determine location with a low-power MT. Although the preceding description describes various embodiments of the system, the invention is not limited to such embodiments, but rather covers all modifications, alternatives, and equivalents that fall within the spirit and scope of the invention. For example, the positioning of the various components may be varied, the functions of multiple components can be combined, individual components may be separated into different components, or components can be substituted as understood in the art. Since many embodiments of the invention can be made without departing from the spirit and scope of the invention, the invention is not limited except as by the appended claims.
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