Copper alloy and liquid-crystal display device

Abstract

A method of forming an oxide film on a surface of a copper alloy, including the steps of providing a copper alloy including copper and an element selected from the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, Ba, Pr and Nd, and diffusing atoms of the element to a surface of the copper alloy so as to form an oxide film on the surface of the copper alloy,

wherein a concentration of the element in the copper alloy is more than 0.1 and not more than 20 atomic percentage and within a solubility limit of the element in the copper.

Description

This application
wherein μi represents a chemical potential of i component, μi° represents a chemical potential of i component in the standard state, γi represents an activity coefficient, and Ni represents a molar fraction.

Activity coefficient γi indicates interaction in Cu, and, when “activity coefficient γi”>1, i component is easily released from Cu. When “activity coefficient γi”<1, i component attracts Cu and remains in Cu. Further, when “activity coefficient γi”<1, the additive element as i component and Cu narrow the solubility limit and hence are more likely to form an ordered alloy or intermetallic compound.

The element added to the Cu alloy having activity coefficient γi in Cu of more than 1 is released from Cu atoms. Further, the additive element quickly reaches the surface of the Cu alloy and is more likely to be oxidized than Cu, thus forming an oxide film layer on the surface of the Cu alloy. The additive element having an activity coefficient of less than 1 is likely to remain in Cu and hence hardly reaches the surface of the Cu alloy, so that an oxide film layer cannot be formed, leading to a problem in that oxidation of Cu proceeds.

The activity coefficient was measured as follows. The copper alloy is dissolved in a Knudsen cell, and the composition dependency of an ion current is measured by means of a mass spectrometer. The results were analyzed using an integral equation of Belton-Fruehan in order to obtain an activity coefficient.

In the Cu alloy of the invention, the additive element used is capable of being dissolved in the Cu alloy in the range from 0.1 to 20.0 at. %. The solubility limit means the maximum additive concentration in a concentration range where both additive element and matrix element mix randomly without forming an intermetallic compound. When an intermetallic compound is formed in the Cu alloy, the conductivity of the Cu alloy is markedly lowered. For example, even in the Cu alloy having conductivity as high as that of Cu, deposition of a different phase causes the interface between the phase and Cu in the alloy to break the arrangement of metals, making the movement of electrons difficult. Therefore, it is required that the additive element being dissolved in Cu. Further, the additive element, which is not dissolved in the Cu alloy, hardly diffuses. Particularly, when the additive element and Cu form an inter-metallic compound, the additive element rarely diffuses.

The additive element is contained in the Cu alloy in an amount in the range from 0.1 to 20.0 at. %. When Mn is added in an amount of less than 0.1 at. % to the Cu alloy, the resultant oxide film layer has too small a thickness to prevent oxidation of Cu. When the amount is more than 20.0 at. %, the conductivity of Cu is lowered, or an intermetallic compound is likely to be formed at ambient temperature.

The element added to the Cu alloy may be at least one metal selected from the group consisting of Mn,Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Sa, Pr, and Nd. These metals may be used in combination. Each of these metals forms on the surface of Cu an oxide film layer which can prevent Cu from suffering oxidation in an oxidative atmosphere. More preferred are Mn, Ga, and Li. They have a large diffusion rate in the Cu alloy. Particularly, Mn has a melting point higher than that of Cu, but it is more likely to form an oxide than Cu, and further it forms an oxide which rarely transmits oxygen. Ga and Li have a melting point lower than that of Cu and a larger diffusion rate, and therefore they have a high rate of forming an oxide film layer on the surface of the Cu alloy, making it possible to suppress the loss of Cu.

The Cu alloy of the invention may contain an impurity inevitably mixed, such as S, Se, Te, Pb, Sb, or Bi, in such an amount that the conductivity or strength of the copper alloy of the invention is not sacrificed. In the Cu alloy of the invention, the content of an impurity element having a diffusion coefficient in Cu at 400° C. smaller than the self-diffusion coefficient of Cu is equal to or less than 0.1 at. %, preferably equal to or less than 0.05 at %. An element having a small diffusion coefficient stays in the Cu alloy for a prolonged time, and forms an oxide, together with oxygen (O) which has intruded into the Cu alloy, and the resultant nonmetal-containing substance considerably lowers the conductivity of the Cu alloy. Therefore, when the impurity element content exceeds 0.1 at. %, the conductivity of the Cu alloy is markedly lowered. Particularly, examples of impurity elements include metals, such as Mg, Al, Cr, Fe, Co, Ni, Nb, Ru, Ir, Pd, and V. Especially, the impurity element having a small diffusion coefficient remains in Cu as a solid solution element, is deposited at the grain boundary or in the grain, or forms an oxide to constitute a nonmetal-containing substance, thus considerably lowering the conductivity.

The copper alloy of the invention can be used in the form of a wiring comprised of the Cu alloy on, for example, a display device, semiconductor device, or wiring substrate. With respect to the method for using the Cu alloy, there is no particular limitation. A plating process, such as an electrolytic plating process or a melt plating process, or a physical vapor deposition process, such as a vacuum vapor deposition process or a sputtering process, can be used. The thus formed Cu alloy is subjected to heat treatment in an oxidative atmosphere containing oxygen, so that the additive element diffuses and reaches the surface of the Cu alloy and is oxidized faster than Cu, thus forming an oxide film layer. For example, when Mn is added as the additive element, MnOx is formed on the surface of the Cu alloy. A (Cu, Mn)Ox composite oxide containing Cu may be formed in the oxide film layer, and the oxide film layer may be formed from any oxide.

This oxide film layer is formed so as to have a thickness of 1 to 10 nm. The thickness of the oxide film layer depends on the diffusion amounts or diffusion rates of the constituent additive element, Cu, and oxygen in the oxide film layer. Therefore, the thickness varies depending on the temperature or time of heat treatment and the properties of the oxide film layer formed. An oxide of the additive element, e.g., Mn suppresses the diffusion amounts or diffusion rates of the additive element, Cu, and oxygen, and hence can prevent the oxide film layer from growing to have too large a thickness. For this reason, the thickness of the oxide film layer substantially does not exceed 10 nm. Further, the oxide film layer having a thickness equal to or more than 1 nm can exhibit insulation properties with respect to the Cu alloy. Therefore, it is preferred that the oxide film layer is formed so as to have a thickness of 1 to 10 nm. For efficiently forming the oxide film layer having a thickness equal to or more than 10 nm, it is necessary to increase both the temperature and time of the heat treatment.

The additive element is subjected to heat treatment at a temperature in the range from 200 to 600° C., preferably for a period of time in the range from 5 minutes to 2 hours. When the temperature of the heat treatment is lower than 200° C., the formation of an oxide film requires a prolonged time, lowering the productivity. When the temperature of the heat treatment is higher than 600° C., a problem occurs in that Cu is oxidized to form an oxide film layer before the element added to the Cu alloy diffuses and reaches the surface. When the time of the heat treatment is shorter than 5 minutes, the oxide film layer does not grow to have a satisfactory thickness, and, when the time of the heat treatment is longer than 2 hours, the thickness of the oxide film layer substantially does not change any more, and hence the heat treatment for such a long time is meaningless.

In the copper alloy of the invention, when the Cu alloy is in contact with an oxide layer or another metal layer, an oxide film layer containing the additive element can be formed at the interface between the copper alloy and the oxide layer. In this case, when the additive element has an absolute value of oxide formation free energy smaller than that of the element in the oxide layer, the oxide film layer can be formed using oxygen introduced from the outside without reducing the oxide to remove oxygen therefrom.

When the Cu alloy is in contact with another metal layer in an oxidative atmosphere, an oxide film layer can be formed at the interface between the copper alloy and the metal layer.

For example, with respect to SiO₂ used as an insulating material for forming a liquid crystal display device or semiconductor device, the Cu alloy, which contains, as the additive element, Mn having an absolute value of oxide formation free energy smaller than that of Si, and which is in contact with SiO₂, is subjected to heat treatment to form a composite oxide film layer comprised of (Cu, Mn, Si) Ox containing Mn at the interface between the Cu alloy and SiO₂. When the additive element has an absolute value of oxide formation free energy larger than that of the metal in the oxide layer, part of the oxide layer can be reduced to form a strong oxide film layer. In any case, an oxide film layer can be formed at the interface between the oxide layer and the Cu alloy.

As the additive element, Mn is especially preferred. In the Cu alloy containing Mn, Mn oxide is formed as an oxide film on the surface, or a composite oxide comprising Mn and at least one element selected from the constituent elements of the solid adjacent to the Cu alloy is formed as an oxide film at the interface. Mn is dissolved in Cu at about 20 at. % at room temperature, and has a larger solid solubility at higher temperatures, and therefore the alloy material containing Mn is easy to dissolve or cast, and a sputter target can be easily prepared from the alloy material. In addition, Mn oxide has an absolute value of formation energy larger than that of Cu oxide, and hence Mn diffuses to the surface or interface to form an Mn oxide first. Further, the diffusion coefficient of Mn in Cu is larger than the self-diffusion coefficient of Cu, and therefore Mn reaches the surface or interface to form an oxide film first before Cu is markedly oxidized.

Activity coefficient y of Mn in Cu is larger than 1.0, and therefore Mn cannot be dissolved in Cu due to the driving force of forming an Mn oxide and is separated from Cu to form an oxide film on the surface or interface. Even when Mn is added in an amount larger than the appropriate amount and remains in Cu, the electric resistivity increase rate of the remaining Mn per 1 at. % is as small as 2.8 μΩcm, and therefore a marked lowering of the conductivity does not occur. In addition, Mn has activity coefficient Y equal to or more than 1, and therefore appropriate selection of an oxidative atmosphere completely separates Mn from Cu to lower the electric resistance of the alloy to the level of pure copper. The thus formed Cu—Mn alloy can keep both excellent electrical conductivity and excellent oxidation resistance. Further, even when the adjacent solid material is SiO₂, the absolute value of oxide formation free energy of Mn is smaller than that of Si and hence, unlike Mg, Mn does not reduce SiO₂ to diffuse Si atoms into Cu.

FIG. 1 is a graph showing a relationship between the heat treatment temperature and the electric resistance. When the Cu alloy containing Mn as the additive element is subjected to heat treatment at a temperature equal to or more than 400° C., the electric resistance of the Cu alloy is lowered to a value close to 1.7 μΩcm, which is the electric resistance of bulk pure Cu. In contrast, with respect to the Cu alloy containing Mg or Al, the electric resistance is lowered as the temperature of the heat treatment rises, but the electric resistance gradually increases at about 400° C. or higher which indicates that drastic reduction of the resistance as can be seen in Mn is not found.

The reason for this resides in that the growth of crystal grains of the Cu alloy lowers the electric resistance, but Mg or Al is dissolved in Cu due to their small activity coefficient of less than 1.0 to increase the electric resistance. Further, Mg or Al reduces SiO₂ to diffuse Si into Cu, thus increasing the electric resistance.

The Cu alloy can be used as a sputter target material. Mn, Zn, Ge, Sr, Ag, Cd, In, Sn, Ba, Pr, or Nd dissolved in Cu prevents the occurrence of accidental discharge during the sputtering, making it possible to form a uniform film free of voids. In addition, a sputtered film formed from the Cu alloy has highly uniform thickness, which can remarkably improve the yield, and, by subjecting the sputtered film to heat treatment, an oxide film layer can be formed on the surface or at the interface between the sputtered film and the oxide layer.

An electrode film used in a conductor or liquid crystal is required to have a low specific resistivity, and therefore conductive thin films using Cu sputtering target materials have been widely used. Accordingly, the Cu alloy of the invention is molten and alloyed by a casting process to produce a sputtering target material. Casting in a vacuum can prevent Mn or the like from suffering oxidation. Further, the element added to the Cu alloy has a large diffusion coefficient and has activity coefficient Y larger than 1, and therefore a uniform sputtering target material free from segregation can be obtained.

The Cu alloy of the invention can be used as a wiring material for use in a liquid crystal display device or semiconductor device. It is especially preferred that the Cu alloy is used in a liquid crystal display device. The liquid crystal display device comprises a pair of substrates, a liquid crystal layer sandwiched between the substrates, an electrode formed on the surface of the substrate on the liquid crystal layer side, and a wiring layer disposed on the surface of the substrate and electrically connected to the electrode.

FIG. 2 is a schematic diagram of a configuration of the liquid crystal display device according to the invention.

The liquid crystal display device (hereinafter, “LCD”) according to the invention is of an inverted staggered-structure TFT type, but the liquid crystal display device is not limited to this type, and can be applied to an etching stopper/inverted staggered structure, back channel/inverted staggered structure, or staggered structure TFT. The semiconductor film used in the TFT is not limited to an a-Si film, and may be a polysilicon film. It may be used not only in a gate line but also in a signal line or an electrode of source/drain.

As shown in FIG. 2, a liquid crystal display device 1 comprises a transparent substrate 11 comprised of glass having on one side a transparent common electrode 13 comprised of an ITO (indium tin oxide) film, and a facing transparent substrate 12 having on one side a transparent pixel electrode 14 comprised of an ITO film, wherein the transparent substrates are disposed so that the respective surfaces on the electrode side face each other. The substrates 11, 12 are disposed through a substrate spacer at a space of several μm, which is filled with a liquid crystal layer 15, and the periphery is sealed. That is, the liquid crystal layer 15 is sandwiched between a pair of substrates.

FIG. 3 is a schematic diagram of a pixel configuration in the liquid crystal display device according to the invention. On the facing substrate 12 having thereon the pixel electrode 14, the pixel electrode 14, a TFT switching element 16, a gate line 17, a signal line 18, and a stored capacity line 19 are disposed two-dimensionally so that they are equivalent to the circuit from the viewpoint of plane. Specifically, the gate lines 17 extending in the row direction of the image display and the signal lines 18 extending in the column direction are disposed in a matrix, and the stored capacity line 19 is disposed in parallel to each of the gate line 17. The TFT switching element 16 and the pixel electrode 14 are formed in a region unit defined by the gate line 17 and the signal line 18, and the TFT switching element 16 is electrically connected to the gate line 17 and the signal line 18 at the corner of the region unit. That is, a drain electrode 22 of the TFT is connected to the signal line 18, a source electrode 23 is connected to the pixel electrode 14, and a gate electrode 21 is connected to the gate line 17.

FIGS. 4(1) and 4(2) are schematic cross-sectional diagrams of a pixel configuration in the liquid crystal display device according to the invention, where FIG. 4(1) is a portion of the TFT transistor element, and FIG. 4(2) is a portion of the stored capacity line. In FIGS. 4(1) and 4(2), enlarged cross-sections of the gate electrode 21 and the stored capacity line 19 integrally extending from, respectively, the TFT switching element 16 and the gate line 17 on the glass substrate 12 are shown, and the gate electrode 21 comprises a conductive layer 211 as a metal portion comprised of a Cu alloy, and oxide film layers 212, 213 covering the conductive layer. The oxide film layer 213 is also present between the conductive layer 211 and the substrate 12. Similarly, the stored capacity line 19 comprises a conductive layer 191 comprised of a Cu alloy, and oxide film layers 192, 193 covering the conductive layer. On the substrate 12 having formed thereon the gate electrode 21 and the metal lines 17,19, an insulating film 24 comprised of a plurality of layers is deposited, and an a-Si layer 25 is formed in the TFT region on the upper surface, and further the drain electrode layer 22 and the source electrode 23 are formed. On the other hand, in the pixel region on the stored capacity line 19, the pixel electrode 14 comprised of ITO is formed and electrically connected to the source electrode layer 23. The drain electrode layer 22 is electrically connected to the signal line 18.

The stored capacity line 19 is described with reference to FIG. 4(2). A Cu alloy is first sputtered against the glass substrate 12 and etched to form a Cu alloy layer pattern for an address line 17, the gate electrode line 21, and the stored capacity line 19. The pattern is then subjected to heat treatment in an oxidative atmosphere containing a very small amount of oxygen to form the oxide film layers 212, 213 on the surface of the conductive layer 211 comprised of a Cu alloy. That is, the heat treatment oxidizes the surface of the Cu alloy to form the oxide film layers 212,213. The oxide film layer 213 is also formed between the conductive layer 211 and the substrate 12.

Next, an SiO_x insulating layer 241 and an SiN_x film 242 are stacked on one another as the insulating film 24 by sputtering and CVD processes, and further the undoped a-Si layer 25 is formed. The ITO pixel electrode 14 is then formed, followed by formation of a contact hole. Subsequently, a metal layer constituting the drain electrode 22 and the source electrode 23 is formed, and then the drain electrode 22 and the source electrode 23 are formed using an etching solution. The a-Si layer 25 is then etched by CDE to form an SiN_x protecting film, and a hole is formed in the contact portion to produce the TFT portion 16.

In the liquid crystal display device according to the invention, the gate electrode 21 and the source/drain electrodes 22, 23 of the TFT and the wirings 17,18,19 connected to them are formed from a copper (Cu) alloy which contains an additive element having an oxide formation free energy smaller than that of Cu and having a diffusion coefficient in Cu larger than the self-diffusion coefficient of Cu.

EXAMPLES

First Embodiment

The above embodiment is explained in further detail below.

Using a Cu—Mn alloy of Cu having a purity of 99.9999% and Mn having a purity 99.98% as sputtering target materials, a Cu-7 at. % Mn alloy thin film was formed on an Si substrate having SiO₂ on its surface. The resultant alloy thin film was subjected to heat treatment in an Ar gas atmosphere (oxygen content: 100 ppm) at 400° C. for 30 minutes. Element concentration distribution in the thickness direction of a specimen from the surface was then determined using secondary ion mass spectrometry (SIMS).

FIG. 5 shows results of the concentration distribution determined by the SIMS.

A specimen was sputtered by an ion beam in the direction from the surface of the thin film to SiO₂ and the mass of secondary ions being sputtered from the specimen was continuously measured to determine the concentration distribution inside the specimen. It has been found that MnO_x is present on the surface. The presence of Cu. Mn, Si, and 0 is observed in the position of specimen corresponding to the sputtering time of 35 to 40 minutes. This indicates an oxide film layer comprised of a composite oxide formed at the interface.

FIG. 6 is a photograph of a cross-section examined under a transmission electron microscope (TEM): FIG. 7 is a schematic diagram of a state where an oxide film layer is formed at the interface between the Cu—Mn alloy and SiO₂. The examination under a transmission electron microscope

(TEM) has confirmed that new layers are formed on both sides of the Cu—Mn alloy. The peak intensities of Cu and Si include the intensity of the adjacent layer, but it is clear that an oxide containing Mn is formed. This oxide film layer grown at 450° C. to have the maximum thickness of about 8 nm and did not grow any thicker.

Embodiments of the liquid crystal display device are explained below in further details.

Second Embodiment

In a channel etched amorphous silicon (a-Si) TFT liquid crystal display device, the gate wiring shown in FIG. 2 is formed as follows. A Cu-2 at. % Mn alloy thin film is first formed on a cleansed glass substrate using a Cu-2 at. % Mn alloy of Cu having a purity of 99.9999% and Mn having a purity of 99.98% as a target material. A wiring pattern for gate line is formed on the resultant alloy thin film by a photoresist process and a dry etching process. The pattern is then subjected to heat treatment in an Ar gas atmosphere (oxygen content: 100 ppm) at 400° C. for 30 minutes. Stable oxide layers are formed at the interface between the Cu—Mn alloy and the glass substrate and on the surface of the Cu—Mn alloy.

Third Embodiment

A planar polysilicon (p-Si) TFT liquid crystal display device is produced as follows. The p-Si film is first deposited on a cleansed glass substrate by a plasma enhanced chemical vapor deposition (PECVD) process, and then thoroughly subjected to laser annealing to form polycrystalline Si (p-Si). The p-Si film is patterned and then an SiO₂ gate insulator film is formed by a CVD process. A film of a Cu-2 at. % Mn alloy is then formed by a sputtering process and etched to form a gate electrode. Next, the resultant substrate is subjected to heat treatment in a vacuum at 400° C. for 30 minutes. The substrate is subsequently doped with an impurity by an ion doping process, and a source and a drain are formed in a self-alignment manner, forming an interlayer dielectric film. The resultant substrate is then subjected to heat treatment at 400° C. for 30 minutes. FIG. 8 is a schematic diagram of thus formed planar polysilicon (p-Si) TFT through the above steps. In FIG. 8, an oxide comprised of Mn is formed on the gate insulator film and at the interface between the interlayer dielectric film and the Cu—Mn alloy wiring.

By the means for solving the problems, the invention provides a copper alloy which is advantageous in that it can form on the copper surface an oxide film layer having high adhesion to the copper surface without lowering the electrical conductivity of copper.

Further, by the means for solving the problems, the invention provides a liquid crystal display device having a wiring formed on the surface thereof an oxide film layer having high adhesion to the wiring surface without lowering the electrical conductivity of the electric wiring layer. By virtue of having this wiring layer, the liquid crystal display device provided need not form an insulating layer comprised of an oxide by vapor deposition or the like and can form an oxide film layer merely by a heat treatment, thus simplifying the production process.

Claims

1. A method of forming an oxide film on a surface of a copper alloy, comprising the steps of:

providing a copper alloy including copper and an element selected from the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, Ba, Pr and Nd; and

diffusing atoms of the element to a surface of the copper alloy so as to form an oxide film on the surface of the copper alloy,

wherein a concentration of the element in the copper alloy is more than 0.1 and not more than 20 atomic percentage and within a solubility limit of the element in the copper.

2. The method of forming an oxide film on a surface of a copper alloy of claim 1,

wherein a thickness of the oxide film is 1 to 10 nm.

3. The method of forming an oxide film on a surface of a copper alloy of claim 2,

wherein an electric resistivity of the copper alloy is equal to or more than 1.7 μΩcm and equal to or less than 7 μΩcm.

4. The method of forming an oxide film on a surface of a copper alloy of claim 1,

wherein the step of diffusing atoms of the element is performed by heating the copper alloy at a temperature from 200° C. to 600° C.

5. The method of forming an oxide film on a surface of a copper alloy of claim 4,

wherein the heating is performed for 5 minutes to 2 hours.

6. A method of forming an oxide film on a surface of a copper alloy, comprising the steps of:

providing a copper alloy including copper and an element selected from the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, Ba, Pr and Nd;

forming a layer of the copper alloy on a layer of an oxide; and

diffusing atoms of the element to an interface between the layer of the copper alloy and the layer of the oxide so as to form an oxide film at the interface,

wherein a concentration of the element in the copper alloy is more than 0.1 and not more than 20 atomic percentage and within a solubility limit of the element in the copper.

7. The method of forming an oxide film on a surface of a copper alloy of claim 6,

wherein a thickness of the oxide film is 1 to 10 nm.

8. The method of forming an oxide film on a surface of a copper alloy of claim 7,

wherein an electric resistivity of the copper alloy is equal to or more than 1.7 μΩcm and equal to or less than 7 μΩcm.

9. The method of forming an oxide film on a surface of a copper alloy of claim 6,

wherein the step of diffusing atoms of the element is performed by heating the copper alloy and the layer of the oxide at a temperature from 200° C. to 600° C.

10. The method of forming an oxide film on a surface of a copper alloy of claim 9,

wherein the heating is performed for 5 minutes to 2 hours.

11. A method of forming an oxide film on a surface of a copper alloy, comprising the steps of:

providing a copper alloy consisting essentially of copper and manganese; and

diffusing atoms of manganese to a surface of the copper alloy so as to form an oxide film comprising manganese on the surface of the copper alloy,

wherein a concentration of the manganese in the copper alloy is more than 0.1 and not more than 20 atomic percentage and within a solubility limit of the manganese in the copper.

12. The method of forming an oxide film on a surface of forming an oxide film on a surface of claim 11,

wherein a thickness of the oxide film is 1 to 10 nm.

13. The method of forming an oxide film on a surface of claim 12,

wherein an electric resistivity of the copper alloy is equal to or more than 1.7 μΩcm and equal to or less than 7 μΩcm.

14. The method of forming an oxide film on a surface of claim 11,

wherein the diffusion is performed by heating the copper alloy at a temperature from 200° C. to 600° C.

15. The method of forming an oxide film on a surface of claim 14,

wherein the heating is performed for 5 minutes to 2 hours.

16. A method of forming an oxide film on a surface of a copper alloy, comprising the steps of:

providing a copper alloy consisting essentially of copper and manganese;

forming a layer of the copper alloy on a layer of a silicon oxide; and

diffusing atoms of manganese to an interface between the layer of the copper alloy and the layer of the silicon oxide so as to form an oxide film including manganese, copper and silicon at the interface,

wherein a concentration of the manganese in the copper alloy is more than 0.1 and not more than 20 atomic percentage and within a solubility limit of the manganese in the copper.

17. The method of forming an oxide film on a surface of claim 16,

wherein a thickness of the oxide film is 1 to 10 nm.

18. The method of forming an oxide film on a surface of claim 17,

wherein an electric resistivity of the copper alloy is equal to or more than 1.7 μΩcm and equal to or less than 7 μΩcm.

19. The method of forming an oxide film on a surface of claim 16,

wherein the step of diffusing atoms of manganese is performed by heating the copper alloy at a temperature from 200° C. to 600° C.

20. The method of forming an oxide film on a surface of claim 19,

wherein the heating is performed for 5 minutes to 2 hours.

21. An electrical conductor comprising:

a copper alloy conductor layer; and

a diffusion layer on a surface of the conductor layer, the diffusion layer comprising at least one element from the copper alloy, the at least one element having a diffusion coefficient in copper that is larger than the self-diffusion coefficient of copper;

wherein a concentration of the at least one element diffused in the copper is within a range of about 0.1 atomic percentage to about 20 atomic percentage.

22. The electrical conductor of claim 21, wherein atoms of the at least one element are diffused into the copper to form an oxide film including the atoms in the diffusion layer.

23. The electrical conductor of claim 22, wherein a thickness of the oxide film is within a range of about 1 nm to about 10 nm.

24. The electrical conductor of claim 21, wherein an electric resistivity of the diffusion layer is within a range of about 1.7 μΩcm to about 7 μΩcm.

25. A method of forming an electrical connector, comprising:

forming a copper alloy conductive layer; and

forming a protective layer by diffusing at least one element from the copper alloy onto at least one surface of the conductive layer to form a diffusion layer, the at least one element having a diffusion coefficient that is larger than the self-diffusion coefficient of copper;

wherein a concentration of the at least one element in the copper is in a range of about 0.1 atomic percentage to about 20 atomic percentage.

26. The method of claim 25, wherein diffusing comprises forming an oxide film in the diffusion layer, the oxide layer comprising the at least one element.

27. The method of claim 26, wherein a thickness of the oxide film is within a range of about 1 nm to about 10 nm.

28. The method of claim 25, wherein an electric resistivity of the diffusion layer is within a range of about 1.7 μΩcm to about 7 μΩcm.

29. The method of claim 25, wherein diffusing comprises heating the surface of the wiring layer to a temperature in a range of about 200° C. to about 600° C.

30. The method of claim 29, wherein the heating is performed for a time in a range of about 5 minutes to about 2 hours.

31. The method of claim 29, wherein the heating is performed in an Ar gas atmosphere.

32. The method of claim 31, wherein the Ar gas atmosphere comprises oxygen at a level of approximately 100 ppm.

33. A method of forming an electrical connector, comprising:

forming a wiring layer comprising a copper alloy; and

heating the wiring layer to form a diffusion layer comprising at least one element from the copper alloy, the at least one element having a diffusion coefficient in copper that is larger than the self-diffusion coefficient of copper;

wherein a concentration of the at least one element in the copper is in a range of about 0.1 atomic percentage to about 20 atomic percentage.

34. The method of claim 33, wherein heating the wiring layer comprises forming an oxide film in the diffusion layer, the oxide layer comprising the at least one element.

35. The method of claim 34, wherein a thickness of the oxide film is within a range of about 1 nm to about 10 nm.

36. The method of claim 33, wherein an electric resistivity of the diffusion layer is within a range of about 1.7 μΩcm to about 7 μΩcm.

37. The method of claim 33, wherein heating the wiring layer comprises heating the surface of the wiring layer to a temperature in a range of about 200° C. to about 600° C.

38. The method of claim 37, wherein the heating is performed for a time in a range of about 5 minutes to about 2 hours.

39. The method of claim 38, wherein the heating is performed in an Ar gas atmosphere.

40. The method of claim 39, wherein the Ar gas atmosphere comprises oxygen at a level of approximately 100 ppm.

41. The electrical conductor of claim 21, wherein the at least one element comprises one or more of the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, Ba, Pr and Nd.

42. The method of claim 25, wherein the at least one element comprises one or more of the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, Ba, Pr and Nd.

43. The method of claim 33, wherein the at least one element comprises one or more of the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, Ba, Pr and Nd.

44. A method comprising:

forming a copper alloy conductive layer on a silicon substrate, the copper alloy conductive layer comprising at least one element having a diffusion coefficient in copper that is larger than the self-diffusion coefficient of copper; and

heating the copper alloy conductive layer to form:

a first oxide layer between the copper alloy conductive layer and the silicon substrate, the first oxide layer comprising the at least one element and silicon, and

a second oxide layer on a surface of the copper alloy conductive layer, the second oxide layer comprising the at least one element;

wherein a concentration of the at least one element in the copper alloy is in a range of about 0.1 atomic percentage to about 20 atomic percentage.

45. The method of claim 44, wherein the at least one element comprises one or more of the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, Ba, Pr and Nd.

46. The method of claim 44, wherein heating the wiring layer and the silicon oxide layer comprises heating the wiring layer and the silicon oxide layer to at least 400° C.

47. The method of claim 46, wherein the heating is performed for at least 30 minutes.

48. The method of claim 44, wherein the heating is performed in an Argon (Ar) gas atmosphere.

49. The method of claim 48, wherein the Ar gas atmosphere comprises oxygen at a level of approximately 100 ppm.

50. An electrical conductor comprising:

a silicon substrate;

a conductor layer comprising a copper alloy formed on the silicon substrate, the copper alloy comprising at least one element having a diffusion coefficient in copper that is larger than the self-diffusion coefficient of copper;

a first oxide layer between the silicon substrate and the conductor layer, the first oxide layer comprising silicon and the at least one element diffused from the conductor layer; and

a second oxide layer on a surface of the conductor layer, the second oxide layer comprising the at least one element diffused from the conductor layer;

wherein a concentration of the at least one element in the copper alloy is in a range of about 0.1 atomic percentage to about 20 atomic percentage.

51. The electrical conductor of claim 50, wherein the first oxide layer has a thickness of less than or equal to about 8 nm.

52. The electrical conductor of claim 50, wherein the first oxide layer comprises a copper-manganese-silicon oxide.

53. The electrical conductor of claim 50, wherein the second oxide layer comprises a manganese oxide.