QQAM=q(2m−1b1+2m−2b2+ . . . +20bm) (6)
where “m” denotes a predetermined integer equal to or greater than “2”; (a1, b1), (a2, b2), . . . , (am, bm) are binary code words of “1” and “−1”; and “q” denotes a predetermined constant. With reference to FIG. 10, specified ones of the signal points correspond to the maximum amplitude which is given as follows.
(2m−1+2m−2+ . . . +20)√{square root over (2)}q (7)
With reference to FIG. 11, a pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 22m-value QAM. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 22m-value QAM, that is, the value given by the expression (7), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 22m-value QAM demodulation and outputs the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
A third embodiment of this invention is similar to the second embodiment thereof except that 16-value QAM replaces 22m-value QAM.
According to the third embodiment of this invention, a modulator (a quadrature baseband modulator) in a transmitter includes a 16-value QAM modulator instead of the 22m-value QAM modulator 12F (see FIG. 8). In addition, a quasi synchronous detector in a receiver includes a 16-value QAM demodulator instead of the 22m-value QAM demodulator 29D (see FIG. 9).
FIG. 12 shows an arrangement of signal points in an I-Q plane which are provided by the 16-value QAM. In FIG. 12, the signal points are denoted by the reference numeral “601”. The signal points are assigned to different logic values respectively. The positions (I16QAM, Q16QAM) of the signal points are given by the following equations.
I16QAM=r(21a+20a2) (8)
Q16QAM=r(21b1+20b2) (9)
where (a1, b1) and (a2, b2) are binary code words of “1” and “−1”, and “r” denotes a predetermined constant. With reference to FIG. 12, specified ones of the signal points correspond to the maximum amplitude which is given as follows.
(21+20)√{square root over (2)}r (10)
In addition, the distances between the neighboring signal points are equal to a same value given by “2r”.
With reference to FIG. 13, a pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 16-value QAM. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 16-value QAM, that is, the value given by the expression (10), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 16-value QAM demodulation and the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
In general, the inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation is equal to a given value times the inter-signal-point distance “2r” in the 16-value QAM. Preferably, the given value is in the range of 0.90 to 1.50. In this case, a sufficiently low bit error rate is provided.
The inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation may be equal to twice the inter-signal-point distance “2r” in the 16-value QAM. In this case, it is preferable that the quasi synchronous detector in the receiver detects the I-Q-plane amplitude of the output I and Q signals of the RF portion when the output I and Q signals of the RF portion 22 represent a pilot symbol, and that the detected I-Q-plane amplitude is used as an I-Q-plane amplitude threshold value for the 16-value QAM demodulation.
A fourth embodiment of this invention is similar to the first embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 14, a modulator (a quadrature baseband modulator) in a transmitter in the fourth embodiment of this invention includes a QPSK modulator 12G instead of the QPSK modulator 12B (see FIG. 2).
FIG. 15 shows an arrangement of signal points in an I-Q plane which are provided by QPSK modulation implemented by the QPSK modulator 12G. In FIG. 15, the signal points are denoted by the reference numeral “801”. The signal points are assigned to different logic values respectively. The positions (IQPSKR, QQPSKR) of the signal points are given by the following equations.
where “n” denotes an integer, and (IQPSK, QQPSK) are given by the equations (3) and (4). With reference to FIG. 15, all the signal points correspond to a same amplitude given by the constant “p”. In addition, all the distances between the neighboring signal points are equal to a same value given by √{square root over (2p)}. Furthermore, the signal points are spaced at equal angular intervals. Accordingly, a QPSK modulation-resultant signal is suited for detecting an amplitude distortion and a frequency offset.
As shown in FIG. 16, a quasi synchronous detector in a receiver in the fourth embodiment of this invention includes a QPSK demodulator 29E instead of the QPSK demodulator 29B (see FIG. 4).
The QPSK demodulator 29E implements demodulation inverse with respect to the modulation by the QPSK modulator 12G.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator 12 in the transmitter 10 (see FIG. 1), or the RF signal outputted from the RF portion 15 in the transmitter 10 is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 16-value APSK modulation. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver 20 (see FIG. 3) as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver 20, the calculator 25 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude g1 provided by the 16-value APSK modulation is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver 20 is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to the QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to the 16-value APSK demodulation and outputs the APSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
A fifth embodiment of this invention is similar to the second embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 17, a modulator (a quadrature baseband modulator) in a transmitter in the fifth embodiment of this invention includes a QPSK modulator 12G instead of the QPSK modulator 12B (see FIG. 8). The QPSK modulator 12G implements QPSK modulation providing signal points which are arranged in an I-Q plane as shown in FIG. 15.
As shown in FIG. 18, a quasi synchronous detector in a receiver in the fifth embodiment of this invention includes a QPSK demodulator 29E instead of the QPSK demodulator 29B (see FIG. 9).
The QPSK demodulator 29E implements demodulation inverse with respect to the modulation by the QPSK modulator 12G.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 22m-value QAM. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 22m-value QAM, that is, the value given by the expression (7), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 22m-value QAM demodulation and outputs the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
A sixth embodiment of this invention is similar to the fifth embodiment thereof except that 16-value QAM replaces 22m-value QAM.
According to the sixth embodiment of this invention, a modulator (a quadrature baseband modulator) in a transmitter includes a 16-value QAM modulator instead of the 22m-value QAM modulator 12F (see FIG. 17). The QAM modulator implements 16-value QAM providing signal points which are arranged in an I-Q plane as shown in FIG. 12. According to the sixth embodiment of this invention, a quasi synchronous detector in a receiver includes a 16-value QAM demodulator instead of the 22m-value QAM demodulator 29D (see FIG. 18).
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 16-value QAM. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 16-value QAM, that is, the value given by the expression (10), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 16-value QAM demodulation and the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
In general, the inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation is equal to a given value times the inter-signal-point distance “2r” in the 16-value QAM. Preferably, the given value is in the range of 0.90 to 1.50. In this case, a sufficiently low bit error rate is provided.
The inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation may be equal to twice the inter-signal-point distance “2r” in the 16-value QAM. In this case, it is preferable that the quasi synchronous detector in the receiver detects the I-Q-plane amplitude of the output I and Q signals of the RF portion when the output I and Q signals of the RF portion 22 represent a pilot symbol, and that the detected I-Q-plane amplitude is used as an I-Q-plane amplitude threshold value for the 16-value QAM demodulation.
A seventh embodiment of this invention is similar to the first embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 19, a modulator (a quadrature baseband modulator) in a transmitter in the seventh embodiment of this invention includes a 22m-value QAM modulator 12H instead of the 16-value APSK modulator 12A (see FIG. 2). Here, “m” denotes a predetermined integer equal to or greater than “2”.
As shown in FIG. 20, a quasi synchronous detector in a receiver in the seventh embodiment of this invention includes a 22m-value QAM demodulator 29F instead of the 16-value APSK demodulator 29A (see FIG. 4).
FIG. 21 shows an arrangement of signal points in an I-Q plane which are provided by 22m-value QAM executed in the QAM modulator 12H. In FIG. 21, the signal points are denoted by the reference numeral “901”. The signal points are assigned to different logic values respectively. The positions of the signal points in FIG. 21 result from rotation of the signal points in FIG. 10 through an angle of π/4 radian about the origin. Specifically, the positions (IQAMR, QQAMR) of the signal points in FIG. 21 are given by the following equations.
where “n” denotes an integer, and (IQAM, QQAM) are given by the equations (5) and (6). With reference to FIG. 21, the maximum amplitude which corresponds to specified ones of the signal points is equal to the value given by the expression (7).
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 22m-value QAM. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 22m-value QAM, that is, the value given by the expression (7), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 22m-value QAM demodulation and outputs the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
An eighth embodiment of this invention is similar to the seventh embodiment thereof except that 16-value QAM replaces 22m-value QAM.
According to the eighth embodiment of this invention, a modulator (a quadrature baseband modulator) in a transmitter includes a 16-value QAM modulator instead of the 22m-value QAM modulator 12H (see FIG. 19). In addition, a quasi synchronous detector in a receiver includes a 16-value QAM demodulator instead of the 22m-value QAM demodulator 29F (see FIG. 20).
FIG. 22 shows an arrangement of signal points in an I-Q plane which are provided by 16-value QAM executed in the 16-value QAM modulator. In FIG. 22, the signal points are denoted by the reference numeral “1001”. The signal points are assigned to different logic values respectively. The positions of the signal points in FIG. 22 result from rotation of the signal points in FIG. 12 through an angle of π/4 radian about the origin. Specifically, the positions (I16QAMR, Q16QAMR) of the signal points in FIG. 22 are given by the following equations.
where “n” denotes an integer, and (I16QAM, Q16QAM) are given by the equations (8) and (9). With reference to FIG. 22, the maximum amplitude which corresponds to specified ones of the signal points is equal to the value given by the expression (10). In addition, the distances between the neighboring signal points are equal to a same value given by “2r”.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 16-value QAM. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 16-value QAM, that is, the value given by the expression (10), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 16-value QAM demodulation and the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
In general, the inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation is equal to a given value times the inter-signal-point distance “2r” in the 16-value QAM. Preferably, the given value is in the range of 0.90 to 1.50. In this case, a sufficiently low bit error rate is provided.
The inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation may be equal to “√{square root over (2p”)} times the inter-signal-point distance “2r” in the 16-value QAM. In this case, it is preferable that the quasi synchronous detector in the receiver detects the I-Q-plane amplitude of the output I and Q signals of the RF portion when the output I and Q signals of the RF portion 22 represent a pilot symbol, and that the detected I-Q-plane amplitude is used as an I-Q-plane amplitude threshold value for the 16-value QAM demodulation.
A ninth embodiment of this invention is similar to the seventh embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 23, a modulator (a quadrature baseband modulator) in a transmitter in the ninth embodiment of this invention includes a QPSK modulator 12G instead of the QPSK modulator 12B (see FIG. 19). The QPSK modulator 12G implements QPSK modulation providing signal points which are arranged in an I-Q plane as shown in FIG. 15.
As shown in FIG. 24, a quasi synchronous detector in a receiver in the ninth embodiment of this invention includes a QPSK demodulator 29E instead of the QPSK demodulator 29B (see FIG. 20). The QPSK demodulator 29E implements demodulation inverse with respect to the modulation by the QPSK modulator 12G.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 22m-value QAM. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 22m-value QAM, that is, the value given by the expression (7), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 22m-value QAM demodulation and outputs the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
A tenth embodiment of this invention is similar to the ninth embodiment thereof except that 16-value QAM replaces 22m-value QAM.
According to the tenth embodiment of this invention, a modulator (a quadrature baseband modulator) in a transmitter includes a 16-value QAM modulator instead of the 22m-value QAM modulator 12H (see FIG. 23). The 16-value QAM modulator implements 16-value QAM providing signal points which are arranged in an I-Q plane as shown in FIG. 22. According to the tenth embodiment of this invention, a quasi synchronous detector in a receiver includes a 16-value QAM demodulator instead of the 22m-value QAM demodulator 29F (see FIG. 24). The 16-value QAM demodulator implements demodulation inverse with respect to the modulation by the 16-value QAM modulator.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 16-value QAM. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 22 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 16-value QAM, that is, the value given by the expression (10), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 16-value QAM demodulation and the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
In general, the inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation is equal to a given value times the inter-signal-point distance “2r” in the 16-value QAM. Preferably, the given value is in the range of 0.90 to 1.50. In this case, a sufficiently low bit error rate is provided.
The inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation may be equal to twice the inter-signal-point distance “2r” in the 16-value QAM. In this case, it is preferable that the quasi synchronous detector in the receiver detects the I-Q-plane amplitude of the output I and Q signals of the RF portion when the output I and Q signals of the RF portion 22 represent a pilot symbol, and that the detected I-Q-plane amplitude is used as an I-Q-plane amplitude threshold value for the 16-value QAM demodulation.
An eleventh embodiment of this invention is similar to the third embodiment thereof except for design changes indicated hereinafter.
With reference to FIG. 25, a pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, first alternate symbols result from the QPSK modulation, and second alternate symbols result from the 16-value QAM. The QPSK symbols in every frame are used by the receiver as pilot symbols for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols from the output I and Q signals of the RF portion 22 in response to a signal (a 2-symbol sync signal) having a period corresponding to two symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols from the output I and Q signals of the RF portion 22 in response to a signal (a 2-symbol sync signal) having a period corresponding to 2 symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 16-value QAM, that is, the value given by the expression (10), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 16-value QAM demodulation and the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
In general, the inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation is equal to a given value times the inter-signal-point distance “2r” in the 16-value QAM. Preferably, the given value is in the range of 0.90 to 1.50. In this case, a sufficiently low bit error rate is provided.
With reference to FIG. 26, in the case where the inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation is equal to 1.20 times the inter-signal-point distance “2r” in the 16-value QAM, the bit error rate provided in the embodiment of this invention decreases along the curve A0 as the carrier-to-noise power ratio C/N increases. FIG. 26 also indicates a comparative example being the relation B0 between the bit error rate and the carrier-to-noise power ratio C/N which occurs in a prior-art 8PSK (8 or octonary phase shift keying) system. As shown in FIG. 26, the bit error rate (the curve A0) provided in the embodiment of this invention is better than that in the prior-art 8PSK system.
The inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation may be equal to twice the inter-signal-point distance “2r” in the 16-value QAM. In this case, it is preferable that the quasi synchronous detector in the receiver detects the I-Q-plane amplitude of the output I and Q signals of the RF portion when the output I and Q signals of the RF portion 22 represent a pilot symbol, and that the detected I-Q-plane amplitude is used as an I-Q-plane amplitude threshold value for the 16-value QAM demodulation.
A twelfth embodiment of this invention is similar to the sixth embodiment thereof except for design changes indicated hereinafter.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, first alternate symbols result from the QPSK modulation, and second alternate symbols result from the 16-value QAM. The QPSK symbols in every frame are used by the receiver as pilot symbols for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols from the output I and Q signals of the RF portion 22 in response to a signal (a 2-symbol sync signal) having a period corresponding to two symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols from the output I and Q signals of the RF portion 22 in response to a signal (a 2-symbol sync signal) having a period corresponding to 2 symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 16-value QAM, that is, the value given by the expression (10), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 16-value QAM demodulation and the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
In general, the inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation is equal to a given value times the inter-signal-point distance “2r” in the 16-value QAM. Preferably, the given value is in the range of 0.90 to 1.50. In this case, a sufficiently low bit error rate is provided.
With reference to FIG. 27, in the case where the inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation is equal to 1.20 times the inter-signal-point distance “2r” in the 16-value QAM, the bit error rate provided in the embodiment of this invention decreases along the curve A1 as the carrier-to-noise power ratio C/N increases. FIG. 27 also indicates a comparative example being the relation B1 between the bit error rate and the carrier-to-noise power ratio C/N which occurs in a prior-art 8PSK (8 or octonary phase shift keying) system. As shown in FIG. 27, the bit error rate (the curve A1) provided in the embodiment of this invention is better than that in the prior-art 8PSK system.
The inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation may be equal to “√{square root over (2)}” times the inter-signal-point distance “2r” in the 16-value QAM. In this case, it is preferable that the quasi synchronous detector in the receiver detects the I-Q-plane amplitude of the output I and Q signals of the RF portion when the output I and Q signals of the RF portion 22 represent a pilot symbol, and that the detected I-Q-plane amplitude is used as an I-Q-plane amplitude threshold value for the 16-value QAM demodulation.
A thirteenth embodiment of this invention is similar to the eighth embodiment thereof except for design changes indicated hereinafter.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, first alternate symbols result from the QPSK modulation, and second alternate symbols result from the 16-value QAM. The QPSK symbols in every frame are used by the receiver as pilot symbols for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols from the output I and Q signals of the RF portion 22 in response to a signal (a 2-symbol sync signal) having a period corresponding to two symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 26 separates pilot symbols from the output I and Q signals of the RF portion 22 in response to a signal (a 2-symbol sync signal) having a period corresponding to 2 symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 16-value QAM, that is, the value given by the expression (10), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 16-value QAM demodulation and the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
In general, the inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation is equal to a given value times the inter-signal-point distance “2r” in the 16-value QAM. Preferably, the given value is in the range of 0.90 to 1.50. In this case, a sufficiently low bit error rate is provided.
With reference to FIG. 28, in the case where the inter-signal-point distance “√{square root over (2p)}” in the QPSK modulation is equal to 1.20 times the inter-signal-point distance “2r” in the 16-value QAM, the bit error rate provided in the embodiment of this invention decreases along the curve A2 as the carrier-to-noise power ratio C/N increases. FIG. 28 also indicates a comparative example being the relation B2 between the bit error rate and the carrier-to-noise power ratio C/N which occurs in a prior-art 8PSK (8 or octonary phase shift keying) system. As shown in FIG. 28, the bit error rate (the curve A2) provided in the embodiment of this invention is better than that in the prior-art 8PSK system.
The inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation may be equal to “√{square root over (2p)}” times the inter-signal-point distance “2r” in the 16-value QAM. In this case, it is preferable that the quasi synchronous detector in the receiver detects the I-Q-plane amplitude of the output I and Q signals of the RF portion when the output I and Q signals of the RF portion 22 represent a pilot symbol, and that the detected I-Q-plane amplitude is used as an I-Q-plane amplitude threshold value for the 16-value QAM demodulation.
A fourteenth embodiment of this invention is similar to the tenth embodiment thereof except for design changes indicated hereinafter.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 1), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, first alternate symbols result from the QPSK modulation, and second alternate symbols result from the 16-value QAM. The QPSK symbols in every frame are used by the receiver as pilot symbols for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 3), the calculator 25 separates pilot symbols from the output I and Q signals of the RF portion 22 in response to a signal (a 2-symbol sync signal) having a period corresponding to two symbols. The calculator 25 estimates an amplitude distortion amount from the separated pilot symbols.
Similarly, the calculator 26 separates pilot symbols from the output I and Q signals of the RF portion 22 in response to a signal (a 2-symbol sync signal) having a period corresponding to 2 symbols. The calculator 26 estimates a frequency offset amount from the separated pilot symbols.
Preferably, the maximum amplitude provided by the 16-value QAM, that is, the value given by the expression (10), is equal to the amplitude “p” provided by the QPSK modulation. In this case, the amplitude distortion amount and the frequency offset amount can be accurately estimated.
The quasi synchronous detector 29 in the receiver (see FIG. 3) is designed to implement the following processes. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a pilot symbol. The quasi synchronous detector 29 subjects the output I and Q signals of the RF portion 22 to 16-value QAM demodulation and the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 22 represent a normal symbol different from a pilot symbol.
In general, the inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation is equal to a given value times the inter-signal-point distance “2r” in the 16-value QAM. Preferably, the given value is in the range of 0.90 to 1.50. In this case, a sufficiently low bit error rate is provided.
With reference to FIG. 29, in the case where the inter-signal-point distance “√{square root over (2p)}” in the QPSK modulation is equal to 1.20 times the inter-signal-point distance “2r” in the 16-value QAM, the bit error rate provided in the embodiment of this invention decreases along the curve A3 as the carrier-to-noise power ratio C/N increases. FIG. 29 also indicates a comparative example being the relation B3 between the bit error rate and the carrier-to-noise power ratio C/N which occurs in a prior-art 8PSK (8 or octonary phase shift keying) system. As shown in FIG. 29, the bit error rate (the curve A3) provided in the embodiment of this invention is better than that in the prior-art 8PSK system.
The inter-signal-point distance “√{square root over (2p”)} in the QPSK modulation may be equal to twice the inter-signal-point distance “2r” in the 16-value QAM. In this case, it is preferable that the quasi synchronous detector in the receiver detects the I-Q-plane amplitude of the output I and Q signals of the RF portion when the output I and Q signals of the RF portion 22 represent a pilot symbol, and that the detected I-Q-plane amplitude is used as an I-Q-plane amplitude threshold value for the 16-value QAM demodulation.
FIG. 30 shows a transmitter 110 in a radio communication system according to a fifteenth embodiment of this invention. With reference to FIG. 30, the transmitter 110 includes a modulator (a quadrature baseband modulator) 112 and an RF (radio frequency) portion 115.
A digital signal to be transmitted (that is, an input digital signal or main information to be transmitted) is fed to the quadrature baseband modulator 112. The device 112 subjects the input digital signal to quadrature baseband modulation, thereby converting the input digital signal into a pair of modulation-resultant baseband signals, that is, a baseband I (in-phase) signal and a baseband Q (quadrature) signal. The quadrature baseband modulator 112 outputs the baseband I signal and the baseband Q signal to the RF portion 115.
The RF portion 115 converts the baseband I signal and the baseband Q signal into an RF signal through frequency conversion. The RF portion 115 feeds the RF signal to an antenna 117. The RF signal is radiated by the antenna 117.
As shown in FIG. 31, the quadrature baseband modulator 112 includes a 8PSK (8 or octonary phase shift keying) modulator 112A, a BPSK (binary phase shift keying) modulator 112B, a reference signal generator 112C, and switches 112D and 112E.
The 8PSK modulator 112A and the BPSK modulator 112B receives the input digital signal. The device 112A subjects the input digital signal to 8PSK (8PSK modulation), thereby converting the input digital signal into a pair of a baseband I signal and a baseband Q signal. The
QBPSK=q·sin(kπ) (20)
where “k” denotes a variable integer, and “q” denotes a predetermined constant. With reference to FIG. 35, the signal points are on the I axis, and correspond to a same amplitude given by the constant “q”. In addition, the signal points are spaced at an angle of π radian. Accordingly, a BPSK modulation-resultant signal is suited for detecting an amplitude distortion and a frequency offset.
With reference to FIG. 36, a pair of the I signal and the Q signal outputted from the quadrature baseband modulator 112 in the transmitter 110, or the RF signal outputted from the RF portion 115 in the transmitter 110 is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the BPSK modulation, and the second and later symbols result from the 8PSK modulation. The first symbol in every frame (that is, the BPSK symbol in every frame) is used by the receiver 120 as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver 120, the calculator 125 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 125 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 126 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 126 estimates a frequency offset amount from the separated pilot symbols.
The quasi synchronous detector 129 in the receiver 120 is designed to implement the following processes. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to the BPSK demodulation and outputs the BPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a pilot symbol. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to the 8PSK demodulation and outputs the 8PSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a normal symbol different from a pilot symbol.
The BPSK modulator 112B in the quadrature baseband modulator 112 of the transmitter 110 is designed to implement processes indicated below. The phase of an i-th BPSK symbol in the I-Q plane is denoted by “φi”, and the phase of an (i+1)-th BPSK symbol in the I-Q plane is denoted by “φi+1” The BPSK modulator 112B determines the phase “θi+1” of the (i+1)-th BPSK symbol in an x-y plane on the basis of the difference between the phases “φi” and “φi+1” according to the following equation.
θi+1=φi+1−φi(mod. 2π) (21)
The BPSK modulator 112B implements BPSK modulation providing two signal points which are respectively on the positive side and the negative side of the x axis in the x-y plane as shown in FIG. 37. The BPSK modulator 112B assigns a bit of “0” and a bit of “1” in the input digital signal to the positive signal point and the negative signal point, respectively. Accordingly, a bit of “0” corresponds to the absence of a phase change of π radian between two successively symbols while a bit of “1” corresponds to the presence of a phase change of π radian between two successively symbols as in differential phase shift keying (DPSK). The BPSK modulator 112B outputs a pair of modulation-resultant I and Q signals to the switches 112D and 112E. The BPSK modulator 112B includes a latch or a register for sampling and holding a pair of modulation-resultant I and Q signals which are selected by the switches 112D and 112E. The modulation-resultant I and Q signals held by the latch or the register are periodically updated. The BPSK modulator 112B outputs a pair of held modulation-resultant I and Q signals to the 8PSK modulator 112A.
As previously indicated, the 8PSK modulation implemented by the 8PSK modulator 112A provides 8 different signal points to which 8 different logic states are assigned respectively. For symbols following a BPSK symbol in every frame, the 8PSK modulator 112A determines the assignment of the logic states to the signal points on the basis of the signal point used by the BPSK symbol. The signal point used by the BPSK symbol is represented by a pair of BPSK-modulation-resultant I and Q signals fed from the BPSK modulator 112B. In the case where a signal point 501 on the positive side of the I axis is used by a BPSK symbol, the 8PSK modulator 112A assigns 3-bit sets of “000”, “001”, “010”, “011”, “100”, “101”, “110”, and “111” in the input digital signal to eight signal points 502 for following symbols as shown in FIG. 38. In the case where a signal point 501 on the negative side of the I axis is used by a BPSK symbol, the 8PSK modulator 112A assigns 3-bit sets of “000”, “001”, “010”, “011”, “100”, “101”, “110”, and “111” in the input digital signal to eight signal points 502 for following symbols as shown in FIG. 39.
A sixteenth embodiment of this invention is similar to the fifteenth embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 40, a modulator (a quadrature baseband modulator) in a transmitter in the sixteenth embodiment of this invention includes a 22m-value QAM (quadrature amplitude modulation) modulator 112F instead of the 8PSK modulator 112A (see FIG. 31). Here, “m” denotes a predetermined integer equal to or greater than “2”.
As shown in FIG. 41, a quasi synchronous detector in a receiver in the sixteenth embodiment of this invention includes a 22m-value QAM demodulator 129D instead of the 8PSK demodulator 129A (see FIG. 33). The 22m-value QAM demodulator 129D implements demodulation inverse with respect to the modulation by the QAM modulator 112F.
FIG. 42 shows an arrangement of signal points in an I-Q plane which are provided by 22m-value QAM executed in the QAM modulator 112F. In FIG. 42, the signal points are denoted by the reference numeral “601A”. The signal points are assigned to different values (different logic states) respectively. The positions (IQAM, QQAM) of the signal points are given by the following equations.
IQAM=r(2m−1a1+2m−2a2+ . . . +20am) (22)
QQAM=r(2m−1b1+2m−2b2+ . . . +20bm) (23)
where “m” denotes a predetermined integer equal to or greater than “2”; (a1, b1), (a2, b2), . . . , (am, bm) are binary code words of “1” and “−1”; and “r” denotes a predetermined constant.
An example of the 22m-value QAM executed in the QAM modulator 112F is 16-value QAM. FIG. 43 shows an arrangement of signal points in an I-Q plane which are provided by the 16-value QAM. In FIG. 43, the signal points are denoted by the reference numeral “701”. The signal points are assigned to different values (different logic states) respectively. The positions (I16QAM, Q16QAM) of the signal points are given by the following equations.
I16QAM=s(21a1+20a2) (24)
Q16QAM=s(21b1+20b2) (25)
where (a1, b1) and (a2, b2) are binary code words of “1” and “−1”, and “s” denotes a predetermined constant.
With reference to FIG. 44, a pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 30), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the BPSK modulation, and the second and later symbols result from the 16-value QAM. The first symbol in every frame (that is, the BPSK symbol in every frame) is used by the receiver as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 32), the calculator 125 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 125 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 126 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 126 estimates a frequency offset amount from the separated pilot symbols.
The quasi synchronous detector 129 in the receiver (see FIG. 32) is designed to implement the following processes. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to BPSK demodulation and outputs the BPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a pilot symbol. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to 16-value QAM demodulation and outputs the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a normal symbol different from a pilot symbol.
The 16-value QAM implemented by the 16-value QAM modulator 112A provides 16 different signal points to which 16 different logic states are assigned respectively. For symbols following a BPSK symbol in every frame, the 16-value QAM modulator 112A determines the assignment of the logic stages to the signal points on the basis of the signal point used by the BPSK symbol. The signal point used by the BPSK symbol is represented by a pair of BPSK-modulation-resultant I and Q signals fed from the BPSK modulator 112B. In the case where a signal point 901A on the positive side of the I axis is used by a BPSK symbol, the 16-value QAM modulator 112A assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to 16 signal points 902 for following symbols as shown in FIG. 45. In the case where a signal point 901A on the negative side of the I axis is used by a BPSK symbol, the 16-value QAM modulator 112A assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to 16 signal points 902 for following symbols as shown in FIG. 46.
A seventeenth embodiment of this invention is similar to the fifteenth embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 47, a modulator (a quadrature baseband modulator) in a transmitter in the seventeenth embodiment of this invention includes a 22m-value QAM (quadrature amplitude modulation) modulator 112G instead of the 8PSK modulator 112A (see FIG. 31). Here, “m” denotes a predetermined integer equal to or greater than “2”.
As shown in FIG. 48, a quasi synchronous detector in a receiver in the seventeenth embodiment of this invention includes a 22m-value QAM demodulator 129E instead of the 8PSK demodulator 129A (see FIG. 33). The 22m-value QAM demodulator 129E implements demodulation inverse with respect to the modulation by the QAM modulator 112G.
FIG. 49 shows an arrangement of signal points in an I-Q plane which are provided by 22m-value QAM executed in the QAM modulator 112G. In FIG. 49, the signal points are denoted by the reference numeral “1001A”. The signal points are assigned to different logic values respectively. The positions of the signal points in FIG. 49 result from rotation of the signal points in FIG. 42 through an angle of π/4 radian about the origin. Specifically, the positions (IQAMR, QQAMR) of the signal points in FIG. 49 are given by the following equations.
where “n” denotes an integer, and (IQAM, QQAM) are given by the equations (22) and (23).
An example of the 22m-value QAM executed in the QAM modulator 112G is 16-value QAM. FIG. 50 shows an arrangement of signal points in an I-Q plane which are provided by the 16-value QAM. In FIG. 50, the signal points are denoted by the reference numeral “1101”. The signal points are assigned to different logic states (different values) respectively. The positions of the signal points in FIG. 50 result from rotation of the signal points in FIG. 43 through an angle of π/4 radian about the origin. Specifically, the positions (I16QAMR, Q16QAMR) of the signal points in FIG. 50 are given by the following equations.
where “n” denotes an integer, and (I16QAM, Q16QAM) are given by the equations (24) and (25).
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 30), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the BPSK modulation, and the second and later symbols result from the 16-value QAM. The first symbol in every frame (that is, the BPSK symbol in every frame) is used by the receiver as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 32), the calculator 125 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 125 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 126 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 126 estimates a frequency offset amount from the separated pilot symbols.
The quasi synchronous detector 129 in the receiver (see FIG. 32) is designed to implement the following processes. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to BPSK demodulation and outputs the BPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a pilot symbol. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to 16-value QAM demodulation and outputs the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a normal symbol different from a pilot symbol.
The 16-value QAM implemented by the 16-value QAM modulator 112G provides 16 different signal points to which 16 different logic states are assigned respectively. For symbols following a BPSK symbol in every frame, the 16-value QAM modulator 112G determines the assignment of the logic states to the signal points on the basis of the signal point used by the BPSK symbol. The signal point used by the BPSK symbol is represented by a pair of BPSK-modulation-resultant I and Q signals fed from the BPSK modulator 112B. In the case where a signal point 1201 on the positive side of the I axis is used by a BPSK symbol, the 16-value QAM modulator 112G assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to 16 signal points 1202 for following symbols as shown in FIG. 51. In the case where a signal point 1201 on the negative side of the I axis is used by a BPSK symbol, the 16-value QAM modulator 112G assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to 16 signal points 1202 for following symbols as shown in FIG. 52.
An eighteenth embodiment of this invention is similar to the fifteenth embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 53, a modulator (a quadrature baseband modulator) in a transmitter in the eighteenth embodiment of this invention includes a QPSK (quadrature phase shift keying) modulator 112H instead of the BPSK modulator 112B (see FIG. 31).
As shown in FIG. 54, a quasi synchronous detector in a receiver in the eighteenth embodiment of this invention includes a QPSK demodulator 129F instead of the BPSK demodulator 129B (see FIG. 33). The QPSK demodulator 129F implements demodulation inverse with respect to the modulation by the QPSK modulator 112H.
FIG. 55 shows an arrangement of signal points in an I-Q plane which are provided by the QPSK modulation executed in the QPSK modulator 112H. In FIG. 55, the signal points are denoted by the reference numeral “1301”. The positions (IQPSK, QQPSK) of the signal points are given by the following equations.
where “k” denotes a variable integer, and “u” denotes a predetermined constant. With reference to FIG. 55, all the signal points correspond to a same amplitude given by the constant “u”. In addition, all the distances between the neighboring signal points are equal to a same value given by √{square root over (2u)}. Furthermore, the signal points are spaced at equal angular intervals. Accordingly, a QPSK modulation-resultant signal is suited for detecting an amplitude distortion and a frequency offset.
With reference to FIG. 56, a pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 30), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 8PSK modulation. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver (see FIG. 32) as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 32), the calculator 125 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 125 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 126 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 126 estimates a frequency offset amount from the separated pilot symbols.
The quasi synchronous detector 129 in the receiver (see FIG. 32) is designed to implement the following processes. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a pilot symbol. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to 8PSK demodulation and outputs the 8PSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a normal symbol different from a pilot symbol.
The QPSK modulator 112H in the quadrature baseband modulator 112 of the transmitter is designed to implement processes indicated below. The phase of an i-th QPSK symbol in the I-Q plane is denoted by “φi”, and the phase of an (i+1)-th QPSK symbol in the I-Q plane is denoted by “φi+1” The QPSK modulator 112H determines the phase “θi+1” of the (i+1)-th QPSK symbol in an x-y plane on the basis of the difference between the phases “φi” and “φi+1” according to the following equation.
θi+1=φi+1−φi(mod. 2π) (32)
The QPSK modulator 112H implements QPSK modulation providing four signal points which are respectively on the positive side of the x axis, the negative side of the x axis, the positive side of the y axis, and the negative side of the y axis in the x-y plane as shown in FIG. 57. The QPSK modulator 112H assigns 2-bit sets of “00”, “01”, “10”, and “11” to the positive-x signal point, the positive-y signal point, the negative-y signal point, and the negative-x signal point, respectively. Accordingly, a 2-bit set of “00” corresponds to the absence of any phase change between two successive symbols. A 2-bit set of “01” corresponds to the presence of a phase change of π/2 radian between two successive symbols. A 2-bit set of “11” corresponds to the presence of a phase change of π radian between two successive symbols. A 2-bit set of “10” corresponds to the presence of a phase change of 3π/2 radian between two successive symbols. The QPSK modulator 112H outputs a pair of modulation-resultant I and Q signals to the switches 112D and 112E. The QPSK modulator 112H includes a latch or a register for sampling and holding a pair of modulation-resultant I and Q signals which are selected by the switches 112D and 112E. The modulation-resultant I and Q signals held by the latch or the register are periodically updated. The QPSK modulator 112H outputs a pair of held modulation-resultant I and Q signals to the 8PSK modulator 112A.
The 8PSK modulation implemented by the 8PSK modulator 112A provides 8 different signal points to which 8 different logic states are assigned respectively. For symbols following a QPSK symbol in every frame, the 8PSK modulator 112A determines the assignment of the logic states to the signal points on the basis of the signal point used by the QPSK symbol. The signal point used by the QPSK symbol is represented by a pair of QPSK-modulation-resultant I and Q signals fed from the QPSK modulator 112H. In the case where a positive-I positive-Q signal point 1601 is used by a QPSK symbol, the 8PSK modulator 112A assigns 3-bit sets of “000”, “001”, “010”, “011”, “100”, “101”, “110”, and “111” in the input digital signal to eight signal points 1602 for following symbols as shown in FIG. 58. In the case where a negative-I positive-Q signal point 1601 is used by a QPSK symbol, the 8PSK modulator 112A assigns 3-bit sets of “000”, “001”, “010”, “011”, “100”, “101”, “110”, and “111” in the input digital signal to eight signal points 1602 for following symbols as shown in FIG. 59. In the case where a negative-I negative-Q signal point 1601 is used by a QPSK symbol, the 8PSK modulator 112A assigns 3-bit sets of “000”, “001”, “010”, “011”, “100”, “101”, “110”, and “111” in the input digital signal to eight signal points 1602 for following symbols as shown in FIG. 60. In the case where a positive-I negative-Q signal point 1601 is used by a QPSK symbol, the 8PSK modulator 112A assigns 3-bit sets of “000”, “001”, “010”, “011”, “100”, “101”, “110”, and “111” in the input digital signal to eight signal points 1602 for following symbols as shown in FIG. 61.
A nineteenth embodiment of this invention is similar to the sixteenth embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 62, a modulator (a quadrature baseband modulator) in a transmitter in the nineteenth embodiment of this invention includes a QPSK modulator 112H instead of the BPSK modulator 112B (see FIG. 40).
As shown in FIG. 63, a quasi synchronous detector in a receiver in the nineteenth embodiment of this invention includes a QPSK demodulator 129F instead of the BPSK demodulator 129B (see FIG. 41). The QPSK demodulator 129F implements demodulation inverse with respect to the modulation by the QPSK modulator 112H.
The QPSK modulator 112H implements QPSK modulation providing signal points which are arranged in an I-Q plane as shown in FIG. 55. The positions (IQPSK, QQPSK) of the signal points are given by the equations (30) and (31).
With reference to FIG. 64, a pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 30), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 22m-value QAM, for example, the 16-value QAM. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver (see FIG. 32) as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 32), the calculator 125 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 125 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 126 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 126 estimates a frequency offset amount from the separated pilot symbols.
The quasi synchronous detector 129 in the receiver (see FIG. 32) is designed to implement the following processes. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to QPSK demodulation and outputs the QPSK demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a pilot symbol. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to 22m-value QAM demodulation and outputs the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a normal symbol different from a pilot symbol.
The QPSK modulator 112H in the quadrature baseband modulator 112 of the transmitter is designed to implement processes indicated below. The phase of an i-th QPSK symbol in the I-Q plane is denoted by “φi”, and the phase of an (i+1)-th QPSK symbol in the I-Q plane is denoted by “φi+1” The QPSK modulator 112H determines the phase “θi+1” of the (i+1)-th QPSK symbol in an x-y plane on the basis of the difference between the phases “φi” and “φi+1” according to the equation (32). The QPSK modulator 112H implements QPSK modulation providing four signal points which are respectively on the positive side of the x axis, the negative side of the x axis, the positive side of the y axis, and the negative side of the y axis in the x-y plane as shown in FIG. 57. The QPSK modulator 112H assigns 2-bit sets of “00”, “01”, “10”, and “11” to the positive-x signal point, the positive-y signal point, the negative-y signal point, and the negative-x signal point, respectively. The QPSK modulator 112H outputs a pair of modulation-resultant I and Q signals to the switches 112D and 112E. The QPSK modulator 112H includes a latch or a register for sampling and holding a pair of modulation-resultant I and Q signals which are selected by the switches 112D and 112E. The modulation-resultant I and Q signals held by the latch or the register are periodically updated. The QPSK modulator 112H outputs a pair of held modulation-resultant I and Q signals to the 22m-value QAM modulator 112F.
An example of the modulation implemented by the 22m-value QAM modulator 112F is the 16-value QAM. The 16-value QAM by the 22m-value QAM modulator 112F provides 16 different signal points to which 16 different logic states are assigned respectively. For symbols following a QPSK symbol in every frame, the 16-value QAM modulator 112F determines the assignment of the logic states to the signal points on the basis of the signal point used by the QPSK symbol. The signal point used by the QPSK symbol is represented by a pair of QPSK-modulation-resultant I and Q signals fed from the QPSK modulator 112H. In the case where a positive-I positive-Q signal point 1801 is used by a QPSK symbol, the 16-value QAM modulator 112F assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 1802 for following symbols as shown in FIG. 65. In the case where a negative-I positive-Q signal point 1801 is used by a QPSK symbol, the 16-value QAM modulator 112F assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 1802 for following symbols as shown in FIG. 66. In the case where a negative-I negative-Q signal point 1801 is used by a QPSK symbol, the 16-value QAM modulator 112F assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 1802 for following symbols as shown in FIG. 67. In the case where a positive-I negative-Q signal point 1801 is used by a QPSK symbol, the 16-value QAM modulator 112F assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 1802 for following symbols as shown in FIG. 68.
A twentieth embodiment of this invention is similar to the fifteenth embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 69, a modulator (a quadrature baseband modulator) in a transmitter in the twentieth embodiment of this invention includes a QPSK (quadrature phase shift keying) modulator 112J instead of the BPSK modulator 112B (see FIG. 31).
As shown in FIG. 70, a quasi synchronous detector in a receiver in the twentieth embodiment of this invention includes a QPSK demodulator 129G instead of the BPSK demodulator 129B (see FIG. 33). The QPSK demodulator 129G implements demodulation inverse with respect to the modulation by the QPSK modulator 112J.
FIG. 71 shows an arrangement of signal points in an I-Q plane which are provided by QPSK modulation implemented by the QPSK modulator 112J. In FIG. 71, the signal points are denoted by the reference numeral “1901”. The positions (IQPSKR, QQPSKR) of the signal points are given by the following equations.
where “n” denotes an integer, and (IQPSK, QQPSK) are given by the equations (30) and (31). With reference to FIG. 71, all the signal points correspond to a same amplitude. In addition, all the distances between the neighboring signal points are equal to a same value. Furthermore, the signal points are spaced at equal angular intervals. Accordingly, a QPSK modulation-resultant signal is suited for detecting an amplitude distortion and a frequency offset.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 30), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 8PSK modulation. The first symbol in every frame (that is, the GPSK symbol in every frame) is used by the receiver (see FIG. 32) as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 32), the calculator 125 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 125 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 126 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 126 estimates a frequency offset amount from the separated pilot symbols.
The quasi synchronous detector 129 in the receiver (see FIG. 32) is designed to implement the following processes. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a pilot symbol. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to 8PSK demodulation and outputs the 8PSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a normal symbol different from a pilot symbol.
The QPSK modulator 112J in the quadrature baseband modulator 112 of the transmitter is designed to implement processes indicated below. The phase of an i-th QPSK symbol in the I-Q plane is denoted by “φi”, and the phase of an (i+1)-th QPSK symbol in the I-Q plane is denoted by “φi+1” The QPSK modulator 112J determines the phase “θi+1” of the (i+1)-th QPSK symbol in an x-y plane on the basis of the difference between the phases “φi” and “φi+1” according to the following equation.
θi+1=φi+1−φi(mod. 2π) (35)
The QPSK modulator 112J implements QPSK modulation providing four signal points which are spaced at equal angular intervals. The QPSK modulator 112J assigns 2-bit sets of “00”, “01”, “10”, and “11” to the four signal points respectively. The QPSK modulator 112J outputs a pair of modulation-resultant I and Q signals to the switches 112D and 112E. The QPSK modulator 112J includes a latch or a register for sampling and holding a pair of modulation-resultant I and Q signals which are selected by the switches 112D and 112E. The modulation-resultant I and Q signals held by the latch or the register are periodically updated. The QPSK modulator 112J outputs a pair of held modulation-resultant I and Q signals to the 8PSK modulator 112A.
The 8PSK modulation implemented by the 8PSK modulator 112A provides 8 different signal points to which 8 different logic states are assigned respectively. For symbols following a QPSK symbol in every frame, the 8PSK modulator 112A determines the assignment of the logic states to the signal points on the basis of the signal point used by the QPSK symbol. The signal point used by the QPSK symbol is represented by a pair of QPSK-modulation-resultant I and Q signals fed from the QPSK modulator 112J. In the case where a signal point 2001 on the positive side of the I axis is used by a QPSK symbol, the 8PSK modulator 112A assigns 3-bit sets of “000”, “001”, “010”, “011”, “100”, “101”, “110”, and “111” in the input digital signal to eight signal points 2002 for following symbols as shown in FIG. 72. In the case where a signal point 2001 on the positive side of the Q axis is used by a QPSK symbol, the 8PSK modulator 112A assigns 3-bit sets of “000”, “001” “010”, “011”, “100”, “101”, “110”, and “111” in the input digital signal to eight signal points 2002 for following symbols as shown in FIG. 73. In the case where a signal point 2001 on the negative side of the I axis is used by a QPSK symbol, the 8PSK modulator 112A assigns 3-bit sets of “000”, “001”, “010”, “011”, “100”, “101”, “110”, and “111” in the input digital signal to eight signal points 2002 for following symbols as shown in FIG. 74. In the case where a signal point 2001 on the negative side of the Q axis is used by a QPSK symbol, the 8PSK modulator 112A assigns 3-bit sets of “000”, “001”, “010”, “011”, “100”, “101”, “110”, and “111” in the input digital signal to eight signal points 2002 for following symbols as shown in FIG. 75.
A twenty-first embodiment of this invention is similar to the sixteenth embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 76, a modulator (a quadrature baseband modulator) in a transmitter in the twenty-first embodiment of this invention includes a QPSK (quadrature phase shift keying) modulator 112J instead of the BPSK modulator 112B (see FIG. 40). The QPSK modulator 112J implements QPSK modulation providing signal points which are arranged in an I-Q plane as shown in FIG. 71.
As shown in FIG. 77, a quasi synchronous detector in a receiver in the twenty-first embodiment of this invention includes a QPSK demodulator 129G instead of the BPSK demodulator 129B (see FIG. 41). The QPSK demodulator 129G implements demodulation inverse with respect to the modulation by the QPSK modulator 112J.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 30), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 22m-value QAM modulation. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver (see FIG. 32) as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 32), the calculator 125 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 125 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 126 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 126 estimates a frequency offset amount from the separated pilot symbols.
The quasi synchronous detector 129 in the receiver (see FIG. 32) is designed to implement the following processes. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a pilot symbol. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to 22m-value QAM demodulation and outputs the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a normal symbol different from a pilot symbol.
The QPSK modulator 112J in the quadrature baseband modulator 112 of the transmitter is designed to implement processes indicated below. The phase of an i-th QPSK symbol in the I-Q plane is denoted by “φi”, and the phase of an (i+1)-th QPSK symbol in the I-Q plane is denoted by “φi+1”. The QPSK modulator 112J determines the phase “θi+1” of the (i+1)-th QPSK symbol in an x-y plane on the basis of the difference between the phases “φi” and “φi+1” according to the equation (35). The QPSK modulator 112J implements QPSK modulation providing four signal points which are spaced at equal angular intervals. The QPSK modulator 112J assigns 2-bit sets of “00”, “01”, “10”, and “11” to four signal points in the x-y plane respectively. The QPSK modulator 112J outputs a pair of modulation-resultant I and Q signals to the switches 112D and 112E. The QPSK modulator 112J includes a latch or a register for sampling and holding a pair of modulation-resultant I and Q signals which are selected by the switches 112D and 112E. The modulation-resultant I and Q signals held by the latch or the register are periodically updated. The QPSK modulator 112J outputs a pair of held modulation-resultant I and Q signals to the 22m-value QAM modulator 112F.
An example of the modulation implemented by the 22m-value QAM modulator 112F is the 16-value QAM. The 16-value QAM by the 22m-value QAM modulator 112F provides 16 different signal points to which 16 different logic states are assigned respectively. For symbols following a QPSK symbol in every frame, the 16-value QAM modulator 112F determines the assignment of the logic states to the signal points on the basis of the signal point used by the QPSK symbol. The signal point used by the QPSK symbol is represented by a pair of QPSK-modulation-resultant I and Q signals fed from the QPSK modulator 112J. In the case where a signal point 2101 on the positive side of the I axis is used by a QPSK symbol, the 16-value QAM modulator 112F assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2102 for following symbols as shown in FIG. 78. In the case where a signal point 2101 on the positive side of the Q axis is used by a QPSK symbol, the 16-value QAM modulator 112F assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2102 for following symbols as shown in FIG. 79. In the case where a signal point 2101 on the negative side of the I axis is used by a QPSK symbol, the 16-value QAM modulator 112F assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2102 for following symbols as shown in FIG. 80. In the case where a signal point 2101 on the negative side of the Q axis is used by a QPSK symbol, the 16-value QAM modulator 112F assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2102 for following symbols as shown in FIG. 81.
A twenty-second embodiment of this invention is similar to the seventeenth embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 82, a modulator (a quadrature baseband modulator) in a transmitter in the twenty-second embodiment of this invention includes a QPSK (quadrature phase shift keying) modulator 112H instead of the BPSK modulator 112B (see FIG. 47). The QPSK modulator 112H implements QPSK modulation providing signal points which are arranged in an I-Q plane as shown in FIG. 55.
As shown in FIG. 83, a quasi synchronous detector in a receiver in the twenty-second embodiment of this invention includes a QPSK demodulator 129F instead of the BPSK demodulator 129B (see FIG. 48). The QPSK demodulator 129F implements demodulation inverse with respect to the modulation by the QPSK modulator 112H.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 30), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 22m-value QAM modulation. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver (see FIG. 32) as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 32), the calculator 125 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 125 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 126 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 126 estimates a frequency offset amount from the separated pilot symbols.
The quasi synchronous detector 129 in the receiver (see FIG. 32) is designed to implement the following processes. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a pilot symbol. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to 22m-value QAM demodulation and outputs the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a normal symbol different from a pilot symbol.
The QPSK modulator 112H in the quadrature baseband modulator 112 of the transmitter is designed to implement processes indicated below. The phase of an i-th QPSK symbol in the I-Q plane is denoted by “φi”, and the phase of an (i+1)-th QPSK symbol in the I-Q plane is denoted by “φi+1” The QPSK modulator 112H determines the phase “θi+1” of the (i+1)-th QPSK symbol in an x-y plane on the basis of the difference between the phases “φi” and “φi+1” according to the equation (32). The QPSK modulator 112H implements QPSK modulation providing four signal points which are spaced at equal angular intervals. The QPSK modulator 112H assigns 2-bit sets of “00”, “01”, “10”, and “11” to four signal points in the x-y plane respectively. The QPSK modulator 112H outputs a pair of modulation-resultant I and Q signals to the switches 112D and 112E. The QPSK modulator 112H includes a latch or a register for sampling and holding a pair of modulation-resultant I and Q signals which are selected by the switches 112D and 112E. The modulation-resultant I and Q signals held by the latch or the register are periodically updated. The QPSK modulator 112H outputs a pair of held modulation-resultant I and Q signals to the 22m-value QAM modulator 112G.
An example of the modulation implemented by the 22m-value QAM modulator 112G is the 16-value QAM. The 16-value QAM by the 22m-value QAM modulator 112G provides 16 different signal points to which 16 different logic states are assigned respectively. For symbols following a QPSK symbol in every frame, the 16-value QAM modulator 112G determines the assignment of the logic states to the signal points on the basis of the signal point used by the QPSK symbol. The signal point used by the QPSK symbol is represented by a pair of QPSK-modulation-resultant I and Q signals fed from the QPSK modulator 112H. In the case where a positive-I positive-Q signal point 2201 is used by a QPSK symbol, the 16-value QAM modulator 112G assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2202 for following symbols as shown in FIG. 84. In the case where a negative-I positive-Q signal point 2201 is used by a QPSK symbol, the 16-value QAM modulator 112G assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2202 for following symbols as shown in FIG. 85. In the case where a negative-I negative-Q signal point 2201 is used by a QPSK symbol, the 16-value QAM modulator 112G assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2202 for following symbols as shown in FIG. 86. In the case where a positive-I negative-Q signal point 2201 is used by a QPSK symbol, the 16-value QAM modulator 112G assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2202 for following symbols as shown in FIG. 87.
A twenty-third embodiment of this invention is similar to the seventeenth embodiment thereof except for design changes indicated hereinafter.
As shown in FIG. 88, a modulator (a quadrature baseband modulator) in a transmitter in the twenty-third embodiment of this invention includes a QPSK (quadrature phase shift keying) modulator 112J instead of the BPSK modulator 112B (see FIG. 47). The QPSK modulator 112J implements QPSK modulation providing signal points which are arranged in an I-Q plane as shown in FIG. 71.
As shown in FIG. 89, a quasi synchronous detector in a receiver in the twenty-second embodiment of this invention includes a QPSK demodulator 129G instead of the BPSK demodulator 129B (see FIG. 48). The QPSK demodulator 129G implements demodulation inverse with respect to the modulation by the QPSK modulator 112J.
A pair of the I signal and the Q signal outputted from the quadrature baseband modulator in the transmitter (see FIG. 30), or the RF signal outputted from the RF portion in the transmitter is composed of a stream of frames each having N successive symbols. Here, N denotes a predetermined natural number. In every frame, the first symbol results from the QPSK modulation, and the second and later symbols result from the 22m-value QAM modulation. The first symbol in every frame (that is, the QPSK symbol in every frame) is used by the receiver (see FIG. 32) as a pilot symbol for estimating an amplitude distortion amount and a frequency offset amount. It should be noted that every pilot symbol also carries a part of the main information to be transmitted.
In the receiver (see FIG. 32), the calculator 125 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 125 estimates an amplitude distortion amount from the separated pilot symbols. Similarly, the calculator 126 separates pilot symbols (first symbols in frames) from the output I and Q signals of the RF portion 122 in response to a signal (a frame and symbol sync signal) having a period corresponding to N symbols. The calculator 126 estimates a frequency offset amount from the separated pilot symbols.
The quasi synchronous detector 129 in the receiver (see FIG. 32) is designed to implement the following processes. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to QPSK demodulation and outputs the QPSK-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a pilot symbol. The quasi synchronous detector 129 subjects the output I and Q signals of the RF portion 122 to 22m-value QAM demodulation and outputs the QAM-demodulation-resultant digital signal when the output I and Q signals of the RF portion 122 represent a normal symbol different from a pilot symbol.
The QPSK modulator 112J in the quadrature baseband modulator 112 of the transmitter is designed to implement processes indicated below. The phase of an i-th QPSK symbol in the I-Q plane is denoted by “φi”, and the phase of an (i+1)-th QPSK symbol in the I-Q plane is denoted by “φi+1”. The QPSK modulator 112H determines the phase “θi+1” of the (i+1)-th QPSK symbol in an x-y plane on the basis of the difference between the phases “φi” and “φi+1” according to the equation (35). The QPSK modulator 112J implements QPSK modulation providing four signal points which are spaced at equal angular intervals. The QPSK modulator 112J assigns 2-bit sets of “00”, “01”, “10”, and “11” to four signal points in the x-y plane respectively. The QPSK modulator 112J outputs a pair of modulation-resultant I and Q signals to the switches 112D and 112E. The QPSK modulator 112J includes a latch or a register for sampling and holding a pair of modulation-resultant I and Q signals which are selected by the switches 112D and 112E. The modulation-resultant I and Q signals held by the latch or the register are periodically updated. The QPSK modulator 112J outputs a pair of held modulation-resultant I and Q signals to the 22m-value QAM modulator 112G.
An example of the modulation implemented by the 22m-value QAM modulator 112G is the 16-value QAM. The 16-value QAM by the 22m-value QAM modulator 112G provides 16 different signal points to which 16 different logic states are assigned respectively. For symbols following a QPSK symbol in every frame, the 16-value QAM modulator 112G determines the assignment of the logic states to the signal points on the basis of the signal point used by the QPSK symbol. The signal point used by the QPSK symbol is represented by a pair of QPSK-modulation-resultant I and Q signals fed from the QPSK modulator 112J. In the case where a signal point 2301 on the positive side of the I axis is used by a QPSK symbol, the 16-value QAM modulator 112G assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2302 for following symbols as shown in FIG. 90. In the case where a signal point 2301 on the positive side of the Q axis is used by a QPSK symbol, the 16-value QAM modulator 112G assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2302 for following symbols as shown in FIG. 91. In the case where a signal point 2301 on the negative side of the I axis is used by a QPSK symbol, the 16-value QAM modulator 112G assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2302 for following symbols as shown in FIG. 92. In the case where a signal point 2301 on the negative side of the Q axis is used by a QPSK symbol, the 16-value QAM modulator 112G assigns 4-bit sets of “0000”, “0001”, “0010”, . . . , “1110”, and “1111” in the input digital signal to sixteen signal points 2302 for following symbols as shown in FIG. 93.
Simulation was executed by a computer. During the simulation, normal symbols were made on the basis of 16-value QAM while pilot symbols were made on the basis of QPSK modulation according to this invention. The normal symbols and the pilot symbols were combined into a symbol stream in a way based on this invention. In the symbol stream, the number of normal symbols between pilot symbols (that is, a data symbol length) was equal to a given natural number “n” while each of the separate pilot symbols was equal to “1” in length. The given natural number “n” was “1”, “7”, or “15”. Accordingly, symbol streams of three types were generated. During the simulation, each of the first-type symbol stream, the second-type symbol stream, and the third-type symbol stream was transmitted from a transmitter to a receiver. In the receiver, normal symbols were subjected to quasi synchronous detection using 16-value QAM demodulation while pilot symbols were subjected to delayed detection using QPSK demodulation. Regarding the transmission of each of the first-type symbol stream, the second-type symbol stream, and the third-type symbol stream, the bit error rate was calculated at a varying ratio of the 1-bit signal energy “Eb” to the noise power density “N0”. In the case where the given natural number “n” was equal to “1”, as the ratio of the 1-bit signal energy “Eb” to the noise power density “N0” increased, the calculated bit error rate decreased along the curve D1 of FIG. 94. In the case where the given natural number “n” was equal to “7”, as the ratio of the 1-bit signal energy “Eb” to the noise power density “N0” increased, the calculated bit error rate decreased along the curve D7 of FIG. 94. In the case where the given natural number “n” was equal to “15”, as the ratio of the 1-bit signal energy “Eb” to the noise power density “N0” increased, the calculated bit error rate decreased along the curve D15 of FIG. 94.
As comparative examples, similar simulation was implemented on a prior-art system. Specifically, normal symbols were made on the basis of 16-value QAM while a signal point corresponding to a maximum amplitude was used as pilot symbols. The normal symbols and the pilot symbols were combined into a symbol stream in a prior-art way. In the symbol stream, the number of normal symbols between pilot symbols (that is, a data symbol length) was equal to a given natural number “n” while each of the separate pilot symbols was equal to “1” in length. The given natural number “n” was “1”, “7”, or “15”. Accordingly, symbol streams of three types were generated. Each of the first-type symbol stream, the second-type symbol stream, and the third-type symbol stream was transmitted from a transmitter to a receiver. In the receiver, the transmitted symbol stream was subjected to quasi synchronous detection using 16-value QAM demodulation. Regarding the transmission of each of the first-type symbol stream, the second-type symbol stream, and the third-type symbol stream, the bit error rate was calculated at a varying ratio of the 1-bit signal energy “Eb” to the noise power density “N0”. In the case where the given natural number “n” was equal to “1”, as the ratio of the 1-bit signal energy “Eb” to the noise power density “N0” increased, the calculated bit error rate decreased along the curve E1 of FIG. 94. In the case where the given natural number “n” was equal to “7”, as the ratio of the 1-bit signal energy “Eb” to the noise power density “N0” increased, the calculated bit error rate decreased along the curve E7 of FIG. 94. In the case where the given natural number “n” was equal to “15”, as the ratio of the 1-bit signal energy “Eb” to the noise power density “N0” increased, the calculated bit error rate decreased along the curve E15 of FIG. 94.
As shown in FIG. 94, the bit error rates (the curves D1, D7, and D15) in this invention are better than the corresponding prior-art bit error rates (the curves E1, E7, and E15).
Murakami, Yutaka, Orihashi, Masayuki, Matsuoka, Akihiko, Sagawa, Morikazu
Patent |
Priority |
Assignee |
Title |
Patent |
Priority |
Assignee |
Title |
4891806, |
Sep 18 1987 |
RACAL-DATACOM, INC |
Constellation multiplexed inband secondary channel for voiceband modem |
5027372, |
Mar 04 1987 |
National Semiconductor Corp. |
Differential phase shift keying modulator |
5313494, |
May 28 1991 |
Samsung Electronics Co., Ltd. |
Compact superposed modulated signal generator |
5535215, |
May 01 1995 |
Google Technology Holdings LLC |
Method and apparatus for providing control channels and message channels in a radio communication system |
5577087, |
Oct 31 1991 |
NEC Corporation |
Variable modulation communication method and system |
5771224, |
Mar 23 1995 |
Kabushiki Kaisha Toshiba |
Orthogonal frequency division multiplexing transmission system and transmitter and receiver therefor |
5909469, |
Aug 29 1997 |
Telefonaktoebolaget LM Ericsson |
Link adaptation method for links using modulation schemes that have different symbol rates |
5914959, |
Oct 31 1996 |
QUARTERHILL INC ; WI-LAN INC |
Digital communications system having an automatically selectable transmission rate |
5933421, |
Feb 06 1997 |
AT&T MOBILITY II LLC |
Method for frequency division duplex communications |
6087986, |
Sep 18 1996 |
Kabushiki Kaisha Toshiba |
Adaptive array antenna used in multi-carrier wave radio communications |
6125148, |
Aug 29 1997 |
CLUSTER LLC |
Method for demodulating information in a communication system that supports multiple modulation schemes |
6393064, |
Jul 09 1997 |
Matsushita Electric Industrial Co., Ltd. |
Communication method, data transmission method and data communication system |
EP734132, |
|
|
|
JP7297862, |
|
|
|
JP8265293, |
|
|
|
JP993302, |
|
|
|
Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Jan 19 1999 | MURAKAMI, YUTAKA | MATSUSHITA ELECTRIC INDUSTRIAL CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 044091 | /0453 |
pdf |
Jan 19 1999 | ORIHASHI, MASAYUKI | MATSUSHITA ELECTRIC INDUSTRIAL CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 044091 | /0453 |
pdf |
Jan 19 1999 | MATSUOKA, AKIHIKO | MATSUSHITA ELECTRIC INDUSTRIAL CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 044091 | /0453 |
pdf |
Jan 19 1999 | SAGAWA, MORIKAZU | MATSUSHITA ELECTRIC INDUSTRIAL CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 044091 | /0453 |
pdf |
Jun 12 2013 | | Optis Wireless Technology, LLC | (assignment on the face of the patent) | | / |
Jan 16 2014 | Optis Wireless Technology, LLC | WILMINGTON TRUST, NATIONAL ASSOCIATION | SECURITY INTEREST SEE DOCUMENT FOR DETAILS | 032437 | /0638 |
pdf |
Jan 16 2014 | Panasonic Corporation | Optis Wireless Technology, LLC | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 032326 | /0707 |
pdf |
Jan 16 2014 | Optis Wireless Technology, LLC | HIGHBRIDGE PRINCIPAL STRATEGIES, LLC, AS COLLATERAL AGENT | LIEN SEE DOCUMENT FOR DETAILS | 032180 | /0115 |
pdf |
Jun 20 2014 | Wi-Fi One, LLC | HIGHBRIDGE PRINCIPAL STRATEGIES, LLC, AS COLLATERAL AGENT | SECURITY INTEREST | 033203 | /0792 |
pdf |
Jun 20 2014 | Optis Wireless Technology, LLC | Wi-Fi One, LLC | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 033233 | /0876 |
pdf |
Jun 20 2014 | Wi-Fi One, LLC | WILMINGTON TRUST, NATIONAL ASSOCIATION, AS COLLATERAL AGENT | SECURITY INTEREST | 033203 | /0801 |
pdf |
Oct 06 2014 | Wi-Fi One, LLC | HIGHBRIDGE PRINCIPAL STRATEGIES, LLC, AS COLLATERAL AGENT | CORRECTIVE ASSIGNMENT TO REPLACE APPLICATION NO 14 153466 WITH APPLICATION NO 14 287661 PREVIOUSLY RECORDED AT REEL: 033203 FRAME: 0792 ASSIGNOR S HEREBY CONFIRMS THE SECURITY INTEREST | 033964 | /0074 |
pdf |
Dec 30 2015 | Wi-Fi One, LLC | HIGHBRIDGE PRINCIPAL STRATEGIES, LLC | SECURITY INTEREST SEE DOCUMENT FOR DETAILS | 037534 | /0069 |
pdf |
Jul 11 2016 | HPS INVESTMENT PARTNERS, LLC | Wi-Fi One, LLC | RELEASE BY SECURED PARTY SEE DOCUMENT FOR DETAILS | 039355 | /0670 |
pdf |
Jan 26 2018 | Wi-Fi One, LLC | CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT | INTELLECTUAL PROPERTY SECURITY AGREEMENT | 045570 | /0148 |
pdf |
Oct 22 2021 | WILMINGTON TRUST, NATIONAL ASSOCIATION | Optis Wireless Technology, LLC | RELEASE BY SECURED PARTY SEE DOCUMENT FOR DETAILS | 057890 | /0911 |
pdf |
Oct 22 2021 | WILMINGTON TRUST, NATIONAL ASSOCIATION | Wi-Fi One, LLC | RELEASE BY SECURED PARTY SEE DOCUMENT FOR DETAILS | 057890 | /0773 |
pdf |
Nov 03 2021 | CORTLAND CAPITAL MARKET SERVICES LLC | Wi-Fi One, LLC | RELEASE BY SECURED PARTY SEE DOCUMENT FOR DETAILS | 058014 | /0725 |
pdf |
Nov 03 2021 | Wi-Fi One, LLC | Redwood Technologies, LLC | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 058026 | /0232 |
pdf |
Date |
Maintenance Fee Events |
Oct 22 2015 | M1552: Payment of Maintenance Fee, 8th Year, Large Entity. |
Dec 09 2019 | REM: Maintenance Fee Reminder Mailed. |
May 25 2020 | EXP: Patent Expired for Failure to Pay Maintenance Fees. |
Date |
Maintenance Schedule |
Jul 22 2017 | 4 years fee payment window open |
Jan 22 2018 | 6 months grace period start (w surcharge) |
Jul 22 2018 | patent expiry (for year 4) |
Jul 22 2020 | 2 years to revive unintentionally abandoned end. (for year 4) |
Jul 22 2021 | 8 years fee payment window open |
Jan 22 2022 | 6 months grace period start (w surcharge) |
Jul 22 2022 | patent expiry (for year 8) |
Jul 22 2024 | 2 years to revive unintentionally abandoned end. (for year 8) |
Jul 22 2025 | 12 years fee payment window open |
Jan 22 2026 | 6 months grace period start (w surcharge) |
Jul 22 2026 | patent expiry (for year 12) |
Jul 22 2028 | 2 years to revive unintentionally abandoned end. (for year 12) |