Method for addressing a memory card, a system using a memory card, and a memory card

Abstract

The present invention relates to a method for addressing the memory locations of a memory card. There are several memory locations in a memory card for storing data, in which case in order to address a specific memory location an address is formed. At least one parameter is stored in the memory card, on the basis of which parameter the number of memory locations of a memory card can be calculated, and a specific number of bits is reserved for said at least one parameter. In the method, two or more memory locations are addressed with one address, and/or the number of bits that can be used in an address is increased. The invention also relates to a system and a memory card in which the method is applied.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims priority under 35 USC § 119 to Finnish Patent Application No. 20030191 filed on Feb. 7, 2003
Correspondingly, the length of the block (BLOCK_LEN) is determined by means of the parameter READ_BL_LEN in the following way:
BLOCK_LEN=2^{READ—BL—LEN}   (2)

According to the present specification, 12 bits are reserved for the parameter C_SIZE, in which case the maximum value is 4095. Three bits are reserved for the parameter C_SIZE_MULT, while the maximum value is thus 7. Four bits are reserved for the parameter READ_BL_LEN, and therefore the maximum value is 16. However, from the 4-bit values of the parameter READ_BL_LEN, only the values 0 to 11 are in use. On the basis of the above, the maximum capacity that can be calculated by means of the parameters is
((4095+1)*(2⁽⁷⁺²⁾))*(2¹¹)=4096*512*2048=4294967296
bytes i.e. 4 gigabytes (4 GB).

SUMMARY OF THE INVENTION

It is an aim of the present invention to provide an improved addressing method for addressing the memory locations of a memory card. The invention is based on the idea that either the size of a data area addressed with one memory address is changed into the multiple of one memory location, in which case more memory locations can be addressed with the address space available for use, or the address space is increased by increasing the number of bits to be used in an address. In addition, the meaning of at least one parameter is changed, in which case the coding of the memory card can be used in the calculated indication of the expanded memory capacity. To put it more precisely, the method according to the present invention is primarily characterized in that two or more memory locations are addressed with one address, and/or the number of bits that can be used in an address is increased. The system according to the present invention is primarily characterized in that two or more memory locations are arranged to be addressed with one memory address, and/or the number of bits that can be used in an address is increased. The device according to the present invention is primarily characterized in that two or more memory locations are arranged to be addressed with one address, and/or the number of bits that can be used in an address is increased. The memory according to the present invention is primarily characterized in that two or more memory locations are arranged to be addressed with one memory address, and/or the number of bits that can be used in an address is increased.

The present invention shows remarkable advantages over solutions of prior art. By applying the invention, it is possible to create memory cards, where the memory capacity is significantly larger than in memory cards according to prior art. However, in the system according to the invention, it is still possible to retain compatibility with previous systems, in which case the memory cards according to the invention can be used in previous systems as memory cards according to prior art. In addition, with the invention is reached the advantage that the implementation of the driver of the file system in a device to which the memory card can be connected is easier when using a block-based addressing manner and when using the block size used in the file system, such as blocks of 512 bytes. The total power consumption can be reduced in the device according to the invention. The calculation needed for coding the address can also be reduced in the device according to the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

In the following, the present invention will be described in more detail with reference to the appended drawings, in which

FIG. 1 shows a system according to an advantageous embodiment of the invention in a reduced block chart, and

FIG. 2 shows an addressing method according to an advantageous embodiment of the invention in a reduced manner.

DETAILED DESCRIPTION OF THE INVENTION

In the following description of an advantageous embodiment of the invention, the device 1 will be exemplified with a wireless terminal, such as a mobile communication device, but it will be obvious that the invention is not limited to be used in such devices only. The device 1 comprises a processor 2, and a memory 3, which may also comprise several different memory blocks, such as a read only memory (ROM) and a random access memory (RAM). Furthermore, a part of the memory can be a non-volatile memory, such as an
bytes, i.e. 4 terabytes (4 TB).

The above result has been reached with that precondition, that of the values of the 4-bit parameter READ_BL_LEN indicating the size of the block only the values 0 to 11 are in use. If in this embodiment the parameters 12 to 15 are taken into use, the maximum capacity can be further increased, but it is likely that 4 terabytes is enough in practical memory card applications.

After the properties of the memory card 13 have been determined, it is possible to move on to the memory card 13 processing, if necessary. The memory card 13 can be a part of the memory space of the device 1, or it can be located in a separate memory area. If the memory card 13 is in the memory space of the device 1, a specific address space is reserved for the memory card 13. Thus, in a situation where there is a need for the device 1 either to read data from the memory card 13 or to write information to it, the operation in the method according to the first advantageous embodiment of the invention is advantageously as follows. In the device 1 the processor 2 advantageously sets the command according to the memory operation to be performed for the command line 11b, for example a read command. In this example the command is transmitted in a serial form, in which case the card control unit 14 performs the transmission of the command in a serial form to the memory card 13. The command that has arrived is interpreted at the memory card 13, in connection with which it has been possible to also send the address data, for example, as an argument of the command. If the address data is not transmitted in connection with the command, the memory card 13 will wait for the address data, which is thus to be transmitted from the device after the command. The processor 2 and the card controller 14 determines which address is to be transmitted to the card. Let us, for example, assume that the memory card 13 is in the address space of the device 1 beginning from a specific basic address, which is marked here with the symbol Al. The end of the memory area reserved for the memory card 13 is thus the basic address added with the memory capacity of the memory card 13, i.e. Al+MC. When, for example, in the program being performed in the processor 2 is addressed to the memory area reserved for the memory card, the basic address is subtracted from this address, after which the difference is further divided by the size of the sector READ_BL_LEN. This numerical value is the address that is transmitted to the memory card 13 from the card control unit 14. The quotient of the division, for its part, indicates the location of the desired data in the sector in question. The quotient is, however, not transmitted to the memory card 13. After the address is transmitted to the memory card, the reading or writing of data is performed. In a reading situation, the sending of data is started from the memory card 13 via data line 11a sector by sector. The card control unit 14 reads the data of one sector and stores them, for example, in a buffer memory (not shown). The buffer memory can be formed, for example, in the memory 3 of the device in a way known as such. The processor 2 can read the desired data from the buffer. Thus, the above-mentioned quotient indicates at which point of the buffer the desired data (or starting point of data) is located. If there is a need to handle data from several sectors, the reading of data from the memory card 13 can be continued by increasing the address by one after the processing of one sector. Ending the data reading is thus performed advantageously with a stop command or the like.

Correspondingly, when writing data on a memory card 13, the operation is as follows. The basic address is subtracted from the storage address, after which the difference is divided by the sector size READ_BL_LEN, which provides the address of that sector to which the data on the memory card 13 is to be stored. The data of the sector in question is read from the memory card 13 in device 1, for example, to the buffer memory, if they are not already read in the device 1. After this, the value of that memory location, which is supposed to be changed with the memory card 13 is set in the buffer memory to the desired value. The address of this memory location is clarified on the basis of the remainder of said division. When the data is set, the data in the buffer can be sent to the memory card 13, where they are stored. The storing address is the address of that sector where the memory location to be changed is located. Also, when writing the data it is possible to perform the storing of several sectors advantageously by increasing the address by one after the processing of one sector. Ending the data writing is thus performed advantageously with a stop command or the like.

In the solution according to a second advantageous embodiment of the invention, the increase of the memory capacity of the memory card 13 is implemented in the following way. In the parameters READ_BL_LEN, on the basis of which the length of the block BLOCK_LEN used in the memory card can be calculated, also the values that are greater than 11 are taken into use, i.e. the values 12 to 15. With this arrangement, the calculated maximum memory capacity is as follows:
MC=((4095+1)*(2⁽⁷⁺²⁾))*(215)=4096*512*32768=68719467636
bytes, i.e. 64 gigabytes (64 GB).

The problem is, however, that with a 32-bit address it is not possible to address such a large memory area, but 4 gigabytes at the most. This is solved in this advantageous embodiment in such a manner that with the values of the parameter READ_BL_LEN, which are larger than 11, the smallest addressable unit is the multiple of one memory location. This can depend on the value of the parameter READ_BL_LEN, for example, according to the following table 1.

TABLE 1

READ _BL_LEN The smallest addressable unit

0-11         1 byte
12           2 bytes
13           4 bytes
14           8 bytes
15           16 bytes

This second advantageous embodiment of the invention can be applied also in such a manner that the smallest addressable unit is the same for all values that are larger than 11. Thus the size of the smallest addressable unit is preferably 16 bytes.

When using the memory card 13 according to the second embodiment of the invention, the device 1 determines the memory capacity of the memory card 13 and the length of the block on the basis of the parameters. In addition, the parameter READ_BL_LEN is used to determine what is the smallest addressable unit. If the value of the parameter READ_BL_LEN is smaller than 12, the memory card 13 can be used in the manner of the memory cards according to prior art. If, however, the value of the parameters READ_BL_LEN is 12 or greater, it is to be noted that one memory address indicates more than one memory location, in which case the principles presented in connection with the description of the operation of the first advantageous embodiment are to be applied in processing the memory locations. In this situation, the size of the smallest addressable unit in a way corresponds to the concept of sector size, i.e. the size of the sector is one of the values according to the table 1, or constant (preferably 16 bytes).

Also, in the solution according to a third advantageous embodiment of the invention the increase of the memory capacity of the memory card 13 is implemented in such a manner that also the values that are greater than 11 are taken into use in the parameter READ_BL_LEN, i.e. the values 12 to 15. In addition to this, the number of address bits is increased. This is implemented preferably by doubling the number of address bits from, for example, 32 bits to 64 bits. Thus, the maximum memory capacity is determined from the limitations set by calculating formulas (1) and (2), assuming that the significance of other parameters remains as present. The advantage that each individual memory location can be addressed is reached with this solution.

The value of the parameter READ_BL_LEN is used in calculating the maximum memory capacity and in determining the size of the block, for example according to the following table 2.

TABLE 2
	The value used
	in calculating
	the maximum
READ_BL_LEN	memory capacity	Length of the block
9	512	512 bytes
10	1024	1024 bytes
11	2048	2048 bytes
12	4096	2048/4096 bytes
13	8192	2048/4096/8192 bytes
14	16384	2048/4096/8192/16384 bytes
15	32768	2048/4096/8192/16384/32768 bytes

In table 2, several alternative values are marked in the block length column for the values 12 to 15 of the parameter. Thus, it is possible to application-specifically select which block length is used for each parameter value.

The increase of the number of address bits can be implemented by several alternative means. One alternative is that a special command is specified, which indicates to the memory card 13 that it is an expanded address. Thus, the device 1 sends this special command to the memory card, in which case the memory card 13 knows to expect several address bytes, which the device 1 sends. This type of a special command can be implemented in the present command register CSD or in the expanded command register EXT_CSD, which is being developed. Another possibility is to use a so-called switch command, which is also being developed for MultiMediaCard specifications. The parameter of the switch command thus indicates which command is in question at a certain time.

Further, with the arrangement according to the present invention is reached the advantage that the memory cards 13 according to the invention are downwards compatible with the memory cards according to prior art. Thus, when connecting the memory card according to the invention to a device where the changes required for using the memory card according to the invention have not been implemented, the memory cards function, from the point of view of the device, as memory cards according to prior art. Thus, however, a part of the memory capacity of the memory cards remains unutilized. Let us illustrate this further with an example. Let us assume that the memory card is a memory card according to the first advantageous embodiment of the invention, where an entire sector can be addressed with one address. However, the device assumes that each address addresses one memory location, even though the data transfer as such would take place as larger assemblies. Thus, each data (byte) is stored in the memory card in the first memory location of the sector. The next data is stored in the first memory location of the next sector, etc.

In yet another advantageous embodiment of the invention, the operation is such that the memory card 13 is in a start situation in a so-called basic addressing form (minimum addressing form), i.e. the expanded addressing method according to the invention is not in use. Thus, the device 1 attempts to read the mode of, for example, some specific register (e.g. CSD register) when formatting the memory card. If the reading of the register is not successful, or the mode data indicates that the memory card does not support an expanded addressing method, the memory card is assumed to function in the basic addressing form in the manner of the memory cards according to prior art. If, however, reading the above-mentioned register is successful and the mode data indicates that the memory card supports the expanded addressing method, the memory card can be set to function according to the expanded addressing method according to this invention. With this kind of arrangement it is possible to increase compatibility for using the memory cards according to prior art and memory cards 13 according to the present invention in the device 1.

The expanded addressing according to the invention can be implemented with a program, in which case no apparatus changes are required in the device 1. Also, the inner logic of the memory card 13 remains in its present form, because the expansions of the address can be arranged in the control logic of the memory card. Apparatus changes may be required only in the internal addressing of the memory of the memory card, mainly for increasing the bit number of the addresses (column and/or line addresses).

It will be obvious that the present invention is not limited solely to the above-presented embodiments but it can be modified within the scope of the appended claims.

Claims

1. A system comprising:

a memory card having several memory locations for storing data, and in which memory card is stored at least one parameter,

the system configured so that the number of memory locations of the memory card can be calculated on the basis of said at least one parameter,

the system configured so that a specific number of bits is reserved for said at least one parameter in the memory card, and

the system further configured to use an addressing data stored in the memory card, said addressing data being indicative of at least one addressing method supported,

wherein the addressing data indicates either a basic addressing method or an expanded addressing method, and

wherein the expanded addressing method enables the addressing of data in a larger number of memory locations than the basic addressing method.

2. The system according to claim 1, comprising at least one of the following:

addressing two or more memory locations with one address;

increasing the number of bits that can be used in an address.

3. The system according to claim 1, comprising a device to which the memory card is connected, that the device comprises an interface provided with a card connection for connecting the memory card to the device, as well as a card control unit and a data transmission bus for transferring commands and data between the device and the memory card.

4. A device which comprises a card connection for connecting a memory card to the device, in which memory card there are several memory locations for storing data, and in which memory card is stored at least one parameter,

the memory card configured so that the number of memory locations of the memory card can be calculated on the basis of said at least one parameter,

the memory card configured so that a specific number of bits is reserved for said at least one parameter, and

the device further comprising an address generator for addressing the memory locations of the memory card, said address generator being configured to use an addressing data stored in the memory card, said addressing data being indicative of at least one addressing method supported,

wherein the addressing data indicates either a basic addressing method or an expanded addressing method, and

wherein the expanded addressing method enables the addressing of data in a larger number of memory locations than the basic addressing method.

5. The device according to claim 4, comprising means for performing mobile communication functions.

6. A memory card comprising:

several memory locations for storing data, and in which memory card is stored at least one parameter, the memory card configured so that the number of memory locations of the memory card can be calculated on the basis of said at least one parameter,

the memory card configured so that a specific number of bits is reserved for said at least one parameter, and

the memory card further configured to have stored therein an addressing data, said addressing data being indicative of at least one addressing method supported,

wherein the addressing data indicates either a basic addressing method or an expanded addressing method, and

wherein the expanded addressing method enables the addressing of data in a larger number of memory locations than the basic addressing method.

7. The memory card according to claim 6, comprising at least one of the following:

addressing two or more memory locations with one address;

increasing the number of bits that can be used in an address.

8. The memory card according to claim 6, comprising a bus connection block for connecting the memory card to a device and for transferring data between the device and the memory card.

9. The memory card according to claim 6, wherein data is arranged to be stored and read in the memory card block-by-block.

10. The memory card according to claim 9, wherein the memory locations of one block are arranged to be addressed with one address.

11. The memory card according to claim 6, wherein the memory card is a memory card according to MultiMediaCard specifications.

12. A system comprising:

a memory card having several memory locations for storing data, and in which memory card is stored at least one parameter,

the system having means for calculating the number of memory locations of the memory card on the basis of said at least one parameter,

the system having means for receiving a specific number of bits for said at least one parameter in the memory card, and

the system further having means for using an addressing data stored in the memory card, said addressing data being indicative of at least one addressing method supported,

wherein the addressing data indicates either a basic addressing method or an expanded addressing method, and

wherein the expanded addressing method enables the addressing of data in a larger number of memory locations than the basic addressing method.

13. A method for addressing the memory locations of a memory card, wherein at least some of said memory locations are for storing data, wherein in order to address a specific memory location the method comprises:

forming an address,

storing at least one parameter in the memory card,

calculating the number of memory locations in the memory card based on said at least one parameter,

reserving a specific number of bits for said at least one parameter, and

using an addressing data stored in the memory card, said addressing data being indicative of at least one addressing method supported,

wherein the addressing data indicates either a basic addressing method or an expanded addressing method, and

wherein the expanded addressing method enables the addressing of data in a larger number of memory locations than the basic addressing method.

14. The method according to claim 13, comprising at least one of the following:

addressing two or more memory locations with one address; increasing the number of bits that can be used in an address.

15. The method according to claim 13, comprising addressing two or more memory locations with one address, and storing in the memory card data on the number of memory locations to be addressed with one address.

16. The method according to claim 13, comprising storing data in the memory card and reading data from the memory card block-by-block.

17. The method according to claim 16, storing in the memory card three parameters, on the basis of which parameter the memory capacity of the memory card can be calculated, and that the first and the second parameter being indicative of the number of blocks, and the third parameter being indicative of the size of the blocks.

18. The method according to claim 17, comprising calculating the capacity of the memory card with the formula:

BLOCKNR*BLOCK_LEN,

19. The method according to claim 17, wherein the length of the first parameter is 12 bits, the length of the second parameter is three bits, and the length of the third parameter is four bits, and that of the values of the third parameter all the possible values can be used in indicating the memory capacity of the memory card.

20. The method according to claim 17, wherein the unit of the first parameter (C_SIZE) is kilobyte.

21. The method according to claim 13, comprising addressing one memory location with one address, determining a maximum length for the address transmitted to the memory card, and sending the address transmitted to the memory card in at least two parts in such a manner that the length of the address is greater than said maximum length.

22. The memory card according to claim 6, wherein the basic addressing method supports addressing only one memory location with one address.

23. The memory card according to claim 6, wherein the expanded addressing method supports a higher memory capacity than the basic addressing method.

24. The memory card according to claim 6, wherein the memory card is configured to use the basic addressing method if reading of the stored addressing data is unsuccessful.

25. The memory card according to claim 6, wherein the memory card is configured so that, if the addressing data indicates that the memory card supports the expanded addressing method, the memory card uses the expanded addressing method in response to a successful reading of the addressing data that indicates support of the expanded addressing method.

26. The memory card according to claim 6, further comprising a register for storing the addressing data.

27. The memory card according to claim 26, wherein the stored addressing data comprises one bit.

28. The memory card according to claim 6, wherein a significance of the at least one parameter according to the basic addressing method is different from a significance of the at least one parameter according to the expanded addressing method.

29. The memory card according to claim 6, further comprising a register for storing an indication of the number of memory locations addressed according to the expanded addressing method.

30. A memory card comprising:

several memory locations for storing data, and in which memory card is stored at least one parameter, the memory card configured so that the number of memory locations of the memory card can be calculated on the basis of said at least one parameter,

the memory card configured so that a specific number of bits is reserved for said at least one parameter, and

the memory card further configured to have stored therein an addressing data, said addressing data being indicative of at least one addressing method supported,

wherein the addressing data indicates either a basic addressing method or an expanded addressing method,

wherein the expanded addressing method enables the addressing of data in a larger number of memory locations than the basic addressing method, and

wherein the memory card is configured so that, if the addressing data indicates that the memory card supports the expanded addressing method, the memory card uses the expanded addressing method in response to a successful reading of the addressing data that indicates support of the expanded addressing method.

31. A memory card comprising:

several memory locations for storing data, and in which memory card is stored at least one parameter, the memory card configured so that the number of memory locations of the memory card can be calculated on the basis of said at least one parameter,

the memory card configured so that a specific number of bits is reserved for said at least one parameter, and

the memory card further configured to have stored therein an addressing data, said addressing data being indicative of at least one addressing method supported,

wherein the addressing data indicates either a basic addressing method or an expanded addressing method, and

wherein the memory card is configured so that, if the addressing data indicates that the memory card supports the expanded addressing method, the memory card uses the expanded addressing method in response to a successful reading of the addressing data that indicates support of the expanded addressing method.