An inrush current controller for a device has a connector for hot-plugging the device into a source of energization. An impedance has a current input coupled to a first contact of the connector and a current output coupled to the device. The impedance has an impedance control input. An impedance control circuit has a logic input coupling to a second contact of the connector. The impedance control circuit has an impedance control output connected to the impedance control input. The impedance control output forces the impedance OFF during a first time interval after hot-plugging. The logic input triggers a limited inrush at the current input after the first time interval.
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0. 32. A method for use with a memory storage device that receives power from an external power supply on a power supply input, the method comprising:
controlling current provided to a capacitance of the memory storage device by, in response to a positive voltage change on the external power supply,
increasing the impedance between the external power supply and the power supply input for a first time interval;
charging a capacitive circuit during the first time interval; and
in response to the first time interval completing and to a logic input that indicates an on state for the memory storage device,
discharging the capacitive circuit at a discharge rate; and
reducing the impedance between the external power supply and the power supply input at a slew rate determined by the discharge rate.
1. A controller for a device, the controller comprising:
a connector for plugging the device into a source of energization and unplugging the device from the source of energization, wherein the connector comprises:
a first contact for connecting to a first power supply contact of the source;
a second contact for connecting to a logic output from the source; and
a third contact for connecting to a second power supply contact of the source;
an impedance having a current input that couples to the first contact of the connector, an impedance control input, and a current output coupling to the device; and
an impedance control circuit comprising:
a first timer;
a logic input coupling to the second contact of the connector; and
an impedance control output connected to the impedance control input, the impedance control output forcing the impedance OFF during a first time interval controlled by the first timer which is triggered by, and starts timing in response to, the device being plugged into the source of energization, and the logic output from the source enabling a limited inrush at the current input during a second time interval controlled by a second timer.
0. 28. A data storage device comprising:
a power supply input providing power;
a memory storage element that draws electrical current from the power provided by the power supply input;
a capacitance, having at least one capacitor, connected to the power supply input; and
a protection circuit including
a current path between the power supply input and the capacitance, the current path including a variable impedance element configured to vary an impedance of the current path in response to a control input;
an energy storage circuit providing, in response to an amount of energy stored therein, a control signal to the control input;
a timer circuit configured to couple the power supply input to the energy storage circuit and to start timing, in response to an applied voltage at the power supply input and, after a first time period, isolate the power supply input from the energy storage circuit; and
an inrush current limiting circuit configured, in response to discharging of the energy stored in the energy storage circuit in response to an external signal and at a discharge rate, to charge the capacitance according to a predetermined slew rate derived from the discharge rate.
0. 26. A controller for a device, the controller comprising:
a connector for plugging the device into a source of a power supply voltage and unplugging the device from the source of power supply voltage, wherein the connector comprises:
a first contact for connecting to a first power supply contact of the source;
a second contact for connecting to a logic output from the source; and
a third contact for connecting to a second power supply contact of the source;
an impedance having a current input that couples to the first contact of the connector, an impedance control input, and a current output coupling to the device; and
an impedance control circuit comprising:
a first timer;
a logic input coupling to the second contact of the connector; and
an impedance control output connected to the impedance control input, the impedance control output placing the impedance in a high-impedance state during a first time interval controlled by the first timer in response to an applied supply voltage that is triggered by, and starts timing in response to, the device being plugged into the source of power supply voltage, and the logic output from the source limiting current at the current input during a second time interval controlled by a second timer.
13. A controller for a device, the controller comprising:
a connector configured to connect the device to a power source, wherein the connector comprises:
a first contact for connecting to a first power supply contact of the power source; and
a second contact for connecting to a logic output connection of the power source; and a third contact for connecting to a second power supply contact of the power source;
an impedance component having a current input coupled to the first contact of the connector, an impedance control input, and a current output coupled to the device; and
an impedance control circuit comprising:
an impedance control output coupled to the impedance control input;
a first timer coupled to the current input and the impedance control output, wherein the impedance control circuit is configured to enable the impedance control output to force the impedance component to an OFF state during a first time interval controlled by the first timer, wherein the first timer is enabled when, and starts timing in response to a connection that is made between the connector and the power source; and
a logic input coupled to the second contact of the connector, wherein the impedance control circuit enables a limited amount of current at the current input based on the logic output during a second time interval.
20. A controller for a device, the controller comprising:
a connector for plugging the device into a source of energization and unplugging the device from the source of energization, wherein the connector comprises:
a first contact for connecting to a first power supply contact of the source;
a second contact for connecting to a logic output from the source; and
a third contact for connecting to a second power supply contact of the source;
an impedance component having a current input coupled to the first contact of the connector, an impedance control input, and a current output coupled to the device; and
an impedance control circuit comprising:
an impedance control output connected to the impedance control input;
a first timer configured to force the impedance OFF during a first time interval controlled by the first timer;
a second timer configured to provide a current limiting output during a second time interval; and
a current limiting circuit coupled to the logic input and the impedance control output,
wherein the current limiting circuit is configured to enable, via the impedance control output, a limited current output from the impedance component to the device during the second time interval based on the second timer,
wherein the current limiting circuit is configured to gradually change the impedance control output such that a voltage of the device has a slew rate that does not exceed a predetermined limit during the second time interval, and
wherein the current limiting circuit is configured to gradually change the impedance control output based on the logic output from the source.
2. The controller of
4. The controller of
the first timer coupled to the current input and the impedance control output, the first timer comprising a first timer output that forces the impedance OFF during the first time interval; and
a current limit circuit coupled to the logic input and the impedance control output, the current limit circuit comprising a current limit output coupled to the impedance control output and controlled by the second timer.
5. The controller of
6. The controller of
7. The controller of
9. The controller of
10. The controller of
11. The controller of
14. The controller of
a current limit circuit coupled to the logic input and the impedance control output, wherein the current limit circuit is configured to enable the impedance control output to control the impedance component to provide the limited amount of current at the current input during the second time interval such that a voltage of the device has a slew rate that does not exceed a preselected limit, wherein the second time interval is controlled by a second timer.
15. The controller of
16. The controller of
17. The controller of
a current limit circuit coupled to the logic input, the current limit circuit including a current limit output coupled to the impedance control output such that the impedance control output is configured to control the variable impedance based on the logic input, wherein the first timer includes a first timer output configured to override the current limit output such that the impedance control output forces the impedance OFF during the first time interval independent of the current limit output.
18. The controller of
19. The controller of
22. The controller of
23. The controller of
24. The controller of
25. The controller of
0. 27. The controller of claim 26, wherein the impedance control circuit is configured to control current provided to a capacitance of the device that includes at least one capacitor.
0. 29. The device of claim 28, wherein the capacitance provides power to the memory storage element in response to loss of power from the power supply input.
0. 30. The device of claim 28, further including a disc drive storage circuit configured to be powered by the power supply input.
0. 31. The device of claim 28, wherein the at least one capacitor is connected between the current path and a ground of the data storage device.
0. 33. The method of claim 32, further including the steps of
charging, at a charge rate, the capacitive circuit during a second time interval in response to the logic input indicating an off state for the storage device;
increasing the impedance between the external power supply and the power supply input at a slew rate determined by the charge rate; and
discharging, in response to the increase in the impedance determined by the charge rate, the capacitance of the memory storage device to provide power to the memory storage device.
0. 34. The method of claim 32, further including the step of determining the slew rate as a function of the device capacitance and power-using device elements of the storage device.
0. 35. The method of claim 32, wherein the capacitance of the memory storage device includes at least one capacitor.
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The present invention relates generally to inrush current controllers for hot plugging devices into host systems, and more particularly but not by limitation to hot plugging memory storage devices into host computer systems.
Various kinds of computer systems are arranged to provide for physical insertion and removal of one or more disc drives while the computer system is energized and running. When the computer system power supply contacts mate with the disc drive power supply contacts there can be a current surge that adversely affects the operation of the computer system, the disc drive or both.
Various types of circuits are known to reduce these current surges. However, these known circuits tend to be complex, expensive or unpredictable. A method and apparatus are needed that will provide a low cost, predictable startup with a limited inrush of current.
Embodiments of the present invention provide solutions to these and other problems, and offer other advantages over the prior art.
Disclosed is an inrush current controller for a device. The inrush current controller comprises a connector for hot-plugging the device into a source of energization. The inrush current controller also comprises an impedance. The impedance has a current input that couples to a first contact of the connector. The impedance has a current output that couples to the device, and an impedance control input.
The inrush current controller also comprises an impedance control circuit. The impedance control circuit has a logic input coupling to a second contact of the connector. The impedance control circuit has an impedance control output connected to the impedance control input. The impedance control output forces the impedance OFF during a first time interval after hot-plugging. The logic input triggers a limited inrush at the current input after the first time interval.
Other features and benefits that characterize embodiments of the present invention will be apparent upon reading the following detailed description and review of the associated drawings.
In the embodiments described below, an inrush current controller for a device has a connector for hot-plugging the device into a source of energization provided by a host system. A variable impedance controls flow of inrush current from the hot plug connector to the device. The hot plug connector couples a logic output from a host system to a logic input on an impedance control circuit. The impedance control circuit has an impedance control output connected to an impedance control input. The impedance control output forces the impedance OFF during a first time interval after hot-plugging. The logic input triggers a limited inrush at the current input after the first time interval.
The impedance control circuit ensures that energization is not applied to the device while the hot plug connector is in the process of being mated with the host system. The impedance control circuit also ensures that the energization of the device is controllable by the host system when the host system provides a logic output to the logic input. Energization of the device can be controlled by the host system to occur in a controlled, repeatable time and voltage sequence defined by the impedance control circuit.
In a preferred arrangement, the inrush current controller comprises low cost, reliable discrete components (resistors, capacitors, diodes, transistors), thus avoiding the higher cost and unpredictable startup of integrated circuits. There is no need for a charge pump (voltage multiplier) to provide a higher supply voltage for integrated circuits. The arrangement preferably does not include thermistor devices that can have low reliability and unpredictability due to aging.
The disc drive 100 includes an electrical connector 132 that is arranged for hot plugging the disc drive 100 into the host computer. The term “hot plugging” refers to adding or removing a device (such as drive 100) from a host system while the host system is energized or running. Hot plugging can be implemented across the range of host systems including laptop, desktop and large mainframe computers with multiple disc drive bays as well as various types of embedded control systems. As described in more detail below in connection with examples in
The inrush current controller 200 comprises an impedance 206 having a current input 208 that couples to a first contact 210 of the connector 204. The impedance 206 comprises an impedance control input 212, and a current output 214 that couples energization to the device 202. An electrical signal applied to the impedance control input 212 controls a variable impedance that conducts current between the current input 208 and the current output 214. The contact 210 typically mates with a power supply bus in the host system.
The inrush current controller 200 comprises an impedance control circuit 220 with a logic input 222 coupling to a second contact 224 of the connector 204. The second contact 224 mates with a logic output from the host system. The impedance control circuit 220 comprises an impedance control output 226 connected to the impedance control input 212. The impedance control output 226 forces the impedance 206 to an OFF state (high impedance) during a first time interval after hot-plugging. The impedance 206 is effectively an open circuit during the first time interval immediately after hot plugging. The logic input 222 triggers a limited inrush at the current input 208 after the first time interval. A common conductor 228 provides a return path for energization current for the device 202 as well as the inrush current controller 200 to a common bus in the host system.
In a preferred arrangement, the device 202 comprises a data storage device and the source of energization to which the connector 204 connects comprises a host computer system. The impedance control input 212 preferably comprises a control voltage that controls a variable impedance 206 between the current input 208 and the current output 214. The variable impedance is preferably continuously variable over a range of control voltages.
The impedance control circuit 220 ensures that energization is not applied to the device 202 while the hot plug connector 204 is in the process of being mated with the host system. The impedance control circuit 220 also ensures that the energization of the device 202 is controllable by the host system when the host system provides a logic output to the logic input 222. Energization of device 202 can be controlled by the host system to occur in a controlled, repeatable time and voltage sequence defined by the impedance control circuit 220. Details of the impedance control circuit 220 are explained in more detail below by way of an example illustrated in
In
In other respects, the inrush current controller 300 in
An impedance 206 in
A timer 302 in
The current pulse 304 has a pulse width (at the start of the first time interval) that is preferably about 20 milliseconds. The current pulse charges a capacitor 416 through a resistor 418. The capacitor 416 and the resistor 418 preferably have an RC time constant of about 0.5 milliseconds. The capacitor 416 is thus fully charged during the preferred first time interval of 20 milliseconds. The timer output 304 overrides the inrush current limit output 308 to the impedance control output 226 during the first time interval. During the first time interval, the impedance 206 is switched off by the timer output 304 regardless of the state of the inrush current limit output 308. After the first time interval, however, the FET 410 is effectively an open circuit and the impedance 206 is controlled by the inrush current limit output 308 which can only slowly discharge the capacitor 416. This arrangement protects the host computer and the device 202 from high inrush currents when the connector 204 is initially plugged in, and also allow for the host to control the timing of the application of energization to the device 202. It will be understood by those skilled in the art that time intervals and slew rates mentioned herein are exemplary, and other time intervals and slew rates can be used, depending on the needs of the application, by adjusting RC time constants.
When the hot plug connector 204 is unplugged from the source of energization (host), charged stored on capacitor 402 discharges through resistor 404. This discharge through resistor 404 automatically resets the timer when the connector is disconnected from the source of energization.
An inrush limit circuit 306 in
When transistor 432 is off and connector 204 is plugged into a power source, current flows from first contact 210 through a resistor 440 and a diode 442 to turn on the inrush current limit output 308. When the inrush current limit output 308 is turned on (corresponding to a low logic input 222), the inrush current limit output 308 charges capacitor 416 and maintains a high level voltage at impedance control input 212 which keeps the impedance 206 turned off. The charging of capacitor 416 by the inrush current limit output 308 has an RC time constant that is preferably about 0.1 second so that the logic level 222 is able to shut off the impedance 206 in a controlled manner.
When transistor 432 is on (corresponding to an open or high logic input 222), the collector 434 of transistor 432 is at DC common, and the capacitor 416 discharges through resistor 418, resistor 436 and transistor 432. The diode 442 is reverse biased and does not conduct. The discharge of capacitor 416 when the inrush current limit output 308 is off has a time constant that is preferably about 3.5 seconds. The long discharge time constant allows the impedance control input 212 to pass very slowly through a threshold turn-on voltage for the impedance 206. The impedance 206 is continuously variable over a range near its gate threshold voltage and turns on slowly and limits an inrush current between first contact 210 and device capacitance 444. The device voltage 310 preferably rises to its full value over a second time interval that is preferably about 100 milliseconds. For 12 volt energization, this limits the slew rate to a preselected limit, for example, about 12 volts per 100 milliseconds or less. The slew rate is controlled by the values of capacitor 416, resistors 418, 436 and the characteristics of impedance 206.
The logic input 222 triggers the limited inrush current when the logic input is either an open circuit or at a high level. The logic input 222, when at a low level, shuts off energization to the device 202 in a controlled manner (such as shown in
A zener diode 450 provides clamping for overvoltage protection, but is inactive under all normal operating conditions. Unlike prior inrush current controllers that include integrated circuits, the circuit 400 does not require a charge pump (voltage multiplier) to establish a separate higher voltage regulated power supply voltage for power conditioning, and current consumption in circuit 400 is low under steady state conditions.
The timing diagram in
When the host is ready for the device 202 to turn on, the host changes the logic input from low to high at time 514. At time 514, the capacitor 416 (
The timing diagram in
When the hot plug connector 204 is unplugged at time 910, the input current at current input 208 drops to zero mA as indicated at 912, and the logic input drops to a low level as indicated at 914. The current input 208 is free of any power supply bypass capacitors, and so the current through impedance 206 stops abruptly when the connector 204 is unplugged. The capacitor 444 (
When the hot plug connector 204 is unplugged, the impedance control input 212 rises above zero volts as indicated at 918 and then slowly decays as indicated at 920 back toward zero volts. A voltage at the current input drops abruptly as indicated 922 and then slowly decays as indicate at 924 back toward zero volts.
At the beginning of the timing diagram, the device 202 (
The timer 302 protects the device 202 by turning on MOSFET 410 when there is a positive voltage transient a the current input 208. The voltage spike at current input 208 triggers the transistor 410 in the timer 302 to conduct. When transistor 410 is ON, the source-to-gate voltage Vgs for the transistor in impedance 206 goes to zero as shown at 818, and thus the transistor in impedance 206 shuts off, protecting the device 202 from overvoltage. The timer 302 is triggerable by voltage transients at the current input 208, and the timer triggers to protect the device 202 from the transient.
In summary, an inrush current controller (such as 200) for a device (such as 202) has a connector (such as 204) for hot-plugging the device into a source of energization. An impedance (such as 206) has a current input (such as 208) coupled to a first contact (such as 210) of the connector and a current output (such as 214) coupled to the device. The impedance has an impedance control input (such as 212). An impedance control circuit (such as 220) has a logic input (such as 222) coupling to a second contact (such as 224) of the connector. The impedance control circuit has an impedance control output (such as 226) connected to the impedance control input. The impedance control output forces the impedance OFF during a first time interval after hot-plugging. The logic input triggers a limited inrush at the current input after the first time interval.
It is to be understood that even though numerous characteristics and advantages of various embodiments of the invention have been set forth in the foregoing description, together with details of the structure and function of various embodiments of the invention, this disclosure is illustrative only, and changes may be made in detail, especially in matters of structure and arrangement of parts within the principles of the present invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed. For example, the particular elements may vary depending on the particular application for the inrush current controller while maintaining substantially the same functionality without departing from the scope of the present invention. In addition, although the preferred embodiment described herein is directed to an energization system for a disc drive, it will be appreciated by those skilled in the art that the teachings of the present invention can be applied to energization systems for hot plugging other types of devices, without departing from the scope of the present invention.
Hussein, Hakam D., Zhang, Wendong Z.
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