Power supply apparatus, and image forming apparatus having the same

Abstract

A power supply apparatus with a plurality of power supply circuits each having a piezoelectric transformer and a voltage-controlled oscillator which generates a signal at an operating frequency used to drive the piezoelectric transformer in accordance with a control signal, includes a frequency-dividing circuit which divides the operating frequency generated by a voltage-controlled oscillator in at least one power supply circuit, and outputs a signal at a driving frequency to drive a piezoelectric transformer in the one power supply circuit. When at least one power supply circuit and remaining power supply circuits output voltages, the operating frequency generated by the voltage-controlled oscillator in the one power supply circuit is controlled to be higher than the operating frequency generated by the voltage-controlled oscillator in another power supply circuit.

Description

This interference causes a change in the transfer efficiency between yellow (Y) and magenta (M). This influence may appear as a visually recognized cycle in an image in accordance with the relationship with the process speed PS (mm/S) of the image forming apparatus, and degrade the image quality.

An interference image cycle Tb (mm) which may appear in an image in accordance with the process speed PS (mm/S) and the interference frequency Fb is given by
Tb=process speed PS/interference frequency Fb  (2)

It is generally said that the interference image cycle Tb (mm) can be visually recognized when it becomes 0.3 mm or more. The interference image cycle causes a decrease in the quality of a printed image. For the process speed PS=100 mm/S and the interference frequency Fb≦300 Hz, the pitch which can be visually recognized as density unevenness in the printed image becomes 0.3 mm or more.

For the frequency fx1=163 kHz and the frequency fx2=163.2 kHz, the interference frequency is given from the relationship of equation (1):

$\begin{array}{cc}\begin{array}{c}\mathrm{interference}\mathrm{frequency}\mathrm{Fb}=163-163.2\\ =200\mathrm{Hz}\end{array}& \left(3\right)\end{array}$

For the interference frequency Fb=200 Hz and the process speed PS=100 mm/S, the pitch of density unevenness in the printed image is given by:
Tb=100/200=0.5 mm  (4)

The circuit arrangement of the power supply apparatus according to this embodiment of the present invention will be described below with reference to FIG. 1. The power supply apparatus according to this embodiment includes a plurality of power supply circuits each having a piezoelectric transformer and a voltage-controlled oscillator (VCO) which generates a signal at an operating frequency used to drive the piezoelectric transformer in accordance with a control signal. The power supply apparatus includes a frequency-dividing circuit which divides the operating frequency generated by the voltage-controlled oscillator (VCO) in at least one power supply circuit, and outputs a signal at a driving frequency used to drive the piezoelectric transformer in one power supply circuit. When at least one power supply circuit and remaining power supply circuits output voltages, the operating frequency generated by the voltage-controlled oscillator in one power supply circuit is controlled to be higher than the driving frequency.

The circuit shown in FIG. 1 is different from the circuit used to explain an interference model in FIG. 3 in that a frequency-dividing circuit 141Y is arranged between the voltage-controlled oscillator (VCO) 110Y and a piezoelectric transformer driving FET 111Y in the Y-station high-voltage circuit. For example, the frequency division ratio of the frequency-dividing circuit 141Y is set to 2. Accordingly, the voltage-controlled oscillator (VCO) circuit 110Y operates at an operating frequency twice the driving frequency of the piezoelectric transformer 101Y. When the frequency division ratio of the frequency-dividing circuit 141Y is K (=1, 2, 4, 8, . . . ), the voltage-controlled oscillator (VCO) circuit 110Y operates at an operating frequency K times the driving frequency of the piezoelectric transformer 101Y.

In accordance with the relationship between the operating frequency of the voltage-controlled oscillator (VCO) and the driving frequency of the piezoelectric transformer 101Y, the frequency division ratio can be given by
frequency division ratio K=operating frequency of voltage-controlled oscillator/driving frequency of piezoelectric transformer  (5)

Of course, the frequency division ratio shown in FIG. 1 is not limited to “2”, but can be set in accordance with the circuit arrangement, the operating frequency of the voltage-controlled oscillator, and the driving frequency of the piezoelectric transformer.

In the circuit arrangement shown in FIG. 1, similar to FIG. 3, the line to which the resistors 105Y, 106Y, 107Y, and 108Y are connected comprises the output voltage detection line for detecting the output voltage of the operational amplifier 109Y which controls the voltage of the piezoelectric transformer 101Y in the Y-station high-voltage circuit. The output voltage detection line of the operational amplifier 109Y is arranged close to the driving signal line including 112M, 111M, and 115M and rectifier circuit connection line including 102M, 103M, 104M, and the like of the piezoelectric transformer 101M in the M-station high-voltage circuit. The capacitors 151 and 152 are connected between the Y- and M-station high-voltage circuits to form the circuit model.

The voltage-controlled oscillator 110Y in the Y-station high-voltage circuit operates at a frequency (operating frequency) twice the driving frequency of the piezoelectric transformer 101Y. The frequency-dividing circuit 141Y divides the operating frequency by 2 (½ times), and outputs it to the piezoelectric transformer 101Y via the FET 111Y. The piezoelectric transformer 101Y is driven based on the input frequency. Diodes 102Y and 103Y and a high-voltage capacitor 104Y rectify and smoothen the output from the piezoelectric transformer 101Y, and a high-voltage circuit 181Y outputs a high-voltage output bias via an output terminal 116Y.

The resistors 105Y, 106Y, and 107Y divide the output voltage, and output it to the non-inverting input terminal (positive terminal) of the operational amplifier 109Y via the protection resistor 108Y. Additionally, the capacitors 151 and 152 represented by broken lines superimpose and input a voltage component based on the driving frequency fx2 of the piezoelectric transformer 101M in the M-station high-voltage circuit.

The inverting input terminal (negative terminal) of the operational amplifier receives a high-voltage power supply control signal Vcont serving as an analog signal, from the DC controller 201 via a connection terminal 118Y and series resistor 114Y. When dividing the frequency by K (frequency division ratio K (=1, 2, 4, 8, . . . )), the DC controller 201 can output the high-voltage power supply control signal corresponding to the frequency division ratio K to the inverting input terminal (negative terminal).

It is well known that when a spurious component (a component generated by interference between circuits) of the signal whose frequency has not been divided is −A (dB), the spurious component becomes −A−20·log K (dB) after dividing the frequency of the signal by K, thereby reducing the influence of the spurious component by K.

FIG. 6 is a graph showing the effects obtained when the transfer high-voltage power supply includes the frequency-dividing circuit 141Y according to the first embodiment. Reference numeral 601 in FIG. 24 denotes a ripple voltage Vrp1 in the output voltage as a function of the interference frequency Fb (Hz) between the frequencies fx1 and fx2 without performing frequency division. The ripple voltage 602 is obtained by dividing the frequency by 2, a ripple voltage 603 is obtained by dividing the frequency by 4, and a ripple voltage 604 is obtained by dividing the frequency by 8. Referring to FIG. 6, the frequency-dividing circuit 141Y is arranged to drop the ripple voltage Vrp1. The higher the frequency division ratio, the flatter the peak of the ripple voltage. That is, the frequency-dividing circuit 141 Y is arranged to reduce the influence of the spurious component. The frequency-dividing circuit 141 Y whose frequency division ratio is 2 is arranged to decrease the spurious component of the output voltage of the voltage-controlled oscillator (VCO circuit) 110Y to about ½, and halve the ripple voltage value output from the output terminal 116Y.

Although the frequency division ratio of a frequency-dividing circuit 141 is set to “2” in the circuit arrangement of the power supply apparatus according to this embodiment, the frequency division ratio can be set to 1, 2, 4, 8, . . . as described above with reference to FIG. 6. Although the Y-station high-voltage circuit includes the frequency-dividing circuit 141Y in this embodiment, the M-, C-, and BK-station high-voltage circuits may include respective frequency-dividing circuits. In this case, the frequency division ratios of the frequency-dividing circuits can be different from each other.

In the power supply apparatus according to this embodiment, even when driving the piezoelectric transformers 101Y and 101M in the high-voltage circuits at close frequencies, the output ripple voltage value can decrease so as to form a preferable image with a small influence from interference.

Additionally, this embodiment can provide a power supply apparatus using the piezoelectric transformers which suppress the influence of interference between the driving frequencies of the piezoelectric transformers, implement downsizing and a high image quality, and require no experimental measure.

Second Embodiment

In the first embodiment, the high-voltage circuit with the frequency-dividing circuit, e.g., 141Y can effectively decrease the output ripple voltage value. In the second embodiment, an engine controller (DC controller) 201 can set the frequency division ratio of a frequency-dividing circuit.

FIG. 7 is a circuit diagram showing the arrangement of a transfer high-voltage power supply using a piezoelectric transformer according to the second embodiment. The same reference numerals as in FIG. 1 according to the first embodiment denote the same parts in FIG. 7. In addition, a high-voltage circuit 181M outputs a high-voltage output bias via an output terminal 116M. In FIG. 7, it will be understood that reference numerals 110Y-116Y, which include piezoelectric transformer 101Y, piezoelectric transformer driving FET 111Y as one example of a driving part to drive piezoelectric transformer 101Y, and voltage-controlled oscillator (VCO) 110Y, together comprise one example of a first voltage output part; and that reference numerals 110M-116M, which include piezoelectric transformer 101M, piezoelectric transformer driving FET 111M as one example of a driving part to drive piezoelectric transformer 101M, and voltage-controlled oscillator (VCO) 110M, together comprise one example of a second voltage output part.

The output voltage detection line of an operational amplifier 109Y is arranged close to the driving signal line including 112M, 111M, and 115M and a rectifier circuit connection line including 102M, 103M, 104M, and the like of a piezoelectric transformer 101M in an M-station high-voltage circuit. In this case, capacitors 151 and 152 represented by broken lines are connected between the Y- and M-station high-voltage circuits to form a circuit model. Similarly, the output voltage detection line of the operational amplifier 109M is arranged close to the driving signal line including 112Y, 111Y, and 115Y and a rectifier circuit connection line including 102Y, 103Y, 104Y, and the like of a piezoelectric transformer 101Y in the Y-station high-voltage circuit. Capacitors 153 and 154 represented by broken lines are connected between the M- and Y-station high-voltage circuits to form a circuit model.

A frequency-dividing circuit 141Y connected to a voltage-controlled oscillator (VCO circuit) 110Y in the Y-station high-voltage circuit comprises a circuit capable of setting the frequency division ratio by using an external device, such as a programmable counter. A frequency-dividing circuit 141M connected to a voltage-controlled oscillator (VCO circuit) 110M in the M-station high-voltage circuit also comprises a circuit capable of setting the frequency division ratio by using the external device, such as the programmable counter. The frequency-dividing circuit 141Y includes connection terminals 142Ya, 142Yb, and 142Yc each of which is connected to the output port of an MPU 207 mounted in the DC controller 201. The frequency-dividing circuit 141M also includes connection terminals 142Ma, 142Mb, and 142Mc each of which is connected to the output port of a control element (e.g., the MPU 207) mounted in the DC controller 201. In this embodiment, the MPU 207 is exemplified as a main controller for setting the frequency division ratio. However, the present invention is not limited to this. For example, the same arrangement can be implemented by using an ASIC or other semiconductor device.

FIG. 8 is a table for explaining the setting of the frequency division ratio in the MPU 207 of the DC controller 201. For example, when the frequency division ratios of the frequency-dividing circuits 141Y and 141M are each set to 2, the terminals 142Yc and 142Mc are set ON (ON: 1), and the terminals 142Ya and 142Ma and terminals 142Yb and 142Mb are set OFF (OFF: 0) under the control of the MPU 207. The MPU 207 of the DC controller 201 switches the ON/OFF states of each terminal, thereby setting the frequency division ratio (1, 2, 4, 8, 16, 32, . . . , or the like) of the frequency-dividing circuits 141Y and 141M.

The frequency division ratio is not fixed but can be selected and set from predetermined values (e.g., 1, 2, 4, 8, 16, 32, . . . , and the like), thus increasing the degree of freedom of the types and, especially, the layout of the electronic components to be used when designing the circuit board of the transfer high-voltage power supply.

For example, since the frequency division ratio of each frequency-dividing circuit is set to increase the interference frequency Fb, the interference image cycle Tb can be shortened (equation (2)). This makes it possible to prevent degradation of the quality of a printed image caused by interference of the frequency.

FIG. 9A is a graph showing the relationship between a bias voltage (control output voltage Edc) and a driving frequency. FIG. 9B is a partial enlarged view of an area 901 surrounded by a broken line in FIG. 9A. As shown in FIG. 9B, the control output voltage of the Y- station high-voltage circuit is set to EdcY_L, and the control output voltage of the M-station high-voltage circuit is set to EdcM_L. The difference between the control output voltages Edc of two station high-voltage circuits is ΔEdc (see FIG. 9B).

When the Y-station high-voltage circuit outputs the control output voltage EdcY_L, the driving frequency of the piezoelectric transformer 101Y is FxY_L. When the M-station high-voltage circuit outputs the control output voltage EdcM_L, the driving frequency of the piezoelectric transformer 101M is FxM_L. At this time, the difference between the driving frequencies in the Y- and M-station high-voltage circuits is ΔFL.

When the control output voltage of the Y-station high-voltage circuit rises to EdcY_H, and the control output voltage of the M-station high-voltage circuit rises to EdcM_H by environmental variation or the like, the difference between the control output voltages is ΔEdc. At this time, the driving frequencies of the piezoelectric transformers in the respective station high-voltage circuits are FxY_H and FxM_H as shown in FIG. 9B. The difference between the driving frequencies is ΔFH. When comparing the differences of the driving frequencies, ΔFH<ΔFL. That is, when both the control output voltages rise by environmental variation or the like, the difference ΔFH between the driving frequencies decreases. For the difference ΔFH<300 Hz and the process speed PS=100 mm/s, the pitch which can be visually recognized as density unevenness in a printed image becomes 0.3 mm or more (see equation (2)), and density unevenness occurs in a printed image.

In order to prevent density unevenness in the printed image when the driving frequency difference ΔFH<300 Hz, the MPU 207 can set the frequency division ratios of the frequency-dividing circuits 141Y and 141M in accordance with the setting example shown in FIG. 8. The output ripple voltage value decreases by setting the frequency division ratio (e.g., changing the frequency division ratio from 1 to 2) to form a preferable image with a small influence of interference of the driving frequency.

Assume that the driving frequency difference ΔFL=500 Hz while the frequency division ratios of the frequency-dividing circuits in the Y- and M-station high-voltage circuits are set to “1” (142Ya=142Yb=142Yc=0, and 142Ma=142Mb=142Mc=0). In this case, when the driving frequency difference ΔFH=250 Hz by environmental variation, the MPU 207 sets the frequency division ratio of the frequency-dividing circuit 141Y in the Y-station high-voltage circuit to “2” (142Ya=142Yb=0, and 142Yc=1). The output ripple voltage value can be decreased by switching the setting of the frequency division ratio from “1” to “2” (see FIG. 6). That is, when the driving frequency difference decreases, the MPU 207 sets a higher frequency division ratio to reduce the interference energy and decrease the influence of the output ripple voltage value.

The setting of the frequency division ratio can be controlled by storing, in a table, the frequency division ratio to be set for the driving frequency difference ΔEdc to each frequency-dividing circuit in advance. When changing the setting of the frequency division ratio, the operating frequencies of the voltage-controlled oscillators (VCO circuits) 110Y and 110M can change depending on the setting of the frequency division ratio. In this case, the DC controller 201 can input the high-voltage power supply control signal corresponding to the frequency division ratio to the inverting input terminal (negative terminal).

In this embodiment, the frequency division ratio is not fixed but can change, thus increasing the degrees of freedom of the types and, especially, the layout of the electronic components to be used when designing the circuit board of the transfer high-voltage power supply.

Alternatively, in this embodiment, since the frequency division ratio is set depending on the layout of the electronic components and the operation state of the circuit, the output ripple voltage drops to form a preferable image with a small influence of interference.

Additionally, this embodiment can provide a power supply apparatus using piezoelectric transformers which suppress the influence of interference between the driving frequencies of the piezoelectric transformers, implement downsizing and a high image quality, and require no experimental measurements.

Third Embodiment

In the second embodiment, the engine controller (DC controller) 201 can set the frequency division ratio of the frequency-dividing circuit. In the third embodiment, detecting circuits 143Y and 143M detect the magnitudes of the interference frequency components of the driving frequency of a piezoelectric transformer in one power supply circuit, and the driving frequency of a piezoelectric transformer in the other power supply circuit. In the following description, the setting of the frequency division ratio of the frequency-dividing circuit is controlled based on the detection result obtained by the detecting circuit 143Y or 143M.

FIG. 10 is a circuit diagram showing the arrangement of a transfer high-voltage power supply using a piezoelectric transformer according to the third embodiment. The same reference numerals as in FIG. 7 according to the second embodiment denote the same parts in FIG. 10.

A frequency-dividing circuit 141Y connected to a voltage-controlled oscillator (VCO circuit) 110Y in a Y-station high-voltage circuit comprises a circuit capable of setting the frequency division ratio by using an external device, such as a programmable counter. A frequency-dividing circuit 141M connected to a voltage-controlled oscillator (VCO circuit) 110M in an M-station high-voltage circuit also comprises a circuit capable of setting the frequency division ratio by using the external device, such as the programmable counter.

The frequency-dividing circuit 141Y includes connection terminals 142Ya, 142Yb, and 142Yc each of which is connected to the output port of an MPU 207 mounted in a DC controller 201. The frequency-dividing circuit 141M also includes connection terminals 142Ma, 142Mb, and 142Mc each of which is connected to the output port of a control element (e.g., the MPU 207) mounted in the DC controller 201.

Signals input to the voltage-controlled oscillators (VCO circuits) 110Y and 110M are also input to the detecting circuits 143Y and 143M. The signals processed by the detecting circuits 143Y and 143M are input to the MPU 207 of the DC controller 201 via connection terminals 144Y and 144M respectively.

FIG. 11 is a block diagram showing the arrangement of the detecting circuit 143 mounted in the Y-station high-voltage circuit. Assume that the M-station high-voltage circuit has the same arrangement. In the arrangement shown in FIG. 11, a signal input to the voltage-controlled oscillator (VCO circuit) 110Y is input to the detecting circuit 143Y via a terminal 143in. The detecting circuit 143Y includes a low-pass filter (to be abbreviated as an “LPF” hereinafter) 1101Y having a cutoff frequency of 350 Hz. An amplifier (amp) 1102Y is arranged on the output side of the LPF 1101Y. The amp 1102Y amplifies a signal LPFout from which a high-frequency component has been cut off by the LPF 1101Y, i.e., a signal having only an interference frequency component. A capacitor 1103Y removes the DC component to rectify only the AC component into a DC component by using the rectification circuit made up of 1104Y to 1107Y. The DC signal is output via a terminal 143out, and then input to the MPU 207.

Assume that the frequency division ratios of the frequency-dividing circuits 141Y and 141M are set to 1, the driving frequency fx1 of the piezoelectric transformer 110Y in the Y-station high-voltage circuit is 163 KHz, and the driving frequency fx2 of the piezoelectric transformer 101M in the M-station high-voltage circuit is 163.25 KHz. In this case, a signal having a 250-Hz difference frequency (interference frequency) between the driving frequencies fx1 and fx2 is input as the input signal to the detecting circuit 143Y. The LPF 1101Y cuts off the high-frequency component of 350 Hz or more from the input signal 143in (FIG. 12A) to obtain LPFout (FIG. 12B), and the DC signal 143out shown in FIG. 12C is input to the MPU 207.

The MPU 207 compares the voltage value of the DC signal 143out with a threshold voltage Vth as a reference for changing the setting of the frequency division ratio. If the voltage value of the DC signal 143out is larger than the threshold voltage Vth, the MPU 207 determines that visible density unevenness occurs in a printed image, and changes the setting of the frequency division ratio.

For example, when both of the frequency division ratios of the frequency-dividing circuits in the Y- and M-station high-voltage circuits are set to 1, the MPU 207 sets the frequency division ratio of the frequency-dividing circuit 141Y in the Y-station high-voltage circuit to “2” (142Ya=142Yb=0, and 142Yc=1). As described in the first embodiment, the frequency division ratio can be set by switching the ON/OFF states of the signal applied to each terminal 142Ya, 142Yb, or 142Yc. The output ripple voltage value can be decreased by changing the setting of the frequency division ratio from “1” to “2” (see FIG. 6). That is, when the voltage value obtained by the detecting circuit 143Y is larger than the threshold voltage Vth, the MPU 207 sets a higher frequency division ratio to reduce the interference energy and decrease the influence of the output ripple voltage value.

In the above description, the setting of the frequency division ratio changes in the Y-station high-voltage circuit. When the DC signal voltage value obtained by the detecting circuit 143M is larger than the threshold voltage Vth in the M-station high-voltage circuit, the MPU 207 sets a higher frequency division ratio to reduce the interference energy and decrease the influence of the output ripple voltage value.

When changing the setting of the frequency division ratio, the operating frequencies of the voltage-controlled oscillators (VCO circuits) 110Y and 110M can change depending on the setting of the frequency division ratio. In this case, the DC controller 201 can input a high-voltage power supply control signal to the inverting input terminal (negative terminal) in correspondence with the frequency division ratio. The combination of the high-voltage circuit (station) which detects the magnitude of the interference frequency component by using the detecting circuits 143Y and 143M and the high-voltage circuit (station) which sets the frequency division ratio can be selected under the control of the DC controller. For example, based on the detection results of the magnitudes of the interference frequency components in both the Y- and M-station high-voltage circuits, the settings of the frequency division ratios of one or both of the high-voltage circuits can change.

For the process speed PS=100 mm/S and the interference frequency Fb≦300 Hz, the pitch which can be visually recognized as density unevenness in the printed image becomes 0.3 mm or more. Accordingly, the cutoff frequency of the LPF 1101Y is set to 350 Hz in this embodiment. However, for example, the cutoff frequency can also change in accordance with the process speed PS of the image forming apparatus. The DC controller 201 can also control the cutoff frequency.

In the first to third embodiments, the image forming apparatus has been described by exemplifying the transfer high-voltage power supply used in a color image forming apparatus of a tandem system. However, the image forming apparatus to be applied to the present invention is not limited to the color image forming apparatus, but may be a monochrome image forming apparatus which forms a monochrome image. Any circuit arrangement shown in FIG. 1, 7, or 10 may be applied to the high-voltage power supply apparatus 202 included in the image forming apparatus to reduce the output ripple voltage value and form a preferable image with a small influence of interference.

Note that the circuit arrangement of the transfer high-voltage power supply described in the first to third embodiments may include discrete components or a semiconductor IC. For example, in the circuit arrangement of the transfer high-voltage power supply described in the first to third embodiments, the voltage-controlled oscillator (VCO) and frequency-dividing circuit can include discrete components. In the power supply apparatus in these embodiments, the voltage-controlled oscillator (VCO) and frequency-dividing circuit can also include integrated semiconductor IC devices.

In these embodiments, the setting of the frequency division ratio is not fixed but can change, thus increasing the degree of freedom of the types and, especially, the layout of electronic components to be used when designing the circuit board of the transfer high-voltage power supply.

In these embodiments, since the frequency division ratio is set depending on the layout of the electronic components and the operation state of the circuit, the output ripple voltage drops to form a preferable image with a small influence of interference.

While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.

This application claims the benefit of Japanese Patent Application No. 2006-048978, filed Feb. 24, 2006, which is hereby incorporated by reference herein in its entirety.

Claims

1. A power supply apparatus with a plurality of voltage output circuits each having a piezoelectric transformer and an oscillator which generates a signal for driving the piezoelectric transformer and for controlling an output voltage of the piezoelectric transformer, comprising:

a frequency-dividing circuit which divides a frequency of the signal generated by the oscillator in at least one of the plurality of voltage output circuits, and outputs a driving frequency signal for driving the piezoelectric transformer in said at least one voltage output circuit,

wherein the frequency of the signal generated by the oscillator in said at least one voltage output circuit is larger than a frequency of the signal generated by the oscillator in another of the plurality of voltage output circuits.

2. The apparatus according to claim 1, wherein the frequency-dividing circuit divides the frequency of the signal in accordance with a frequency division ratio which can be arbitrarily set in accordance with a signal from an external device.

3. The apparatus according to claim 1, further comprising a detecting circuit which detects a magnitude of an interference frequency,

wherein the frequency-dividing circuit divides the frequency of the signal in accordance with a frequency division ratio which is controlled based on the interference frequency.

4. The apparatus according to claim 1, wherein the oscillator and the frequency-dividing circuit include discrete components.

5. The apparatus according to claim 1, wherein the oscillator and the frequency-dividing circuit include integrated semiconductor IC devices.

6. An image forming apparatus comprising:

an image forming unit adapted to form a image; and

a power supply unit adapted to output voltages to said image forming unit,

wherein said power supply unit comprises a plurality of voltage output circuits each having a piezoelectric transformer and an oscillator which generates a signal for driving the piezoelectric transformer and for controlling an output voltage of the piezoelectric transformer,

wherein at least one of the plurality of voltage output circuits has a frequency-dividing circuit which divides the frequency of the signal generated by the oscillator in said at least one voltage output circuit, and

wherein the frequency of the signal generated by the oscillator in said at least one voltage output circuit is larger than a frequency of the signal generated by the oscillator in another of the plurality of voltage output circuits.

7. The image forming apparatus according to claim 6, wherein said image forming unit includes a plurality of image forming stations, and

wherein said plurality of voltage output circuits output voltages to each of said plurality of image forming stations.

8. The image forming apparatus according to claim 7, wherein each of said plurality of image forming stations is a circuit for forming a different color image.

9. A power supply comprising:

a first and a second voltage output part each including a piezoelectric transformer, a driving part configured to drive the piezoelectric transformer, and an oscillator configured to output a frequency signal for driving the driving part, and

wherein

the oscillator of the first voltage output part and the oscillator of the second voltage output part each output the frequency signal having a frequency higher than the driving frequencies of the driving part of the first voltage output part and of the driving part of the second voltage output part, wherein a frequency difference occurs between a driving frequency of the piezoelectric transformer of the first voltage output part and a driving frequency of the piezoelectric transformer of the second voltage output part, wherein

the first voltage output part includes a first frequency-dividing part configured to divide the frequency signal output from the oscillator of the first voltage output part, and

the second voltage output part includes a second frequency-dividing part configured to divide the frequency signal output from the oscillator of the second voltage output part, and

a frequency division ratio of the first frequency-dividing part and a frequency division ratio of the second frequency-dividing part are set according to the frequency difference.

10. The power supply according to claim 9, wherein the first and the second voltage output part each include a feedback part which detects a voltage output from the piezoelectric transformer, wherein the frequency of the frequency signal output from the oscillator is controlled in accordance with the detected voltage.

11. The power supply according to claim 10, wherein the feedback part detects the voltage output from the piezoelectric transformer as being lower than a voltage previously input into the oscillator and feeds back the detected voltage to the oscillator.

12. The power supply according to claim 11, wherein the feedback part feeds back, to the oscillator, a comparison result between the detected voltage and a setting signal used for controlling the voltage output from the piezoelectric transformer so as to become a constant voltage.

13. The power supply according to claim 9, wherein the frequency division ratio of the first frequency-dividing part and the frequency division ratio of the second frequency-dividing part are each equal to or more than two.

14. The power supply according to claim 9, wherein the first frequency-dividing part outputs the divided frequency signal to the driving part of the first voltage output part, and the second frequency-dividing part outputs the divided frequency signal to the driving part of the second voltage output part.

15. The power supply according to claim 9, wherein the frequency of the frequency signal generated by the oscillator of the first voltage output part is close to the frequency of the frequency signal generated by the oscillator of the second voltage output part.

16. The power supply according to claim 9, wherein the frequency division ratio of the first frequency-dividing part and the frequency division ratio of the second frequency-dividing part are fixedly set so that the frequency difference is higher than a predetermined value.

17. The power supply according to claim 9, further comprising a detection circuit configured to detect the frequency difference,

wherein the frequency division ratio of the first frequency-dividing part and the frequency division ratio of the second frequency-dividing part are variably set based on the frequency difference detected by the detection circuit.

18. An image forming apparatus comprising:

a first image forming part;

a second image forming part; and

a power supply comprising a first and a second voltage output part each including a piezoelectric transformer, a driving part configured to drive the piezoelectric transformer, and an oscillator configured to output a frequency signal for driving the driving part, wherein the first voltage output part outputs a voltage to the first image forming part, and the second voltage output part outputs a voltage to the second image forming part output, and

wherein

the oscillator of the first voltage output part and the oscillator of the second voltage output part each output the frequency signal having a frequency higher than the driving frequencies of the driving part of the first voltage output part and of the driving part of the second voltage output part, wherein a frequency difference occurs between a driving frequency of the piezoelectric transformer of the first voltage output part and a driving frequency of the piezoelectric transformer of the second voltage output part, wherein

the first voltage output part includes a first frequency-dividing part configured to divide the frequency signal output from the oscillator of the first voltage output part, and

the second voltage output part includes a second frequency-dividing part configured to divide the frequency signal output from the oscillator of the second voltage output part, and

a frequency division ratio of the first frequency-dividing part and a frequency division ratio of the second frequency-dividing part are set according to the frequency difference.

19. The image forming apparatus according to claim 18, wherein the first and the second voltage output part each include a feedback part which detects a voltage output from the piezoelectric transformer, wherein the frequency of the frequency signal output from the oscillator is controlled in accordance with the detected voltage.

20. The image forming apparatus according to claim 19, wherein the feedback part detects the voltage output from the piezoelectric transformer as being lower than a voltage previously input into the oscillator and feeds back the detected voltage to the oscillator.

21. The image forming apparatus according to claim 20, wherein the feedback part feeds back, to the oscillator, a comparison result between the detected voltage and a setting signal used for controlling the voltage output from the piezoelectric transformer so as to become a constant voltage.

22. The image forming apparatus according to claim 18, wherein the first and the second image forming part each include a charging part configured to charge an image carrier, a developing part configured to develop a latent image formed on the image carrier, or a transferring part configured to transfer an image formed on the image carrier.

23. The image forming apparatus according to claim 18, wherein the frequency division ratio of the first frequency-dividing part and the frequency division ratio of the second frequency-dividing part are each equal to or more than two.

24. The image forming apparatus according to claim 18, wherein the first frequency-dividing part outputs the divided frequency signal to the driving part of the first voltage output part, and the second frequency-dividing part outputs the divided frequency signal to the driving part of the second voltage output part.

25. The image forming apparatus according to claim 18, wherein the frequency of the frequency signal generated by the oscillator of the first voltage output part is close to the frequency of the frequency signal generated by the oscillator of the second voltage output part.

26. The image forming apparatus according to claim 25, wherein the first and the second image forming part each form an image, wherein the image includes density unevenness,

the frequency of the frequency signal generated by the oscillator of the first voltage output part and the frequency of the frequency signal generated by the oscillator of the second voltage output part are higher than a frequency corresponding to a pitch of the density unevenness of the image.

27. The image forming apparatus according to claim 26, wherein the pitch of the density unevenness of the image is determined based on process speed of the first and the second image forming part and a difference between the driving frequencies of the driving parts of the first and the second voltage output parts.

28. The image forming apparatus according to claim 18, wherein the frequency division ratio of the first frequency-dividing part and the frequency division ratio of the second frequency-dividing part are fixedly set so that the frequency difference is higher than a predetermined value.

29. The image forming apparatus according to claim 18, further comprising a detection circuit configured to detect the frequency difference,

wherein the frequency division ratio of the first frequency-dividing part and the frequency division ratio of the second frequency-dividing part are variably set based on the frequency difference detected by the detection circuit.