Transient suppression for boost regulator

Abstract

A circuit for generating an output voltage to a top node of a plurality of led strings. The circuit includes an inductor having a load current flowing therethrough and a switching transistor responsive to a switching control signal. An integrator generates a compensation voltage responsive to a voltage at a bottom node of the led string and a reference voltage. Circuitry for combining an a correction offset with the compensation voltage is responsive to the compensation voltage and the load current through the inductor. The offset is generated only during a step load change of the load current and substantially reduces voltage transients from the compensation voltage and the output voltage. A summation circuit sums the compensation voltage including the correction offset with at least the voltage at the bottom node of the led string to generate a first control signal. A latch generates the switching control signal responsive to the first control signal and a leading edge blanking signal.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

This application
Avg inductor current ILavg (average)=Iload*Vout/(Vin*efficiency)
Peak inductor current ILpeak=ILavg+V_in/L*D*T*0.5 (for continuous system)
Capacitor ripple current Iripple=ILpeak
Capacitor ripple voltage Vripple=ESR*ILpeak

In a given system, where most of these terms are defined, the important figures for defining ripple are the peak inductor current which is defined by the load current and other factors, and the output capacitor ESR. In high voltage applications such as an LED driver where many LEDs are connected in series, the type of capacitors used to obtain the required output capacitances can have a relatively high ESR. This can provide high level output ripple. The operation of the integral control scheme will mean that the average value of this ripple wave form will be regulated to the required level. For most applications this is acceptable. However, LED driver systems attempt to regulate the voltage at the top of an LED string such that the voltage at the bottom is only just enough for the current source to function properly. This is done to minimize power dissipation in the LED driver. If this lower level is regulated to the average of the target level, the lower portions of the ripple are below the target and they push the current source into its linear region of operation. This will get worse as the load current and ESR increase and also if the number of LEDs increases thus increasing the inductor current. To solve this, the target voltage must be raised to guarantee that it does not affect operation. This is difficult to do in practice and will result in the headroom for the current sources being set higher than required to guarantee that there is never a problem, increasing potential power dissipation in cases where it is not needed.

FIG. 8 illustrates a boost converter providing a new method for applying the feedback signal at the FB pin to the input of the integrator 402. The input of the FB pin which is normally fed to both the integrator 402 and the voltage feedback term in the control loop of the summation circuit 416 in the control loop is sampled and held by a switch 802 on the input to the integrator 402. By sampling and holding this voltage when the switching node is at a logical “low” level at the output queue of flip-flop 418, the integrator 402 sets the regulation point to the lowest point in the output ripple wave form. This allows the portions in the wave form to align with the reference voltage. This means that the headroom of the current source can be set to a much lower level while guaranteeing that ripple will not be able to push the current sources into their linear regions of operation.

Referring now to FIGS. 9a and 9b, there are illustrated the inductor current I_L and reference voltage feedback (FB) waveforms with respect to a circuit not using the sample and hold switch (FIG. 9a) and a circuit using the sample and hold switch (FIG. 9b). When the sample and hold circuit is not used, the feedback voltage falls below the reference voltage V_REF at a number of points during operation. FIG. 9b illustrates the use of a sample and hold circuit and the feedback voltage FB remains above the reference voltage V_REF at all times independent of the provided load current I_L.

The boost regulator produces the minimal voltage needed to enable the LED string 204 with the highest forward voltage drop to run at the programmed current. The circuit employs a current mode control boost architecture that has a fast current sense loop and a slow voltage feedback loop. This architecture achieves a fast transient response that is essential for notebook backlit applications where the power can be a serious drain on batteries or instantly charged to an AC/DC adaptor without rendering noticeable visual nuisance. The number of LEDs that can be driven by the circuit depends on the type of LED chosen by the application.

The circuit is capable of boosting up to 34.5 volts and driving 9 LEDs in series for each channel. However, other voltage boost levels and numbers of LEDs may be supported in alternative embodiments. The dynamic headroom control circuit controls the highest forward voltage LED stack or effectively the lowest voltage from any of the input current pins. The input current pin at the lowest voltage is used as a feedback signal for the boost regulator. The boost regulator drives the output to the correct levels such that the input current pin at the lowest voltage is at the target headroom voltage. Since all of these LED strings are connected to the same output voltage, the other input current pins will have a higher voltage, but the regulated current source on each channel will ensure that each channel has the same programmed current. The output voltage will regulate cycle by cycle and is always referenced to the highest forward voltage string in the architecture.

It will be appreciated by those skilled in the art having the benefit of this disclosure that this LED driver provides an improved operating characteristic when driving LED strings in multiple channels. It should be understood that the drawings and detailed description herein are to be regarded in an illustrative rather than a restrictive manner, and are not intended to be limiting to the particular forms and examples disclosed. On the contrary, included are any further modifications, changes, rearrangements, substitutions, alternatives, design choices, and embodiments apparent to those of ordinary skill in the art, without departing from the spirit and scope hereof, as defined by the following claims. Thus, it is intended that the following claims be interpreted to embrace all such further modifications, changes, rearrangements, substitutions, alternatives, design choices, and embodiments.

Claims

1. A circuit for generating an output voltage to a top node of a plurality of led strings, comprising:

an inductor having a load current flowing therethrough;

a switching transistor responsive to a switching control signal;

an integrator for generating a compensation voltage responsive to a voltage at a bottom node of an led string and a reference voltage;

circuitry for combining an offset with the compensation voltage responsive to the compensation voltage and the load current through the inductor, wherein the offset is created only during a step load change of the load current and substantially reduces voltage transients from the compensation voltage and the output voltage;

a summation circuit for summing the compensation voltage including the offset with at least the voltage at the bottom node of the led string to generate a first control signal;

a latch for generating the switching control signal responsive to the first control signal and a leading edge blanking signal.

2. The circuit of claim 1, wherein the circuitry for combining further comprises:

control logic for generating the offset responsive to the compensation voltage and the step load change of the load current; and

an adder circuit for adding the offset to the compensation voltage to substantially reduce the voltage transients.

3. The circuit of claim 2, wherein the control logic further comprises:

circuitry for implementing a control algorithm for generating a digital value of the offset responsive to the compensation voltage and the step load change of the load current; and

a digital to analog converter for generating the offset in analog format responsive to the digital value of the offset.

4. The circuit of claim 1, wherein the summation circuit further sums the compensation value, the voltage at the bottom node of the led string, a slope compensation ramp signal and a current sense signal to generate the first control signal.

5. The circuit of claim 1, wherein basic loop properties of the circuit remain unchanged in each load condition.

6. The circuit of claim 1 further including a sample and hold circuit between the integrator and the bottom node of the led string.

7. A circuit for generating an output voltage to a top node of a plurality of led strings, comprising:

an inductor having a load current flowing therethrough;

a switching transistor responsive to a switching control signal;

an integrator for generating a compensation voltage responsive to a voltage at a bottom node of the an led string and a reference voltage;

circuitry for implementing a control algorithm for generating a digital value of an offset responsive to the compensation voltage and a step load change of the load current;

a digital to analog converter for generating the offset in analog format responsive to the digital value of the offset;

an adder circuit for adding the offset to the compensation voltage to substantial reduce the voltage transients from the compensation voltage and the output voltage;

a summation circuit for summing the compensation voltage including the offset with at least the voltage at the bottom node of the led string to generate a first control signal; and

a latch for generating the switching control signal responsive to the first control signal and a leading edge blanking signal.

8. The circuit of claim 7, wherein the summation circuit further sums the compensation value, the voltage at the bottom node of the led string, a slope compensation ramp signal and a current sense signal to generate the first control signal.

9. The circuit of claim 7, wherein the basic loop properties of the boost regulator remain unchanged in each load condition.

10. The circuit of claim 7 further including a sample and hold circuit between the integrator and the bottom node of the led string.

11. A method for generating an output voltage to a top node of a plurality of led strings, comprising the steps of:

generating a compensation voltage responsive to a voltage at a bottom node of an led string and a reference voltage;

generating an offset voltage only during a step load change of the load current;

combining the offset voltage with the compensation voltage, wherein the offset voltage substantially reduces voltage transients from the compensation voltage and the output voltage;

summing the compensation voltage including the offset voltage with at least the voltage at the bottom node of the led string to generate a first control signal;

generating a switching control signal responsive to the first control signal and a leading edge blanking signal; and

generating the output voltage responsive to an input voltage and the switching control signal.

12. The method of claim 11, wherein the step of combining further comprises the step of adding the offset voltage to the compensation voltage to substantially reduce the voltage transients.

13. The method of claim 11, wherein the step of generating an offset voltage further comprises the steps of:

generating a digital value of the offset voltage responsive to the compensation voltage and the step load change of the load current with a control algorithm; and

converting the digital value of the offset voltage into the offset in an analog format.

14. The method of claim 11, wherein the step of summing further comprises the step of summing the compensation value, the voltage at the bottom node of the led string, a slope compensation ramp signal and a current sense signal to generate the first control signal.

15. The method of claim 11 further including the step of maintaining the basic loop properties of a boost regulator unchanged in each load condition.

16. The method of claim 11 further including the step of sampling and holding the voltage at the bottom node of the led string used to generate the compensation voltage.

17. A method for generating an output voltage to a top node of a plurality of led strings, comprising the steps of:

generating a compensation voltage responsive to a voltage at a bottom node of an led string and a reference voltage;

generating an offset voltage only during a step load change of the load current;

combining the offset voltage with the compensation voltage, wherein the offset voltage substantially reduces voltage transients from the compensation voltage and the output voltage;

summing the compensation voltage including the offset voltage with at least the voltage at the bottom node of the led string to generate a first control signal, wherein the step of summing further comprises the step of summing the compensation value, the voltage at the bottom node of the led string, a slope compensation ramp signal and a current sense signal to generate the first control signal;

generating a switching control signal responsive to the first control signal and a leading edge blanking signal; and

generating the output voltage responsive to an input voltage and the switching control signal.

18. A circuit for generating an output voltage to a top node of a plurality of led strings, comprising:

an inductor having a load current flowing therethrough;

a switching transistor responsive to a switching control signal;

an integrator for generating a compensation voltage responsive to a voltage at a bottom node of an led string and a reference voltage;

circuitry for combining a correction offset with the compensation voltage responsive to the compensation voltage and the load current through the inductor, wherein the offset is created only during a step load change of the load current and substantially reduces voltage transients from the compensation voltage and the output voltage;

a summation circuit for summing the compensation voltage including the correction offset with at least the voltage at the bottom node of the led string to generate a first control signal; and

a latch for generating the switching control signal responsive to the first control signal and a leading edge blanking signal.

19. The circuit of claim 18, wherein the circuitry for combining further comprises:

control logic for generating the correction offset responsive to the compensation voltage and the step load change of the load current; and

an adder circuit for adding the correction offset to the compensation voltage to substantially reduce voltage transients on the compensation voltage and the output voltage.

20. The circuit of claim 19, wherein the control logic further comprises:

circuitry for implementing a control algorithm for generating a digital value of the correction offset responsive to the compensation voltage and the step load change of the load current; and

a digital to analog converter for generating the correction offset in analog format responsive to the digital value of the correction offset.

21. The circuit of claim 18, wherein the summation circuit further sums the compensation value, the voltage at the bottom node of the led string, a slope compensation ramp signal and a current sense signal to generate the first control signal.

22. A circuit for generating an output voltage to a top node of a plurality of led strings, comprising:

an inductor having a load current flowing therethrough;

a switching transistor responsive to a switching control signal;

an integrator for generating a compensation voltage responsive to a voltage at a bottom node of an led string and a reference voltage;

circuitry for implementing a control algorithm for generating a digital value of a correction offset responsive to the compensation voltage and a step load change of the load current;

a digital to analog converter for generating the correction offset in an analog format responsive to the digital value of the correction offset;

an adder circuit for adding the correction offset in the analog format to the compensation voltage to substantially reduce the voltage transients from the compensation voltage and the output voltage;

a summation circuit for summing the compensation voltage including the correction offset with at least the voltage at the bottom node of the led string to generate a first control signal; and

a latch for generating the switching control signal responsive to the first control signal and a leading edge blanking signal.

23. The circuit of claim 22, wherein the summation circuit further sums the compensation value, the voltage at the bottom node of the led string, a slope compensation ramp signal and a current sense signal to generate the first control signal.

24. A method for generating an output voltage to a top node of a plurality of led strings, comprising:

generating a compensation voltage responsive to a voltage at a bottom node of an led string and a reference voltage;

generating a correction offset voltage;

combining the correction offset voltage with the compensation voltage, wherein the correction offset voltage substantially reduces voltage transients from the compensation voltage and the output voltage;

summing the compensation voltage including the correction offset voltage with at least the voltage at the bottom node of the led string to generate a first control signal;

generating a switching control signal responsive to the first control signal and a leading edge blanking signal; and

generating the output voltage responsive to an input voltage and the switching control signal,

wherein the generating a correction offset voltage further comprises:

generating a digital value of the correction offset voltage responsive to the compensation voltage and a step load change of the load current with a control algorithm; and

converting the digital value of the correction offset voltage into an analog format.

25. The method of claim 24, wherein the combining further comprises adding the correction offset voltage to the compensation voltage to substantially reduce the voltage transients.

26. The method of claim 24, wherein the summing further comprises summing the compensation value, the voltage at the bottom node of the led string, a slope compensation ramp signal and a current sense signal to generate the first control signal.

27. A method for generating an output voltage to a top node of a plurality of led strings, comprising:

generating a compensation voltage responsive to a voltage at a bottom node of an led string and a reference voltage;

generating a correction offset voltage only during a step load change of the load current;

combining the correction offset voltage with the compensation voltage, wherein the correction offset voltage substantially reduces voltage transients from the compensation voltage and the output voltage;

summing the compensation voltage including the correction offset voltage with at least the voltage at the bottom node of the led string to generate a first control signal, wherein the summing further comprises summing the compensation value, the voltage at the bottom node of the led string, a slope compensation ramp signal and a current sense signal to generate the first control signal;

generating a switching control signal responsive to the first control signal and a leading edge blanking signal; and

generating the output voltage responsive to an input voltage and the switching control signal.