Dynamic and adaptive optimization of read compare levels based on memory cell threshold voltage distribution

Abstract

A process is performed periodically or in response to an error in order to dynamically and adaptively optimize read compare levels based on memory cell threshold voltage distribution. One embodiment of the process includes determining threshold voltage distribution data for a population of non-volatile storage elements, smoothing the threshold voltage distribution data using a weighting function to create an interim set of data, determining a derivative of the interim set of data, and identifying and storing negative to positive zero crossings of the derivative as read compare points.

Description

CLAIM OF PRIORITY

This application is a divisional application of U.S. patent application Ser. No. 12/338,850, entitled “Dynamic And Adaptive Optimization Of Read Compare Levels Based On Memory Cell Threshold Voltage Distribution”, filed Dec. 18, 2008, and claims the benefit of U.S. Provisional Application No. 61/052,156 “Dynamic And Adaptive Optimization Of Read Compare Levels Based On Memory Cell Threshold Voltage Distribution,” by Nima Mokhlesi and Henry Chin, filed on May 9, 2008, incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to technology for non-volatile storage.

2. Description of the Related Art

Semiconductor memory has become more popular for use in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices. Electrical Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories.

Both EEPROM and flash memory utilize a floating gate that is positioned above and insulated from a channel region in a semiconductor substrate. The floating gate and channel regions are positioned between the source and drain regions. A control gate is provided over and insulated from the floating gate. The threshold voltage of the transistor is controlled by the amount of charge that is retained on the floating gate. That is, the minimum amount of voltage that must be applied to the control gate before the transistor is turned on to permit conduction between its source and drain is controlled by the level of charge on the floating gate.

When programming an EEPROM or flash memory device, such as a NAND flash memory device, typically a program voltage is applied to the control gate and the bit line is grounded. Electrons from the channel are injected into the floating gate. When electrons accumulate in the floating gate, the floating gate becomes negatively charged and the threshold voltage of the memory cell is raised so that the memory cell is in a programmed state. More information about programming can be found in U.S. Pat. No. 6,859,397, titled “Source Side Self Boosting Technique for Non-Volatile Memory;” U.S. Pat. No. 6,917,542, titled “Detecting Over Programmed Memory;” and U.S. Pat. No. 6,888,758, titled “Programming Non-Volatile Memory,” all three cited patents are incorporated herein by reference in their entirety.

In many cases, the program voltage is applied to the control gate as a series of pulses (referred to as programming pulses), with the magnitude of the pulses increasing at each pulse. Between programming pulses, a set of one or more verify operations are performed to determine whether the memory cell(s) being programmed have reached their target level. If a memory cell has reached its target level, programming stops for that memory cell. If a memory cell has not reached its target level, programming will continue for that memory cell.

Some EEPROM and flash memory devices have a floating gate that is used to store two ranges of charges and, therefore, the memory cell can be programmed/erased between two states (an erased state and a programmed state). Such a flash memory device is sometimes referred to as a binary memory device.

A multi-state memory device stores multiple bits of data per memory cell by identifying multiple distinct valid threshold voltage distributions (or data states) separated by forbidden ranges. Each distinct threshold voltage distribution corresponds to a predetermined value for the set of data bits encoded in the memory device. For example, a memory cell that stores two bits of data uses four valid threshold voltage distributions. A memory cell that stores three bits of data uses eight valid threshold voltage distributions.

Although non-volatile memory has proven to be very reliable, sometimes errors can occur. Many memory systems uses Error Correction Codes (ECC) to correct errors found during a read process. Sometime, however, ECC cannot correct all errors.

SUMMARY OF THE INVENTION

A process is performed to dynamically and adaptively optimize the read compare levels based on memory cell threshold voltage distribution. The read compare levels are used to perform a read operation. By optimizing the read compare levels, the accuracy of the read operation will be improved.

One embodiment includes accessing threshold voltage distribution data for a population of non-volatile storage elements, operating on the threshold voltage distribution data to create transformed threshold voltage distribution data, and identifying read compare points based on the transformed threshold voltage distribution data.

One embodiment includes accessing threshold voltage distribution data for a population of non-volatile storage elements, smoothing the threshold voltage distribution data, determining derivative information for the smoothed data, and identifying read compare points from the derivative information.

One embodiment includes determining threshold voltage distribution data for a population of non-volatile storage elements, smoothing said threshold voltage distribution data using a weighted function to create an interim set of data, determining a derivative of the interim set of data, identifying new read compare values based on negative to positive zero crossings of the derivative, and performing one or more read operations using the new read compare values.

One embodiment includes determining threshold voltage distribution data for a population of flash memory devices, convolving said threshold voltage distribution data with a Gaussian function to create an interim set of data, determining a derivative of the interim set of data, identifying negative to positive zero crossings of the derivative, storing new read compare values based on the identified negative to positive zero crossings of the derivative, and performing one or more read operations using the new read compare values.

One example implementation includes a two or three dimensional array of non-volatile storage elements and one or more managing circuits in communication with the non-volatile storage elements. The one or more managing circuits perform any of the processes described herein, including accessing threshold voltage distribution data for a population of non-volatile storage elements, smoothing the threshold voltage distribution data, determining derivative information for the smoothed data, and identifying read compare points from the derivative information.

One example implementation includes plurality of non-volatile storage elements, means for accessing threshold voltage distribution data for the non-volatile storage elements, means for operating on the threshold voltage distribution data to create transformed threshold voltage distribution data, and means for identifying read compare points based on the transformed threshold voltage distribution.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a top view of a NAND string.

FIG. 2 is an equivalent circuit diagram of the NAND string.

FIG. 3 is a block diagram of a non-volatile memory system.

FIG. 4 is a block diagram depicting one embodiment of a memory array.

FIG. 5 is a block diagram depicting one embodiment of a sense block.

FIG. 6 depicts an example set of threshold voltage distributions.

FIG. 7 depicts an example set of threshold voltage distributions.

FIG. 8 depicts an example coding of data into a set of data states associated with threshold voltage distributions.

FIG. 9 depicts an example coding of data into a set of data states associated with threshold voltage distributions.

FIG. 10 is a flow chart describing one embodiment of operating a non-volatile memory system.

FIG. 11 is a flow chart describing one embodiment of programming a non-volatile memory system.

FIG. 12 is a signal diagram depicting a read operation.

FIG. 13 depicts an example set of threshold voltage distributions.

FIG. 14 is a flow chart describing one embodiment of read data in a non-volatile memory system.

FIG. 15 is a flow chart describing one embodiment of a process performed for updating a non-volatile memory system during idle time.

FIG. 16 is a flow chart describing one embodiment of a process for updating read compare levels.

FIG. 17 is a flow chart describing one embodiment of a process for determining threshold voltage distribution data.

FIG. 18 is a graph of threshold voltage distribution data.

FIG. 19 is a graph showing the result of a derivative calculation

FIG. 20 20A is a flow chart that describes an alternative embodiment of the process of FIG. 16. In step 900, threshold voltage distribution data is determined for a population of memory cells. Step 900 is similar to step 800. In step 902, the threshold voltage distribution data is smoothed by convolving the threshold voltage distribution data with a function. In one set of examples, a weighted function is used. In one embodiment, a Gaussian function is. In another embodiment, the function is a truncated Gaussian so that the front and back tails of the Gaussian function are removed to look like FIG. 20A 20B. In other embodiments, functions (weighted and not weighted) other than a Gaussian can be used. Note that smoothed distribution function 862 of FIG. 18 provides an example of smoothing the threshold voltage distribution data by convolving the threshold voltage distribution data with the Gaussian function. In step 904, the derivative of the smoothed data is determined. Step 904 is similar to step 804. In step 906, the output of derivative calculation is investigated to look for negative to positive transitioning zero crossings in order to identify new read compare points. Step 906 is similar to step 806. In step 908, the new read compare points found in step 906 are used to replace the old read compare points. Step 908 is similar to step 808.

The table below provides an example set of data representing twenty one points along a Gaussian curve used for the convolution operation in step 902. As can be seen, the Gaussian serves as a weighting function.

2.73E−12
3.15E−10
2.21E−08
9.39E−07
2.42E−05
0.000379
0.003595
0.020685
0.072198
0.152842
0.196254
0.152842
0.072198
0.020685
0.003593
0.000379
2.42E−05
9.39E−07
2.21E−08
3.15E−10
2.73E−12

FIG. 21 21A is a flow chart that describes an alternative embodiment of the process of FIG. 16. In step 920, threshold voltage distribution data is determined for a population of memory cells. Step 920 is similar to step 800. In step 922, the threshold voltage distribution data is smoothed by convolving the threshold voltage distribution data with a skewed function. In one embodiment, the function is a Gaussian function that will be skewed as described below; however, other functions can also be skewed and used in step 922. In step 924, the derivative of the smoothed data is determined. Step 924 is similar to step 804. In step 926, the output of derivative calculation is investigated to look for zero crossings in order to identify new read compare points. Step 926 is similar to step 806. In step 928, the new read compare points found in step 926 are used to replace the old read compare points. Step 928 is similar to step 808.

FIG. 7 shows the threshold voltage distributions for each state as being symmetrical. However, in many cases, the threshold voltage distributions are not symmetrical. It has been observed in some cases that one side of a threshold voltage distribution may have a different slope than the other side of the threshold voltage distribution. For example, the threshold voltage distribution waveform of FIG. 21A 21B has a more gradual slop on side 930L and a more steep slope on side 930R. Because of the difference in slopes of the two sides of the threshold voltage distribution, some embodiments will skew the Gaussian function in order to accommodate the skew in distribution data. One example of skewing the Gaussian function is to multiply it by a line characterized by the equation Y=m×+b, where m and b could be positive or negative. In one implementation, the skewing is constant so that the Gaussian function is multiplied by the same equation along the entire range of threshold voltages. In another embodiment, the equation for the line can change over the range of threshold voltages. In one option Y=m×+b is used for lower threshold voltages (lower data states) and Y=−m×+b is used for higher threshold voltages (higher data states). One reason for doing this is that the steep slope can be at the upper end of a threshold voltage distribution for higher states (possibly because of data retention issues) so the process may want to give more weight to higher threshold voltages. On the other hand, the steep slope can be at the lower end of a threshold voltage distribution for lower states (possibly because of program disturb issues) so the process may want to give more weight to lower threshold voltages. In another option, the equation for the line can change for each data state by adjusting m from a high positive number toward zero and then to a high negative number when going from low data states to high data states.

In another embodiment, the width of the Gaussian function can be changed by changing the sigma for the Gaussian function. For example, one sigma could be used for low data states and a different sigma could be used for high data states. Alternatively, the sigma could change for each data state.

FIG. 22 is a flow chart that describes an alternative embodiment of the process of FIG. 16. In step 950, threshold voltage distribution data is determined for a population of memory cells. Step 950 is similar to step 800. In step 952, the threshold voltage distribution data is smoothed by using a weighted moving average. One example is to perform a convolution of the threshold voltage distribution data with a rectangular function. Other means for calculating a weighted moving average can also be used. In step 954, the derivative of the smoothed data is determined. Step 954 is similar to step 804. In step 956, the output of derivative calculation is investigated to look for zero crossings in order to identify new read compare points. Step 956 is similar to step 806. In step 958, the new read compare points found in step 956 are used to replace the old read compare points. Step 958 is similar to step 808.

FIG. 23 is a flow chart that describes an alternative embodiment of the process of FIG. 16. In step 1000, threshold voltage distribution data is determined for a population of memory cells. Step 1000 is similar to step 800. In step 1002, the threshold voltage distribution data is squared. This may serve to provide more contrast for the data. In step 1004, the square of threshold voltage distribution data is smoothed using any of the methods discussed above. In step 1006, the derivative of the smoothed data is determined. Step 1006 is similar to step 804. In step 1008, the output of derivative calculation is investigated to look for zero crossings in order to identify new read compare points. Step 1008 is similar to step 806. In step 1010, the new read compare points found in step 1008 are used to replace the old read compare points. Step 1010 is similar to step 808.

FIG. 24 is a flow chart describing another embodiment of determining read compare points. In step 1040, an initial set of new read compare points are determined using the process of FIG. 20 or 21, with a larger sigma for the Gaussian function. By using the larger sigma, the process of determining a new set of read compare points will be less precise. In step 1042, the original data of threshold voltage distribution data (see steps 900, 920, etc) is accessed. In step 1044, minima are searched for in the original data of threshold voltage distribution data in the vicinity of the initial set of new read compare points from step 1040. For example, the wave form 860 of FIG. 18 could be searched for minima within the vicinity of the initial set of new read compare points. In this manner, the initial set of new read compare points serves as a seed for a search algorithm.

FIG. 25 is a flow chart describing another embodiment of determining read compare points. In this embodiment, the new read compare points are adjusted by one or more offsets. In step 1100, the one or more offsets are determined. In step 1102, an initial set of new read compare points are determined using the process of FIGS. 16, 20, 21, 22, 23 or another process. In step 1104, the initial set of new read compare points are adjusted by the one or more offsets. In one example, one offset is used to adjust all of the new read compare points. In another embodiment, each new read compare point is adjusted by a different offset. In yet another embodiment, groups of new read compare points are adjusted by a different offset for each group.

Steps 1120-1134 provide one example of a process for determining one or more offsets (step 1100) using device characterization. In step 1120, one or more memory chips 212 are cycled many times (e.g., thousand or tens of thousands of times). For example, the memory is programmed and erased as many times as the maximum number of cycles allowed by specifications of the product (e.g., four thousand or other number). In step 1122, a data pattern is written to the memory cells. In step 1124, the one or more memory chips 212 are baked in an oven accelerate charge loss/gain. In step 1126, new read compare points are determined using any of the methods described above. In step 1128, a read process is performed using the new read compare points. In step 1130, the data measured in step 1128 is compared to the actual data. In step 1132, an error is calculated. In step 1134 adjustments are made to the read compare points and the error is recalculated. Trial and error can be used to make a large amount of guesses at the adjustments in order to minimize the error. A computer can be used to guess at the adjustments and calculate the new error in the attempt to minimize the error. The adjustments made to minimize the error are the offset to be used in step 1104. In one embodiment, each read compare points has a separate offset. In another embodiment, all of the calculated offsets are averaged to calculate a single offset foe all read compare points.

Another method that can be employed to determine each read point's offset value individually does not require any pre-characterization of the memory. This method can use any of the procedures discussed above to find the zero crossing of the derivative of the smoothed distribution function. It may be preferable to use a non-skewed function (e.g. a regular Gaussian) for the smoothing operation in order not to end up over-skewing the read levels. In this method, once the minima of the smoothed distribution function are determined, the values at X volts to the right and to the left of each minimum are observed and compared to each other. The difference in the two values or the ratio of the values can be used to obtain the sign and the magnitude of the offset for each and every read level. The tails of each distribution can often be modeled by an exponential function. A simple mathematical study can show that when two neighbor distributions merge into one another with one's upper tail overlapping the other's lower tail what happens to the position of the minimum of the sum of the two distributions (which is the only distribution function that can be measured if one does not have prior knowledge of the data was written to the page). Typically, the ideal read level that minimizes the error is where the two distributions cross each other. However, we do not have information about the two individual distributions, as we do not know the data that was written to the page. As a result we have to rely on the only information that is available which is the sum or superposition of all the states' distributions. The superposition distribution (e.g. plot 860 of FIG. 18) is the only available information. Once the local minima of the distribution function or of the smoothed function are obtained, one can look up values of the distribution function or the smoothed distribution function at, for example, 75 mV to the right and to the left of each local minimum. The sizes of these surrounding values can be compared with one another (by dividing one by the other and obtaining a ratio R) to gauge the asymmetry in the tails of the two neighbor distributions. With this asymmetry gauged, and a prior mathematical analysis that has already shown how much offset is required for various degrees of asymmetry in shape of the upper tail of State N as compared to the shape of the lower tail of State N+1 distributions. The required offset values can be looked up in a table whose input is the value of the ratio R. In another embodiment, the table's input will be the value of the ratio R1, in addition to information such as the maxima of the two neighbor peaks of the smoothed function, or the ratio of each one of these maxima to the smoothed minimum. This maximum to minimum ratio, and there are two of them per read level, are a good gauge of how wide each state's distribution is. The width of each of the two neighbor states may have a bearing on the offset value for the read level residing between the two states.

The processes discussed above for reading data, including determining new read compare points, can be used to read data after the data is programmed or can be used as part of a verify process during programming.

The foregoing detailed description of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. The described embodiments were chosen in order to best explain the principles of the invention and its practical application, to thereby enable others skilled in the art to best utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims appended hereto.

Claims

1. A memory system, comprising:

a plurality of non-volatile storage elements; and

one or more managing circuits in communication with said plurality of non-volatile storage elements, said managing circuits operate said plurality of non-volatile storage elements including:

accessing threshold voltage distribution data for a population of non-volatile storage elements;

operating on the threshold voltage distribution data to create transformed threshold voltage distribution data;

identifying read compare points based on the transformed threshold voltage distribution data;

replacing old read compare points with the identified read compare points; and

performing one or more read operations using the identified read compare points.

2. A memory system according to claim 1, wherein said plurality of non-volatile storage elements are arranged in NAND strings.

3. A memory system according to claim 1, wherein said operating on the threshold voltage distribution data comprises:

calculating derivative information for the threshold voltage distribution data, the read compare points are identified from the derivative information.

4. A memory system according to claim 3, wherein said operating on the threshold voltage distribution data comprises:

smoothing the threshold voltage distribution data prior to calculating the derivative information.

5. A memory system according to claim 4, wherein said smoothing the threshold voltage distribution data comprises:

convolving the threshold voltage distribution data with a truncated gaussian function to create an interim set of data, the derivative information is calculated from the interim set of data.

6. A memory system according to claim 4, wherein said smoothing the threshold voltage distribution data comprises:

smoothing the threshold voltage distribution data using a weighted function to create an interim set of data, the derivative information is calculated from the interim set of data.

7. A memory system according to claim 6, wherein:

the weighted function is a truncated gaussian function multiplied by a sloped line.

8. A memory system according to claim 4, wherein said one or more managing circuits square the threshold voltage distribution data prior to said smoothing.

9. A memory system according to claim 4, wherein said identifying read compare points includes:

identifying and storing negative to positive zero crossings in the derivative information.

10. A memory system according to claim 1, wherein said operating on the threshold voltage distribution data to create transformed threshold voltage distribution data comprises:

convolving the threshold voltage distribution data with a gaussian function.

11. A memory system according to claim 10, wherein said gaussian function is a skewed and truncated gaussian function.

12. A memory system according to claim 1, wherein said operating on the threshold voltage distribution data to create transformed threshold voltage distribution data comprises:

convolving the threshold voltage distribution data with a function.

13. A memory system according to claim 1, said operating on the threshold voltage distribution data to create transformed threshold voltage distribution data comprises:

squaring the threshold voltage distribution data.

14. A memory system according to claim 1, wherein said one or more managing circuits apply one or more offsets to the read compare points.

15. A memory system according to claim 1, wherein said one or more managing circuits apply a changing offset to the read compare points.

16. A memory system according to claim 1, wherein said one or more managing circuits operate said plurality of non-volatile storage elements further comprising:

searching for minima in the threshold voltage distribution data near the read compare points;

replacing old read compare points with the minima; and

performing one or more read operations using the minima.

17. A non-volatile storage apparatus, comprising:

an array of non-volatile storage elements; and

a managing circuit in communication with said array of non-volatile storage elements, said managing circuit operates said array of non-volatile storage elements including:

determining threshold voltage distribution data for a population of non-volatile storage elements;

smoothing said threshold voltage distribution data using a weighted function to create an interim set of data;

determining a derivative of the interim set of data;

identifying new read compare values based on negative to positive zero crossings of the derivative; and

performing one or more read operations using the new read compare values.

18. A non-volatile storage apparatus according to 17, wherein:

said identifying new read compare values based on negative to positive zero crossings of the derivative includes applying one or more offsets to the negative to positive zero crossings and storing the offset negative to positive zero crossings as the new read compare values, said new read compare values are indications of voltage levels for differentiating between multiple data states for multi-state flash memory.

19. A non-volatile storage apparatus, comprising:

an array of non-volatile storage elements; and

a managing circuit in communication with said array of non-volatile storage elements, said managing circuit operates said array of non-volatile storage elements including:

determining threshold voltage distribution data for a population of flash memory devices;

convolving said threshold voltage distribution data with a gaussian function to create an interim set of data;

determining a derivative of the interim set of data;

identifying negative to positive zero crossings of the derivative;

storing new read compare values based on the identified negative to positive zero crossings of the derivative; and

performing one or more read operations using the new read compare values.

20. A non-volatile storage apparatus according to 19, wherein:

said storing new read compare values based on the identified negative to positive zero crossings of the derivative includes applying one or more offsets to the negative to positive zero crossings and storing the offset negative to positive zero crossings as the new read compare values.

21. The memory system of claim 1, wherein:

the plurality of non-volatile storage elements comprises a three-dimensional array of storage elements.

22. The memory system of claim 1, wherein:

the plurality of non-volatile storage elements comprises a three-dimensional array of memory cells.

23. The memory system of claim 1, wherein:

the plurality of non-volatile storage elements are arranged in a three-dimensional memory structure.

24. The non-volatile storage apparatus of claim 17, wherein:

said array of non-volatile storage elements comprises a three-dimensional array of storage elements.

25. The non-volatile storage apparatus of claim 17, wherein:

said array of non-volatile storage elements comprises a three-dimensional array of memory cells.

26. The non-volatile storage apparatus of claim 19, wherein:

said array of non-volatile storage elements comprises a three-dimensional array of storage elements.

27. The non-volatile storage apparatus of claim 19, wherein:

said array of non-volatile storage elements comprises a three-dimensional array of memory cells.