Provided is a smart matching step-down circuit, comprising an alternating current input terminal (10), a rectifier filter circuit (20), a switching circuit (30), a high voltage BUCK control step-down circuit (40), a floating zero potential control circuit (41), a voltage detection and feedback circuit (50), a pwm controller (52), a full-bridge DC/ac converter circuit (60), an alternating current output terminal (70), an output voltage detection circuit (62), and a conversion controller (80); the high voltage BUCK control step-down circuit comprises a step-down inductor (L1) and a step-down capacitor (C18); the first end of the step-down inductor is connected to the output terminal of the switching circuit; the second end of the step-down inductor is connected to the positive electrode of the step-down filter capacitor, and is used for stepping down and filtering the pulse voltage, then outputting a second current; the floating zero potential control circuit comprises a flyback diode (D11, D12); the cathode of the flyback diode is connected to the circuit ground, together with the first end of the step-down inductor; the anode of the flyback diode is connected to the floating ground (GND), together with the negative electrode of the step-down filter capacitor; the smart matching step-down circuit can step down a wide voltage, and is broadly adaptable.

Patent
   RE48368
Priority
Sep 30 2014
Filed
May 15 2019
Issued
Dec 22 2020
Expiry
Dec 26 2034
Assg.orig
Entity
Small
0
18
currently ok
0. 17. A smart matching step-down circuit, comprising:
an alternating current (ac) input terminal connects to an external power supply to input a first ac within a predetermined voltage range;
a rectifier filter circuit connects to the ac input terminal for rectifying and filtering waveforms of the first ac to form a first direct current (DC);
a high voltage BUCK control step-down circuit connected to the rectifier filter circuit for performing a voltage step-down process and a filtering process toward the first DC so as to output a second DC;
a full-bridge DC/ac converter circuit connected to the high voltage BUCK control step-down circuit to convert the second DC to a second ac;
an ac output end connected to the full-bridge DC/ac converter circuit to output the second ac; and a switching circuit having an input end connecting to the rectifier filter circuit, and in response to control signals so that the switching circuit is turned on or off to output a pulse voltage.
1. A smart matching step-down circuit, comprising:
an alternating current (ac) input terminal connects to an external power supply to input a first ac within a predetermined voltage range;
a rectifier filter circuit connects to the ac input terminal for rectifying and filtering waveforms of the first ac to form a first direct current (DC);
an input end of a switching circuit connects to the rectifier filter circuit, and in response to control signals, the switching circuit is turned on or off to output a pulse voltage;
a high voltage BUCK control step-down circuit comprises a voltage step-down inductor, and a voltage step-down filter capacitor, wherein a first end of the voltage step-down inductor connects to an output end of the switching circuit, and a second end of the voltage step-down inductor connects to a positive pole of the voltage step-down filter capacitor for performing a voltage step-down process and a filtering process toward the pulse voltage so as to output a second DC;
a floating zero potential control circuit comprises fly-back diodes, a cathode of the fly-back diodes and the first end of the voltage step-down inductor cooperatively connect to a floating ground;
a voltage detection and feedback circuit comprises an input end connecting to the second end of the voltage step-down inductor to detect the second DC so as to generate a feedback message;
a pwm controller comprises a feedback end connecting to an output end of the voltage detection and feedback circuit, and a control end connecting to a controlled end of the switching circuit, in response to the feedback message, the pwm controller is configured to output control signals controlling a pulse width of the pulse voltage;
a full-bridge DC/ac converter circuit comprises an input end connecting to a positive pole of the voltage step-down filter capacitor to convert the second DC to the second ac;
an ac output end connects to the output end of the full-bridge DC/ac converter circuit to output the second ac;
an output voltage detection circuit connects to the ac output end to sample voltages of the second ac from the ac output end so as to generate a first sampling voltage; and
a conversion controller connecting to the output voltage detection circuit and the full-bridge DC/ac converter circuit, the conversion controller is configured to controlling a duty cycle ratio of outputted waveform of the full-bridge DC/ac converter circuit in accordance with the first sampling voltage so as to stabilize the second ac.
9. A travel-use power conversion device comprises a smart matching step-down circuit, the smart matching step-down circuit comprising:
an alternating current (ac) input terminal connects to an external power supply to input a first ac within a predetermined voltage range;
a rectifier filter circuit connects to the ac input terminal for rectifying and filtering waveforms of the first ac to form a first direct current (DC);
an input end of a switching circuit connects to the rectifier filter circuit, and M response to control signals, the switching circuit is turned on or off to output a pulse voltage;
a high voltage BUCK control step-down circuit comprises a voltage step-down inductor, and a voltage step-down filter capacitor, wherein a first end of the voltage step-down inductor connects to an output end of the switching circuit, and a second end of the voltage step-down inductor connects to a positive pole of the voltage step-down filter capacitor for performing a voltage step-down process and a filtering process toward the pulse voltage so as to output a second DC;
a floating zero potential control circuit comprises fly-back diodes, a cathode of the fly-back diodes and the first end of the voltage step-down inductor cooperatively connect to a floating ground;
a voltage detection and feedback circuit comprises an input end connecting to the second end of the voltage step-down inductor to detect the second DC so as to generate a feedback message;
a pwm controller comprises a feedback end connecting to an output end of the voltage detection and feedback circuit, and a control end connecting to a controlled end of the switching circuit, in response to the feedback message, the pwm controller is configured to output control signals controlling a pulse width of the pulse voltage;
a full-bridge DC/ac converter circuit comprises an input end connecting to a positive pole of the voltage step-down filter capacitor to convert the second DC to the second ac;
an ac output end connects to the output end of the full-bridge DC/ac converter circuit to output the second ac;
an output voltage detection circuit connects to the ac output end to sample voltages of the second ac from the ac output end so as to generate a first sampling voltage; and
a conversion controller connecting to the output voltage detection circuit and the full-bridge DC/ac converter circuit, the conversion controller is configured to controlling a duty cycle ratio of outputted waveform of the full-bridge DC/ac converter circuit in accordance with the first sampling voltage so as to stabilize the second ac.
2. The smart matching step-down circuit as claimed in claim 1, wherein the smart matching step-down circuit further comprises an output current detection circuit connecting to current detection ends of the ac output terminal and the conversion controller, and the output current detection circuit is configured to sample current of the second ac from the ac output terminal to generate a sampling current;
the conversion controller controls the duty cycle ratio of the outputted waveforms of the full-bridge DC/ac converter circuit in accordance with the first sampling voltage and the sampling current to stabilize the second ac.
3. The smart matching step-down circuit as claimed in claim 1, wherein the switching circuit comprises a MOS transistor and a switch driving circuit, a drain of the MOS transistor is the input end of the switching circuit, a gate of the MOS transistor is a controlled end of the switching circuit, and a source of the MOS transistor is the output end of the switching circuit.
4. The small matching step-down circuit as claimed in claim 1, wherein the voltage detection and feedback circuit comprises an optoelectronic coupler, a reference stabilized source, and a voltage sampling circuit, a positive end of at least one light emitting diode (LED) of the optoelectronic coupler connects to a second end of the voltage step-down inductor via a power supply circuit, and a negative end of the LED of the optoelectronic coupler connects to a cathode of the reference stabilized source, an anode of the reference stabilized source is grounded, and a reference pole of the reference stabilized source connects to the second end of the voltage step-down inductor via the voltage sampling circuit, and a photo-triode of the optoelectronic coupler connects to the feedback end of the pwm controller.
5. The smart matching step-down circuit as claimed in claim 1, wherein the full-bridge DC/ac converter circuit comprises an inverter-bridge having a first MOS transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor, gates of the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor respectively connects to one MOS driving circuit, and the MOS driving circuit connects to the corresponding pwm control end of the conversion controller;
a source of the second MOS transistor is a fire-wire end of the ac output terminal, and a source of the fourth MOS transistor is a zero-line end of the ac output terminal.
6. The smart matching step-down circuit as claimed in claim 5, wherein the output current detection circuit comprises a thirty-third resistor, a thirty-fourth resistor, and a thirty-fifth resistor, ends of the thirty-third resistor, the thirty-fourth resistor, and the thirty-fifth resistor connect to a source of the fourth MOS transistor and the voltage detection end of the conversion controller, and the other ends of the thirty-third resistor, the thirty-fourth resistor, and the thirty-fifth resistor connect to the floating ground.
7. The smart matching step-down circuit as claimed in claim 5, wherein the output voltage detection circuit comprises a rectifying bridge, an ac L pin connects to the source of the first MOS transistor and a L pin of the conversion controller, an ac N pin connects to the source of the fourth MOS transistor and the N pin of the conversion controller, a DC positive pole pin of the rectifying bridge connects to the floating ground via a twenty-first capacitor, an DC positive pole pin further connects to a VB pin of the conversion controller, and the DC negative pole pin connects to the floating ground.
8. The smart matching step-down circuit as claimed in claim 1, wherein the smart matching step-down circuit further comprises an over-current detection circuit, the over-current detection circuit comprises a twenty-ninth resistor and a twenty-second resistor, one end of the twenty-ninth resistor connects to the output end of the switching circuit, and the other end of the twenty-ninth resistor is grounded, one end of the twenty-second resistor connects to the output end of the switching circuit, and the other end of the twenty-second resistor connects to a current detection end of the pwm controller.
10. The travel-use power conversion device as claimed in claim 9, wherein the smart matching step-down circuit further comprises an output current detection circuit connecting to current detection ends of the ac output terminal and the conversion controller, and the output current detection circuit is configured to sample current of the second ac from the ac output terminal to generate a sampling current;
the conversion controller controls the duty cycle ratio of the outputted waveforms of the full-bridge DC/ac converter circuit in accordance with the first sampling voltage and the sampling current to stabilize the second ac.
11. The travel-use power conversion device as claimed in claim 9, wherein the switching circuit comprises a MOS transistor and a switch driving circuit, a drain of the MOS transistor is the input end of the switching circuit, a gate of the MOS transistor is a controlled end of the switching circuit, and a source of the MOS transistor is the output end of the switching circuit.
12. The travel-use power conversion device as claimed in claim 9, wherein the voltage detection and feedback circuit comprises an optoelectronic coupler, a reference stabilized source, and a voltage sampling circuit, a positive end of at least one light emitting diode (LED) of the optoelectronic coupler connects to a second end of the voltage step-down inductor via a power supply circuit, and a negative end of the LED of the optoelectronic coupler connects to a cathode of the reference stabilized source, an anode of the reference stabilized source is grounded, and a reference pole of the reference stabilized source connects to the second end of the voltage step-down inductor via the voltage sampling circuit, and a photo-triode of the optoelectronic coupler connects to the feedback end of the pwm controller.
13. The travel-use power conversion device as claimed in claim 9, wherein the full-bridge DC/ac converter circuit comprises an inverter-bridge having a first MOS transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor, gates of the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor respectively connects to one MOS driving circuit, and the MOS driving circuit connects to the corresponding pwm control end of the conversion controller;
a source of the second MOS transistor is a fire-wire end of the ac output terminal, and a source of the fourth MOS transistor is a zero-line end of the ac output terminal.
14. The travel-use power conversion device as claimed in claim 13, wherein the output current detection circuit comprises a thirty-third resistor, a thirty-fourth resistor, and a thirty-fifth resistor, ends of the thirty-third resistor, the thirty-fourth resistor, and the thirty-fifth resistor connect to a source of the fourth MOS transistor and the voltage detection end of the conversion controller, and the other ends of the thirty-third resistor, the thirty-fourth resistor, and the thirty-fifth resistor connect to the floating ground.
15. The travel-use power conversion device as claimed in claim 13, wherein the output voltage detection circuit comprises a rectifying bridge, an ac L pin connects to the source of the first MOS transistor and a L pin of the conversion controller, an ac N pin connects to the source of the fourth MOS transistor and the N pin of the conversion controller, a DC positive pole pin of the rectifying bridge connects to the floating ground via a twenty-first capacitor, an DC positive pole pin further connects to a VB pin of the conversion controller, and the DC negative pole pin connects to the floating ground.
16. The travel-use power conversion device as claimed in claim 9, wherein the smart matching step-down circuit further comprises an over-current detection circuit, the over-current detection circuit comprises a twenty-ninth resistor and a twenty-second resistor, one end of the twenty-ninth resistor connects to the output end of the switching circuit, and the other end of the twenty-ninth resistor is grounded, one end of the twenty-second resistor connects to the output end of the switching circuit, and the other end of the twenty-second resistor connects to a current detection end of the pwm controller.
0. 18. The smart matching step-down circuit as claimed in claim 17, wherein the high voltage BUCK control step-down circuit comprises a voltage step-down inductor, and a voltage step-down filter capacitor, wherein a first end of the voltage step-down inductor connects to an output end of the switching circuit, and a second end of the voltage step-down inductor connects to a positive pole of the voltage step-down filter capacitor for performing a voltage step-down process and a filtering process toward the pulse voltage so as to output the second DC.
0. 19. The smart matching step-down circuit as claimed in claim 18, wherein the smart matching step-down circuit further comprises a voltage detection and feedback circuit comprising an input end connecting to the second end of the voltage step-down inductor to detect the second DC so as to generate a feedback message.
0. 20. The smart matching step-down circuit as claimed in claim 19, wherein the smart matching step-down circuit further comprises a pwm controller comprising a feedback end connecting to an output end of the voltage detection and feedback circuit, and a control end connecting to a controlled end of the switching circuit, in response to the feedback message, the pwm controller is configured to output control signals controlling a pulse width of the pulse voltage.
0. 21. The smart matching step-down circuit as claimed in claim 20, wherein the smart matching step-down circuit further comprises an over-current detection circuit comprising a twenty-ninth resistor and a twenty-second resistor, one end of the twenty-ninth resistor connects to the output end of the switching circuit, and the other end of the twenty-ninth resistor is grounded, one end of the twenty-second resistor connects to the output end of the switching circuit, and the other end of the twenty-second resistor connects to a current detection end of the pwm controller.
0. 22. The smart matching step-down circuit as claimed in claim 17, wherein the smart matching step-down circuit further comprises a floating zero potential control circuit connected to the high voltage BUCK control step-down circuit and configured to control the second DC in a floating manner.
0. 23. The smart matching step-down circuit as claimed in claim 22, wherein the floating zero potential control circuit comprises fly-back diodes, a cathode of the fly-back diodes and the first end of the voltage step-down inductor cooperatively connect to a circuit ground, an anode of the fly-back diodes and a negative pole of the voltage step-down filter capacitor cooperatively connect to a floating ground.
0. 24. The smart matching step-down circuit as claimed in claim 17, wherein the smart matching step-down circuit further comprises a voltage control circuit connected to the full-bridge DC/ac converter circuit and configured to control the full-bridge DC/ac converter circuit so as to stably output the second ac.
0. 25. The smart matching step-down circuit as claimed in claim 24, wherein the voltage control circuit comprises an output voltage detection circuit connected to the ac output end to sample voltages of the second ac from the ac output end so as to generate a first sampling voltage.
0. 26. The smart matching step-down circuit as claimed in claim 25, wherein the voltage control circuit further comprises a conversion controller connecting to the output voltage detection circuit and the full-bridge DC/ac converter circuit, the conversion controller is configured to controlling a duty cycle ratio of outputted waveform of the full-bridge DC/ac converter circuit in accordance with the first sampling voltage so as to stabilize the second ac.
0. 27. The smart matching step-down circuit as claimed in claim 26, wherein the full-bridge DC/ac converter circuit comprises an inverter-bridge having a first MOS transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor, gates of the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor respectively connects to one MOS driving circuit, and the MOS driving circuit connects to the corresponding pwm control end of the conversion controller;
a source of the second MOS transistor is a fire-wire end of the ac output terminal, and a source of the fourth MOS transistor is a zero-line end of the ac output terminal.
0. 28. The smart matching step-down circuit as claimed in claim 27, wherein the smart matching step-down circuit further comprises an output current detection circuit comprising a thirty-third resistor, a thirty-fourth resistor, and a thirty-fifth resistor, ends of the thirty-third resistor, the thirty-fourth resistor, and the thirty-fifth resistor connect to a source of the fourth MOS transistor and the voltage detection end of the conversion controller, and the other ends of the thirty-third resistor, the thirty-fourth resistor, and the thirty-fifth resistor connect to a floating ground.
0. 29. The smart matching step-down circuit as claimed in claim 27, wherein the output voltage detection circuit comprises a rectifying bridge, an ac L pin connects to the source of the first MOS transistor and an L pin of the conversion controller, an ac N pin connects to the source of the fourth MOS transistor and the N pin of the conversion controller, a DC positive pole pin of the rectifying bridge connects to a floating ground via a twenty-first capacitor, an DC positive pole pin further connects to a VB pin of the conversion controller, and the DC negative pole pin connects to the floating ground.
0. 30. The smart matching step-down circuit as claimed in claim 17, wherein the switching circuit comprises a MOS transistor and a switch driving circuit, a drain of the MOS transistor is the input end of the switching circuit, a gate of the MOS transistor is the controlled end of the switching circuit, and a source of the MOS transistor is the output end of the switching circuit.
0. 31. The smart matching step-down circuit as claimed in claim 19, wherein the voltage detection and feedback circuit comprises an optoelectronic coupler, a reference stabilized source, and a voltage sampling circuit, a positive end of an LED of the optoelectronic coupler connects to the second end of the voltage step-down inductor within the high voltage BUCK control step-down circuit via a power supply circuit, and a negative end of the LED of the optoelectronic coupler connects to a cathode of the reference stabilized source, an anode of the reference stabilized source is grounded, and a reference pole of the reference stabilized source connects to the second end of the voltage step-down inductor within the high voltage BUCK control step-down circuit via the voltage sampling circuit, and a photo-triode of the optoelectronic coupler connects to a feedback end of the pwm controller.

and a voltage control circuit 90 which includes an output voltage detection circuit 62, and a conversion controller 80.

Specifically, the AC input terminal 10 connects to an external power supply to input a first AC within a predetermined voltage range. For instance, the predetermined voltage range may be from AC 90 to AC 265V, that is, the wide voltage range is from AC 90 to AC 265V. The rectifier filter circuit 20 connects to the AC input terminal 10 for rectifying and filtering waveforms of the first AC to form a first direct current (DC). An input end of the switching circuit 30 connects to the rectifier filter circuit 20, and in response to control signals, the switching circuit 30 is turned on or off to output a pulse voltage. That is, when the switching circuit 30 in an on or off state, the switching circuit 30 outputs a direct pulse, which is the above pulse voltage.

The high voltage BUCK control step-down circuit 40 includes a voltage step-down inductor (L1), and a voltage step-down filter capacitor (C18), wherein a first end of the voltage step-down inductor (L1) connects to the output end of the switching circuit 30, and a second end of the voltage step-down inductor (L1) connects to a positive pole of the voltage step-down filter capacitor (C18) for performing the voltage step-down and filtering processes toward the pulse voltage outputted by the switching circuit 30 so as to output a second DC.

The floating zero potential control circuit 41 includes fly-back diodes (D11, D12). A cathode of the fly-back diodes (D11, D12) and the first end of the voltage step-down inductor (L1) cooperatively connect to a floating circuit ground. An anode of the fly-back diodes (D11, D12) and a negative pole of the voltage step-down filter capacitor (C18) cooperatively connect to a floating ground. The smart matching step-down circuit is capable of stepping down a wide voltage, and may be broadly adaptable. The floating zero potential control circuit is configured to control the second DC in a floating manner. Specifically, the second DC is stabilized in accordance with a change of the high-voltage first AC outputted by the rectifier filter circuit 20. That is, under the control of the floating zero potential control circuit, the voltage value of the second DC is stable alter being outputted by the high voltage BUCK control step-down circuit 40, regardless of the voltage value inputted from the AC input end as long as the voltage value is in the range from AC 90 to 265 V. Generally, the voltage value of the second DC may be around 140 V.

The input end of the voltage detection and feedback circuit 50 connects to the second end of the voltage step-down inductor (L1) of the high voltage BUCK control step-down circuit 40 to detect the second DC so as to generate a feedback message. A feedback end of the PWM controller 52 connects to the output end of the voltage detection and feedback circuit 50, and a control end of the PWM controller 52 connects to a controlled end of the switching circuit 30 so as to control a pulse width of the pulse voltage. That is, the voltage detection and feedback circuit 50 and the PWM controller 52 are configured to control a duty cycle ratio of the outputted waveform of the switching circuit 30 so as to adjust the pulse width of the pulse voltage.

An input end of the full-bridge DC/AC converter circuit 60 connects to the positive pole of the voltage step-down filter capacitor (C18) to convert the second DC to the second AC. Specifically, the input end of the full-bridge DC/AC converter circuit 60 connects to the output end of the high voltage BUCK control step-down circuit 40 to convert the second DC to the second AC. The AC output end connects to the output end of the full-bridge DC/AC converter circuit 60 to output the second AC, which is a stable and fixed voltage, such as AC 110V, for supplying the power to the electric equipment of American standard and Europe standard. The output voltage detection circuit 62 connects to the AC output end to sample the voltages of the second AC from the AC output end so as to generate a first sampling voltage. It can be understood that the voltage control circuit 90 is electrically connected to the full-bridge DC/AC converter circuit 60 and configured to controlling the full-bridge DC/AC converter circuit 60 to stabilize the second AC outputted by the AC output end. The conversion controller 80 connects to the output voltage detection circuit 62 and the full-bridge DC/AC converter circuit 60. The conversion controller 80 is configured to controlling the duty cycle ratio of the outputted waveform of the full-bridge DC/AC converter circuit 60 in accordance with the first sampling voltage so as to stabilize the second AC. That is, the output voltage detection circuit 62 and the conversion controller 80 are configured to stabilize the second AC outputted by the AC output end.

In one embodiment, the AC input terminal 10 inputs the first AC within the predetermined voltage range, i.e., AC90-265V. The rectifier filter circuit 20 rectifies and filters the waveforms to form the first DC of high voltage in response to the control of the PWM controller 52, the switching circuit 30 outputs the first DC via a pulse format so as to output the pulse voltage. The pulse voltage is then applied with the voltage step-down process by the high voltage BUCK control step-down circuit 40 to generate the second DC. In addition, the floating zero potential control circuit controls the circuit in the floating manner, and stabilizes the second DC in accordance with a change of the high-voltage first AC outputted by the rectifier filter circuit. The second DC is converted by the full-bridge DC/AC converter circuit 50 and is applied with a PWM adjustment by the conversion controller 80 so as to output a stable second AC, i.e., which is generally around 110V. Thus, the wide voltage may be stepped down. As the input end may be the AC within the predetermined voltage range, such solution may be applicable to a large scope, such as being incorporated into a travel-use power conversion device.

In one embodiment, the smart matching step-down circuit further includes an output current detection circuit 61 connecting to current detection ends of the AC output terminal 70 and the conversion controller 80, and the output current detection circuit 61 is configured to sample the current of the second AC of the AC output terminal 70 to generate the sampling current. Correspondingly, the conversion controller 80 controls the duty cycle ratio of the outputted waveforms of the full-bridge DC/AC converter circuit 60 in accordance with the first sampling voltage and the sampling current, such that the second AC is stabilized. That is, in the embodiment, the full-bridge DC/AC converter circuit 60 references the current and the voltage of the AC output terminal 70 to control the duty cycle ratio of the outputted waveforms of the DC/AC converter circuit 60.

As shown in FIG. 2, in one embodiment, the rectifier filter circuit 20 includes a rectifying bridge (BD1) including four diodes and a filtering capacitor (C1). An input end of the rectifying bridge (BD1) connects to the AC input terminal 10, an output end connects to the positive pole of the filtering capacitor (C1) and a negative end of the filtering capacitor (C1) is grounded, wherein the first AC inputted from the AC input terminal 10 is rectified by the rectifying bridge (BD1), and is filtered by the filtering capacitor (C1) to form the first DC.

Referring to FIG. 3, the switching circuit 30 includes a MOS transistor (Q5) and a switch driving circuit. A drain of the MOS transistor (Q5) is the input end of the switching circuit 30, a gate of the MOS transistor (Q5) is the controlled end of the switching circuit 30, and a source of the MOS transistor (Q5) is the output end of the switching circuit 30. The switch driving circuit includes a twelfth diode (D10) and a twentieth resistor (R20). An anode of the twelfth diode (D10) and one end of the twentieth resistor (R20) connects to the gate of the first TFT (Q1), and a cathode of the twelfth diode (D10) and the other end of the twentieth resistor (R20) connects to the control end of the PWM controller 52, wherein the gate of the MOS transistor (Q1) receives the control signals of the PWM controller 52 so as to be turned on or off. The switching circuit 30 is controlled by the PWM controller 52 to output the pulse voltage.

The voltage detection and feedback circuit 50 includes an optoelectronic coupler (U5), a reference stabilized source (U6), and a voltage sampling circuit. A positive end of the LED of the optoelectronic coupler (U5) connects to the second end of the voltage step-down inductor (L1) within the switching circuit 30 high voltage BUCK control step-down circuit 40 via a power supply circuit, and a negative end of the LED of the optoelectronic coupler (U5) connects to the cathode of the reference stabilized source (U6). The anode of the reference stabilized source (U6) is grounded, and a reference pole of the reference stabilized source (U6) connects to the second end of the voltage step-down inductor (U1 L1) within the switching circuit 30 high voltage BUCK control step-down circuit 40 via the voltage sampling circuit. A photo-triode of the optoelectronic coupler (U5) connects to the feedback end of the PWM controller 52, wherein the power supply circuit is configured to supply the power to the optoelectronic coupler (U5). The voltage sampling circuit obtains the voltage value from the second end of the voltage step-down inductor (L1) within the high voltage BUCK control step-down circuit 40, which is inputted from the reference pole of the reference stabilized source (U6) to the reference stabilized source (U6), and then is compared with the reference voltage to obtain the feedback message. The feedback message couples with the feedback end of the PWM controller 52 via the optoelectronic coupler (U5).

Specifically, the above power supply circuit includes a twenty-fifth resistor (R25) and a fourth voltage regulator diode (ZD4), a third voltage regulator diode (ZD3), a second voltage regulator diode (ZD2), and a fifth voltage regulator diode (ZD5) serially connected in sequence. One end of the twenty-fifth resistor (R25) connects to the fourth voltage regulator diode (ZD4), and the fifth voltage regulator diode (ZD5) connects to the second end of the voltage step-down inductor (L1) within the high voltage BUCK control step-down circuit 40.

The voltage sampling circuit includes a twenty-sixth resistor (R26), a twenty-seventh resistor (R27), and a twenty-eighth resistor (R28). The twenty-sixth resistor (R26) connects to the second end of the voltage step-down inductor (L1) within the high voltage BUCK control step-down circuit 40, the twenty-eighth resistor (R28) is grounded, and the reference pole of the reference stabilized source (U6) connects to the twenty-seventh resistor (R27) and the twenty-eighth resistor (R28), wherein the voltages of the twenty-sixth resistor (R26), the twenty-seventh resistor (R27), and the twenty-eighth resistor (R28) are divided, and one voltage value is obtained from the twenty-seventh resistor (R27) and the twenty-eighth resistor (R28). The voltage value is compared with the reference voltage of the reference stabilized source (U6) to generate the feedback message coupling with the feedback end of the PWM controller 52 via the optoelectronic coupler (U5).

The PWM controller 52 includes a PWM control chip (U4), i.e., UC 3843. The PWM control chip (U4) includes a COMP pin, a VFB pin, a CS pin, a RC pin, a Vref pin, a VCC pin, an OUT pin, and a GND pin, wherein the COMP pin connects to ends of a twenty-fourth resistor (R24) and a sixteenth capacitor (C16), and the other end of the twenty-fourth resistor (R24) and the sixteenth capacitor (C16) are grounded. The VFB pin is the feedback end, a collector of the photo-triode of the optoelectronic coupler (U5) connects to the COMP pin via a twenty-third resistor (R23), an emitter and the VFB pin are cooperatively grounded, the CS pin is grounded via the fourteenth capacitor (C14) and connects to the output end of the switching circuit 30 via an over-current detection circuit 51, the CS pin also connects to the Vref pin via an eighteenth resistor (R18), the RC pin is grounded via the fifteenth capacitor (C15), the Vref pin is grounded via the thirteenth capacitor (C13), the VCC pin connects to the DC power supply and is grounded via a twelfth capacitor (C12), the OUT pin is the control end connecting to the gate of the MOS transistor (Q5) via the switch driving circuit, and the GND pin is grounded.

The over-current detection circuit 51 includes a twenty-ninth resistor (R29) and a twenty-second resistor (R22). One end of the twenty-ninth resistor (R29) connects to the output end of the switching circuit 30, and the other end of the twenty-ninth resistor (R29) connects to the input end of the high voltage BUCK control step-down circuit 40. In addition, the other end of the twenty-ninth resistor (R29) is grounded. One end of the twenty-second resistor (R22) connects to the output end of the switching circuit 30, and the other end of the twenty-second resistor (R22) connects to the current detection end. The over-current detection circuit is configured for detecting the current of the MOS transistor. When the MOS transistor (Q5) is turned on, a first group current (control current) passes through the OUT pin 6 of the PWM control chip (U4), the twentieth resistor (R20), the MOS transistor (Q5), the twenty-ninth resistor (R29) in turn, and finally connects to a circuit ground, thereby the MOS transistor (Q5) is turned on by the control current. At the same time, a second ground current passes through the point (a), the MOS transistor (Q5), the twenty-ninth resistor (R29), the cathode of the fly-back diodes (D11, D12), the step-down inductor (L1), the step-down capacitor (C18), and finally connects to the floating ground, which is a charging process. At this time, the second end of the voltage step-down inductor (L1) is at the high potential, while the first end of the voltage step-down inductor (L1) is at the low potential. Meanwhile, when the MOS transistor (Q5) is turned off, the current of the voltage step-down inductor (L1) is inverted, the second end of the voltage step-down inductor (L1) is at the low potential, and the first end of the voltage step-down inductor (L1) is at the high potential. At this time, the cathode of the fly-back diodes (D11, D12) connected to the second end of the voltage step-down inductor (L1) is also at the low potential and the anode of the fly-back diodes (D11, D12) is at the high potential, thereby the current can pass therethrough.

As shown in FIG. 4, the full-bridge DC/AC converter circuit 60 includes an inverter-bridge including a first MOS transistor (Q1), a second MOS transistor (Q2), a third MOS transistor (Q3), and a fourth MOS transistor (Q4). Gates of the first MOS transistor (Q1), the second MOS transistor (Q2), the third MOS transistor (Q3), and the fourth MOS transistor (Q4) respectively connects to one MOS driving circuit. The MOS driving circuit includes one resistor (R31\R32\R53) and one diode (D13\D14\D16). The MOS driving circuit connects to the corresponding PWM control end of the conversion controller 80. The source of the second MOS transistor (Q2) is a fire-wire end of the AC output terminal 70, and the source of the fourth MOS transistor (Q4) is the zero-line end of the AC output terminal 70.

The output current detection circuit 61 includes a thirty-third resistor (R33), a thirty-fourth resistor (R34), and a thirty-fifth resistor (R35). Ends of the thirty-third resistor (R33), the thirty-fourth resistor (R34), and the thirty-fifth resistor (R35) connect to the source of the fourth MOS transistor (Q4) and the voltage detection end of the conversion controller 80, and the other ends of the thirty-third resistor (R33), the thirty-fourth resistor (R34), and the thirty-fifth resistor (R35) connect to the floating ground.

The output voltage detection circuit 62 includes a rectifying bridge (BR1). An AC L pin connects to the source of the first MOS transistor (Q1) and the L pin of the conversion controller 80, an AC N pin connects to the source of the fourth MOS transistor (Q4) and the N pin of the conversion controller 80, a DC positive pole pin of the rectifying bridge (BR1) connects to the floating ground via, a twenty-first capacitor (C21), an DC positive pole pin further connects to the VB pin of the conversion controller 80, and the DC negative pole pin connects to the floating ground.

The conversion controller 80 includes an interface end 801 having connecting ends, including PWM1, PWM2, PWM3, PWM4, VB, N, L, and IS. The connecting ends PWM1, PWM2, PWM3, PWM4 connects to the MOS driving circuit of the first MOS transistor (Q1), the second MOS transistor (Q2), the third MOS transistor (Q3), and the fourth MOS transistor (Q4), and the connecting end IS connects to the IS node of the output current detection circuit 61.

Basing on the above smart matching step-down circuit, the present disclosure also includes a travel-use power conversion device having the above smart matching step-down circuit.

In view of the smart matching step-down circuit and the travel-use power convention device, the AC input terminal 10 inputs the first DC within a predetermined voltage range, i.e., AC90-265V. The rectifier filter circuit 20 rectifies and filters the waveforms to form the first DC of high voltage. In response to the control of the PWM controller 52, the switching circuit 30 outputs the first DC via the pulse format so as to output the pulse voltage. The pulse voltage is then applied with the voltage step-down process by the high voltage BUCK control step-down circuit 40 to generate the second DC of low voltage. In addition, the floating zero potential control circuit controls the circuit in the floating manner, and stabilizes the second DC in accordance with the change of the high-voltage first AC outputted by the rectifier filter circuit. The second DC is converted by the full-bridge DC/AC converter circuit 60 and is applied with the PWM adjustment by the conversion controller 80 so as to output a stable second AC, i.e., which is generally around 110V. Thus, the wide voltage may be stepped down. As the input end may be the AC within the predetermined voltage range, such solution may be applicable to a large scope, such as being incorporated into the travel-use power conversion device.

Although the features and elements of the present disclosure are described as embodiments in particular combinations, each feature or element can be used alone or in other various combinations within the principles of the present disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.

Xu, Xinhua

Patent Priority Assignee Title
Patent Priority Assignee Title
5969484, May 14 1998 Optimum Power Conversion, Inc. Electronic ballast
6700335, Sep 28 2001 OSRAM SYLVANIA Inc Method and circuit for regulating power in a high pressure discharge lamp
20060113922,
20070126372,
20080137383,
20100237793,
20100327776,
20110248640,
20120169240,
20130026938,
20140176049,
20140265900,
20140265935,
CN102684511,
CN103078549,
CN103354423,
CN104242671,
CN202889210,
/
Executed onAssignorAssigneeConveyanceFrameReelDoc
May 15 2019Devices Co., Ltd.(assignment on the face of the patent)
Date Maintenance Fee Events
May 15 2019BIG: Entity status set to Undiscounted (note the period is included in the code).
May 23 2019SMAL: Entity status set to Small.
Jun 20 2024M2552: Payment of Maintenance Fee, 8th Yr, Small Entity.


Date Maintenance Schedule
Dec 22 20234 years fee payment window open
Jun 22 20246 months grace period start (w surcharge)
Dec 22 2024patent expiry (for year 4)
Dec 22 20262 years to revive unintentionally abandoned end. (for year 4)
Dec 22 20278 years fee payment window open
Jun 22 20286 months grace period start (w surcharge)
Dec 22 2028patent expiry (for year 8)
Dec 22 20302 years to revive unintentionally abandoned end. (for year 8)
Dec 22 203112 years fee payment window open
Jun 22 20326 months grace period start (w surcharge)
Dec 22 2032patent expiry (for year 12)
Dec 22 20342 years to revive unintentionally abandoned end. (for year 12)