A data storage device (DSD) including a first non-volatile memory (NVM) media type for storing data and a second NVM media type for storing data. Metadata is obtained related to operation of the second NVM media type. The metadata is evaluated and data stored in the first NVM media type is managed based on the evaluated metadata.
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1. A system comprising:
a disk for storing data;
a solid state memory for storing data;
a solid state device (SSD) controller configured to obtain metadata related to data stored in the solid state memory, wherein the metadata includes non-address metadata indicating at least one of a priority of the data, a frequency of access of the data, a last access time of the data, whether the data was accessed in temporal proximity to a powering on or powering off of the system, storage of the data in the solid state memory, a fragmentation level of the data, and that the data is often sequentially accessed for reading or writing; and
a hard disk (HD) controller configured to:
evaluate the non-address metadata; and
determine a location on the disk for storing the data based on the evaluation of the non-address metadata.
15. A method for managing data stored in a data storage device (DSD), the method comprising:
using a solid state device (SSD) controller of the DSD to obtain metadata related to data stored in a solid state memory of the DSD, wherein the metadata includes non-address metadata indicating at least one of a priority of the data, a frequency of access of the data, a last access time of the data, whether the data was accessed in temporal proximity to a powering on or powering off of the DSD, storage of the data in the solid state memory, a fragmentation level of the data, and that the data is often sequentially accessed for reading or writing; and
using a hard disk (HD) controller of the DSD to:
evaluate the non-address metadata; and
determine a location on a disk of the DSD for storing the data based on the evaluation of the non-address metadata.
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This application claims the benefit of U.S. Provisional Application No. 61/918,537, filed on Dec. 19, 2013, which is hereby incorporated by reference in its entirety.
Data Storage Devices (DSDs) are often used to record data onto or to reproduce data from a Non-Volatile Memory (NVM) media. Some DSDs include multiple types of NVM media. For example, in the case of a Solid State Hybrid Drive (SSHD), a solid state NVM media such as a flash memory is used for storing data in addition to a second type of NVM media such as a rotating magnetic disk.
In many systems, a host will communicate with a DSD to store data in the DSD or to access data from the DSD. Such systems can include, for example, a computer system or other electronic device. When a host sends a command to store data in a DSD including both solid state NVM media and disk NVM media (i.e., a SSHD), the host may also provide hinting as to a priority of the data. A subsystem for the solid state NVM media may use this hinting to determine whether to store the data in the solid state NVM media. Although such hinting from a host can improve performance of the DSD, use of such hinting is generally limited to the subsystem for the solid state NVM media.
The features and advantages of the embodiments of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings. The drawings and the associated descriptions are provided to illustrate embodiments of the disclosure and not to limit the scope of what is claimed.
In the following detailed description, numerous specific details are set forth to provide a full understanding of the present disclosure. It will be apparent, however, to one of ordinary skill in the art that the various embodiments disclosed may be practiced without some of these specific details. In other instances, well-known structures and techniques have not been shown in detail to avoid unnecessarily obscuring the various embodiments.
In the example of
As shown in
HD Controller 120 controls operations for magnetic disk 150 and can include circuitry such as one or more processors for executing instructions and can include a microcontroller, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), hard-wired logic, analog circuitry and/or a combination thereof. In one implementation, HD controller 120 can include a System on a Chip (SoC).
SSD controller 122 controls operation for solid state memory 128 and can also include a microcontroller, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), hard-wired logic, analog circuitry and/or a combination thereof. In one implementation, SSD controller 122 can include a System on a Chip (SoC).
Host interface 126 is configured to interface DSD 106 with host 101 and may interface according to a standard such as, for example, PCI express (PCIe), Serial Advanced Technology Attachment (SATA), or Serial Attached SCSI (SAS). Although
In some embodiments, circuitry 108 or portions of circuitry 108 including HD controller 120, SSD controller 122, or host interface 126 may be combined into one component such as a System on a Chip (SoC).
In the embodiment of
Disk 150 can serve as a first type of NVM media which stores data that can be retained across power cycles (i.e., after turning DSD 106 off and on). As shown in
Disk 150 may include Shingled Magnetic Recording (SMR) zones of overlapping tracks and/or Conventional Magnetic Recording (CMR) zones of non-overlapping tracks. In SMR zones, data is written in overlapping tracks on disk 150 to achieve a higher number of tracks on disk 150. The overlap in tracks, however, means that new writes to a previously overlapped track affects data written in the overlapping track. For this reason, tracks are usually sequentially written in SMR zones to protect previously written data. On the other hand, CMR zones do not include overlapping tracks and can therefore allow for non-sequential writing and rewriting without affecting previously written data.
As discussed in more detail below, the portions of disk 150 including SMR zones can serve as a first NVM media type and the portions of disk 150 including CMR zones can serve as a second NVM media type. In such embodiments, DSD 106 may or may not include solid state memory 128.
Head 136 is arranged to magnetically read data from and magnetically write data to a surface of disk 150 as it rotates about its center. In more detail, head 136 is located at the distal end of actuator 130 which is rotated by Voice Coil Motor 132 to position head 136 relative to the surface of disk 150. Head 136 may form part of a Head Stack Assembly (HSA) including multiple heads for reading data from other disk surfaces radially aligned with disk 150.
DSD 106 also includes volatile memory 140 which can include, for example, a DRAM. Data stored in volatile memory 140 can include data read from disk 150, data to be written to disk 150, and/or instructions for operation of DSD 106, such as DSD firmware.
As shown in
Sensor 142 is configured to detect an environmental condition such as an acceleration, vibration, or temperature of DSD 106. For example, sensor 142 may detect that DSD 106 is in a free-fall state or that DSD 106 is in a high vibration state. HD Controller 120 may use an input from sensor 142 to determine to delay writing data to disk 150 to prevent errors when writing or reading data, or to implement protective measures to protect data on disk 150. In other embodiments, sensor 142 may be part of host 101. In such embodiments, the input of sensor 142 may be received by HD controller 120 via host interface 126.
In operation, host interface 126 receives commands from host 101 for reading data from and writing data to NVM such as solid state memory 128 or disk 150. In response to a write command from host 101, HD controller 120 may buffer the data to be written for the write command in volatile memory 140.
For data to be written to disk 150, a read/write channel (not shown) of HD controller 120 encodes the buffered data into write signal 32 which is provided to head 136 for magnetically writing data to disk 150. A servo controller (not shown) of HD controller 120 positions head 136 using VCM control signal 30 and spins disk 150 using SM control signal 34.
In response to a read command for data stored on disk 150, HD controller 120 positions head 136 via the servo controller to magnetically read the data stored on disk 150. Head 136 sends the read data as read signal 32 to a read/write channel of HD controller 120 for decoding and the data is buffered in volatile memory 140 for transferring to host 101 via host interface 126.
DSD 106 also includes solid state memory 128 for storing data in a second NVM media type. While the description herein refers to solid state memory generally, it is understood that solid state memory may comprise one or more of various types of memory devices such as flash integrated circuits, Chalcogenide RAM (C-RAM), Phase Change Memory (PC-RAM or PRAM), Programmable Metallization Cell RAM (PMC-RAM or PMCm), Ovonic Unified Memory (OUM), Resistance RAM (RRAM), NAND memory (e.g., Single-Level Cell (SLC) memory, Multi-Level Cell (MLC) memory, or any combination thereof), NOR memory, EEPROM, Ferroelectric Memory (FeRAM), Magnetoresistive RAM (MRAM), other discrete NVM chips, or any combination thereof.
As shown in
Solid state memory 128 also stores metadata 20 which includes information related to operation of solid state memory 128 such as information about data stored in solid state memory 128 or information obtained during operation of solid state memory 128. Metadata 20 is further described below with reference to
For data to be stored in solid state memory 128, SSD controller 122 receives data from host interface 126 and may buffer the data in volatile memory 140 or in a volatile memory of SSD controller 122. In one implementation, the data is then encoded into charge values for charging cells (not shown) of solid state memory 128 to store the data.
In response to a read command for data stored in solid state memory 128, SSD controller 122 in one implementation reads current values for cells in solid state memory 128 and decodes the current values into data that can be transferred to host 101. Such data may be buffered by SSD controller 122 before transferring the data to host 101 via host interface 126.
In the embodiment of
As shown in
The priority level indicates a priority for the data. Such a priority level can be collected by SSD controller 122 from hinting provided by host 101 as discussed above. In the example of
The frequency in metadata 20 indicates how often the associated data is accessed for reading and writing, with a frequency of 1 indicating that the data is accessed frequently, a frequency of 2 indicating a medium access frequency, and a frequency of 3 indicating that the data is accessed infrequently. SSD controller 122 may learn the frequency metadata by tracking how often the associated data is accessed. In this regard, the frequency metadata can be learned for data stored in solid state memory 128, disk 150, SMR zones, CMR zones, or for all of these NVM media types.
The related LBAs can include LBA ranges that are temporally related or otherwise related to the associated data. For example, SSD controller 122 may learn or determine that certain LBA ranges are usually accessed shortly before or shortly after receiving a command for the associated data. In another example, the related LBAs may correspond to other data used in the same file as the associated data.
SSD controller 122 also generates a read/write ratio which provides the ratio of times that the associated data is read to the times that the associated data is written. In other embodiments, metadata 20 may also include a read count or read frequency and/or a write count or a write frequency.
The last access time metadata in metadata 20 indicates the last time that the associated data was read or written. SSD controller 122 may keep track of these access times for data stored in solid state memory 128, disk 150, or for both types of NVM media.
In the example of
The related event indicator of metadata 20 can indicate a temporal relation to an event of DSD 106. For example, a related event indicator of 1 for the associated data of LBAs 0 to 100 can indicate that this data is accessed within a certain amount of time from powering DSD 106 on or off.
The media indicator of metadata 20 indicates whether the associated data is stored in solid state memory 128, disk 150, or in both NVM media types. In the example of
The fragmentation level of metadata 20 can indicate how fragmented the data is in its storage in solid state memory 128. For example, a fragmentation level of 1 for the associated data of LBAs 0 to 100 can indicate that this data is physically located in different areas of solid state memory 128.
As discussed in more detail below with reference to
The frequency of metadata 20 can be used by HD controller 120 to determine a location for storing the associated data on disk 150. In the example of
The related LBAs from metadata 20 can be used to determine a location for storing data on disk 150 by storing the data in an available area of disk 150 that is physically near the related data associated with the related LBAs. As discussed above, the related data may be related in temporal proximity to accessing the data or may be otherwise related to the data being stored such as being part of the same file.
The read/write ratio can be used by HD controller 120 to determine whether to write data in a SMR zone of overlapping tracks or in a CMR zone of non-overlapping tracks. As noted above, data is written in overlapping tracks in SMR zones to achieve a higher number of tracks on disk 150. The overlap in tracks, however, means that new writes to a previously overlapped track affects data written in the overlapping track. For this reason, tracks are usually sequentially written in groups of tracks or zones of tracks to protect previously written data.
In the example of
The last access time metadata in metadata 20 can be used by HD controller 120 to store data that has been accessed for reading or writing within a recent time period in areas of disk 150 with a higher data transfer rate. Since more recently accessed data may be more likely to be accessed again soon, locating the more recently accessed data in locations on disk 150 with a higher data transfer rate can often improve a performance time in accessing data.
HD controller 120 may also use a sequential indicator of metadata 20 to determine whether to store data in an SMR zone or a CMR zone on disk 150. If data is often sequentially accessed for reading or writing, HD controller 120 may store the data in an SMR zone on disk 150. The sequential indicator may also be used to delay writing a first portion of sequentially accessed data if a second portion of the sequentially accessed data has not yet been received. Such a delay can allow for performance of other isolated commands on disk 150 before receiving a command to write the second portion of the sequential data has been received. In this way, an overall performance of commands can be improved by handling the isolated commands before efficiently writing both portions of the sequential data as one write.
In the example of
As noted above, the media indicator of metadata 20 can affect a track how data is written to disk 150. In this regard, if the media indicator indicates that the data is already stored in solid state memory 128, HD controller 120 may not be as concerned with incurring errors when reading or writing the data to disk 150 since a back-up copy exists in solid state memory 128.
In the example of
In another example, evaluation of the media indicator can result in setting a more lenient threshold for writing data during a particular environmental condition. In the example of
HD controller may use the fragmentation level of metadata 20 to determine whether to store data on disk 150 in an SMR zone or in a CMR zone. In the example of
In
As shown in
The LBA range in translation table 22 is associated with data addressed by the LBAs in the range. The starting PBA indicates a physical location on disk 150 where data for the LBA range begins. The extent length indicates a number of PBAs from the starting PBA where the associated data for the LBA range is stored. The last access time indicates a time when the associated data for the LBA range was last read or written on disk 150. In other implementations, the last access time may only refer to a last time that the associated data was written on disk 150.
HD controller 120 maintains translation table 22 in volatile memory 140 to keep track of the changes made to the data stored on disk 150. As noted above, translation table 22 may also be stored, or alternatively stored, in solid state memory 128 or disk 150.
As discussed in more detail below with reference to
As shown in
If the metadata from translation table 22 indicates that particular data has been accessed for reading or writing from disk 150 within a recent time period, SSD controller 122 may store the data in solid state memory 128 since it may be more likely to be accessed again soon.
SSD controller 122 may also evaluate the last access times for multiple LBA ranges to determine whether particular data is often sequentially accessed. Such metadata can be used by controller 122, for example, to determine not to store data that is sequentially accessed in solid state memory 128 if the sequentially accessed data is already stored in sequential physical locations in disk 150 since there may not be much improvement in performance by relocating such data to solid state memory 128.
In block 402, metadata is obtained by a controller for the second NVM media type in relation to operation of the second NVM media type. In one implementation, SSD controller 122 obtains metadata 20 in operation of solid state memory 128. In another implementation, HD controller 120 obtains the metadata of translation table 22 in operation of disk 150.
In block 404, a controller for the second NVM media type receives a request for metadata from the controller for the first NVM media type. In some embodiments, the request may take the form of a notification of a certain action being performed by the controller of the first NVM media type. For example, HD controller 120 may notify SSD controller 122 that it is performing a write command for data having a certain LBA range. This would then be treated by SSD controller 122 as a request for metadata associated with the LBA range. In another example, HD controller 120 may notify SSD controller 122 that it is performing a garbage collection process for a particular LBA range on disk 150.
In some implementations, the controller for the first NVM media type may specify certain types of metadata such as a priority level and a frequency. In other implementations, the controller for the first NVM media type may only provide an address or addresses for the data to request any associated metadata maintained by the controller of the second NVM media type.
In block 406, the controller for the second NVM media type identifies the metadata for data corresponding to the request for metadata. This can include identifying the address or addresses (e.g., an LBA or LBA range) associated with the requested metadata. In the case where SSD controller 122 is the controller for the second NVM media type, SSD controller 122 may compare the address or addresses identified with the LBA range entries in metadata 20. In the case where HD controller 120 is the controller for the second NVM media type, HD controller 120 may compare the address or addresses identified with the LBA range entries in translation table 22.
In block 408, the controller for the second NVM media type sends the metadata identified in block 406 to the controller for the first NVM media type. As discussed below with reference to the data management process of
In some embodiments, the sharing of metadata between controllers can be bidirectional. In other words, in some instances HD controller 120 may provide metadata to SSD controller 122, and in other instances SSD controller 122 may provide metadata to HD controller 120. In other embodiments, the direction of providing metadata may occur in only one direction, such as always from SSD controller 122 to HD controller 120.
In block 504, the controller for the second NVM media type identifies metadata for data to be stored in the first NVM media type. This can result, for example, from the controller for the second NVM media type receiving a command from host 101 to write particular data in the first NVM media type or a data migration process to store data currently stored in the second NVM media type in the first NVM media type. As with block 406 of
In block 506, the controller for the second NVM media type sends the metadata identified in block 504 to the controller for the first NVM media type. In addition, the controller for the second NVM media type in block 508 sends the data or a command for the data to be stored to the controller for the first NVM media type. As discussed below with reference to the data management process of
As with the metadata sharing process of
In addition, the process of
In block 602, circuitry 108 obtains metadata related to the operation of the second NVM media type. The metadata obtained in block 602 may have been in response to a request for metadata as in the requested metadata sharing process of
In block 604, circuitry 108 evaluates the metadata obtained in block 602. In one implementation, HD controller 120 may evaluate metadata received from SSD controller 122 including a priority level, a frequency, related LBAs, a read/write ratio, a last access time, a sequential indicator, a related event indicator, and a fragmentation level. In another implementation, SSD controller 122 may evaluate metadata received from HD controller 120 including whether an LBA range for the associated data exists in translation table 22, an extent length for an LBA range, the time when data for an LBA range was last accessed, or LBA ranges in translation table 22 adjacent to a particular LBA range.
In yet another implementation, HD controller 120 may evaluate metadata associated with data stored in either a CMR or SMR zone to manage data in the other type of zone. In such an implementation, HD controller 120 may evaluate metadata from translation table 22 to determine if, for example, less recently accessed data should be moved from a CMR zone to an SMR zone, whether data that is not often sequentially accessed should be moved from a CMR zone to an SMR zone, or whether to move data that is more fragmented from an SMR zone to a CMR zone.
In block 606, circuitry 108 manages data storage in the first NVM media type based on the evaluation of metadata in block 604. In one example, HD controller 120 may determine to locate the data to be written in a particular location on disk 150 having a higher data transfer rate (e.g., near the outer diameter of disk 150) if the priority level from metadata 20 is high or the frequency is high so that such data can be accessed quickly. In another example, HD controller 120 may locate data with a related event indicator from metadata 20 indicating that the associated data is used soon after a startup of DSD 106 in an area of disk 150 with a high data transfer rate so that such data can be quickly accessed after startup. HD controller 120 may also store data associated with a recent last access time from metadata 20 in a location on disk 150 with a higher data transfer rate, since this data may be more likely to be soon accessed again. HD controller 120 may also locate data with related LBAs in metadata 20 physically near the related LBAs on disk 150 so as to conserve motion of head 136.
In another example, HD controller 120 may locate data associated with a high read/write ratio from metadata 20 in an SMR zone of overlapping tracks since such data is read more frequently than it is written. On the other hand, data that has a lower read/write ratio may be stored in a CMR zone of non-overlapping tracks since such data may be rewritten more often. In addition, data indicated by evaluated metadata as having a low fragmentation level may also be stored in an SMR zone to reduce the amount of garbage collection needed in the SMR zone.
In other examples, HD controller 120 may use a media indicator from metadata 20 to determine how to write data on disk 150. In this regard, if the media indicator indicates that the data is already stored in solid state memory 128, HD controller 120 may not be as concerned with incurring errors when reading or writing the data to disk 150 since a back-up copy exists in solid state memory 128.
Such examples of using a media indicator include setting a more lenient threshold for writing data during a particular environmental condition. In one example, if data to be written to disk 150 is already stored in solid state memory 128, HD controller 120 may lower a vibration threshold for performing writes so that the data is written to disk 150 even when an input from sensor 142 would otherwise prevent data to be written to disk 150. In another example, if data is already stored in solid state memory 128, HD controller 120 may write the data with a higher track density even though data written at the higher track density may be more susceptible to read and write errors than data written with a lower track density.
In another example where metadata from SSD controller 122 can affect how HD controller 120 writes data to disk 150, a sequential indicator from metadata 20 may indicate that data to be written to disk 150 is usually sequentially accessed for reading or writing. If HD controller 120 only receives a command to write a first portion of this data, HD controller 120 may wait a certain amount of time before writing the first portion to see if a command for writing the remaining portion is received. This may allow HD controller 120 to temporarily service other commands so that the writing of the first portion and the remaining portion can be performed more efficiently as a single sequential write on disk 150.
For its part, SSD controller 122 can manage data storage in solid state memory 128 based on metadata related to operation of disk 150. In one example, SSD controller may evaluate metadata received from HD controller 120 including an extent length for an LBA range to determine an amount of fragmentation for data stored in disk 150. SSD controller 122 may determine to store copies of data from disk 150 that are more fragmented to improve a performance of DSD 106 in accessing such fragmented data since accessing such fragmented data on disk 150 may incur a greater performance penalty.
In another example, SSD controller 122 may use the time when data for an LBA range was last accessed for reading or writing to determine whether to store the data in solid state memory 128. If the data was recently written to disk 150, SSD controller 122 can determine that such data is more likely to be accessed in the near future so that storage of the data in solid state memory 128 would improve a performance of DSD 106.
In yet another example, SSD controller 122 may use LBA ranges in translation table 22 adjacent to a particular LBA range to determine whether particular data is fragmented or if metadata 20 should be updated to reflect that certain data is related. The LBA ranges of translation table 22 may also provide SSD controller 122 with an indication of whether certain data is sequential. If so, SSD controller 122 may update metadata 20. SSD controller 122 may also determine that a copy of such sequential data should not be stored in solid state memory 128 since accessing such sequential data from solid state memory 128 would not provide enough of a performance improvement over accessing the data from disk 150.
By managing data stored in a first NVM media type based on the evaluation of metadata obtained relating to operation of a second NVM media type, it is ordinarily possible to better manage data stored in the first NVM media type using the metadata.
Those of ordinary skill in the art will appreciate that the various illustrative logical blocks, modules, and processes described in connection with the examples disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. Furthermore, the foregoing processes can be embodied on a computer readable medium which causes a processor or computer to perform or execute certain functions.
To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, and modules have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Those of ordinary skill in the art may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.
The various illustrative logical blocks, units, modules, and controllers described in connection with the examples disclosed herein may be implemented or performed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
The activities of a method or process described in connection with the examples disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The steps of the method or algorithm may also be performed in an alternate order from those provided in the examples. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable media, an optical media, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an Application Specific Integrated Circuit (ASIC).
The foregoing description of the disclosed example embodiments is provided to enable any person of ordinary skill in the art to make or use the embodiments in the present disclosure. Various modifications to these examples will be readily apparent to those of ordinary skill in the art, and the principles disclosed herein may be applied to other examples without departing from the scope of the present disclosure. The described embodiments are to be considered in all respects only as illustrative and not restrictive and the scope of the disclosure is, therefore, indicated by the following claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.
Horn, Robert L., Fallone, Robert M., Steffen, David Norman
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