An echo canceller (30) cancels an echo signal produced on a transmission path (14) on the basis of a received signal received through a reception path (15). The echo canceller comprises an adaptive filter (31) for producing a pseudo-echo signal from the received signal in accordance with tap gains. A producing section (19, 20) produces an error signal representative of an error level between the echo signal and the pseudo-echo signal. A supplying section (21, 32) supplies the adaptive filter with selected tap gains stored in a memory section (18) when the error level is less than a predetermined threshold level. The adaptive filter renews the selected tap gains into renewal tap gains in accordance with the received signal and the error signal to store the renewal tap gains of the selected tap gains in the memory section.

Patent
   5796725
Priority
Aug 31 1994
Filed
Aug 30 1995
Issued
Aug 18 1998
Expiry
Aug 30 2015
Assg.orig
Entity
Large
66
10
EXPIRED
1. An echo canceller for cancelling an echo signal produced on a transmission path on the basis of a received signal which is received through a reception path, said echo canceller comprising:
first producing means for producing an error signal representative of an error level between said echo signal and a pseudo-echo signal;
second producing means, supplied with said error signal, for producing selected tap gains of first through N-th tap gains as output tap gains when said error level is less than a predetermined threshold level, where N represents a positive integer which is not less than one and, said second producing means producing said first through N-th tap gains as said output tap gains when said error level is not less than said predetermined threshold level; and
adaptive filter means for filtering said received signal into a filtered signal in accordance with said output tap gains to produce said filtered signal as said pseudo-echo signal, said adaptive filter means renewing said output tap gains into renewal tap gains in accordance with said received signal and said error signal.
2. An echo canceller as claimed in claim 1, wherein said second producing means comprises:
judging means for judging whether or not said error level is less than said predetermined threshold level to produce a first control signal when said error level is not less than said predetermined threshold level, said judging means producing a second control signal when said error level is less than said predetermined threshold level;
memory means for memorizing said first through said N-th tap gains as memorized tap gains; and
tap gain supplying means for supplying the selected tap gains of said memorized tap gains as said output tap gains in response to said second control signal, said tap gain supplying each of means supplying said memorized tap gains as said output tap gains in response to said first control signal.
3. An echo canceller as claimed in claim 2, wherein said adaptive filter means stores each of said renewal tap gains in said memory means when the output tap gains include each of said memorized tap gains and wherein, said adaptive filter means selectively stores selected renewal tap gains in said memory means when the output tap gains include selected tap gains of said memorized tap gains.
4. An echo canceller as claimed in claim 2, wherein said tap gain supplying means compares each of said memorized tap gains with a predetermined value in response to said second control signal to produce the selected tap gains of the memorized tap gains as said output tap gains.
5. An echo canceller as claimed in claim 4, wherein said tap gain supplying means supplies said adaptive filter means with a k-th tap gain as one of said output tap gains when said k-th tap gain is not less than said predetermined value, where k is a variable between one and N (both inclusive).
6. An echo canceller as claimed in claim 5, wherein said tap gain supplying means further supplies said adaptive filter means with a k-th primary flag signal when said k-th tap gain is not less than said predetermined value, said tap gain supplying means supplying said adaptive filter means with a k-th subsidiary flag signal when said k-th tap gain is less than said predetermined value.
7. An echo canceller as claimed in claim 6, wherein said adaptive filter means uses said k-th tap gain in response to said k-th primary flag signal on producing said pseudo-echo signal.
8. An echo canceller as claimed in claim 6, wherein said adaptive filter means makes said k-th tap gain be an unusable tap gain in response to said k-th subsidiary flag signal.
9. An echo canceller as claimed in any one of claims 1 to 8, wherein said adaptive filter means uses a control coefficient to renew the output tap gains into renewal tap gains in accordance with said received signal and said error signal.
10. An echo canceller as claimed in claim 9, wherein:
said adaptive filter means has first and second parameters;
said adaptive filter means selecting said first parameter as said control coefficient in response to said first control signal, said adaptive filter means selecting said second parameter as said control coefficient in response to said second control signal.
11. An echo canceller as claimed in claim 10, wherein said first parameter is greater than said second parameter.
12. An echo canceller as claimed in claim 9, wherein said first producing means comprises:
subtracter means for subtracting said pseudo-echo signal from said echo signal to produce a difference signal representative of a difference level between said echo signal and said pseudo-echo signal; and
error level calculating means for calculating an error level in accordance with said difference signal to produce said error signal.
13. An echo canceller as claimed in claim 10, wherein said first producing means comprises:
subtracter means for subtracting said pseudo-echo signal from said echo signal to produce a difference signal representative of a difference level between said echo signal and said pseudo-echo signal; and
error level calculating means for calculating an error level in accordance with said difference signal to produce said error signal.
14. An echo canceller as claimed in claim 11, wherein said first producing means comprises:
subtracter means for subtracting said pseudo-echo signal from said echo signal to produce a difference signal representative of a difference level between said echo signal and said pseudo-echo signal; and
error level calculating means for calculating an error level in accordance with said difference signal to produce said error signal.
15. An echo canceller as claimed in any one of claims 1 to 8, wherein said first producing means comprises:
subtracter means for subtracting said pseudo-echo signal from said echo signal to produce a difference signal representative of a difference level between said echo signal and said pseudo-echo signal; and
error level calculating means for calculating an error level in accordance with said difference signal to produce said error signal.

This invention relates to an echo canceller for cancelling an echo signal produced on a transmission path on the basis of a received signal which is received through a reception path.

In general, an echo signal may be produced on a transmission path on the basis of a received signal which is received through a reception path in case where the reception path is connected to the transmission path through a hybrid circuit. In order to cancel the echo signal, an echo canceller is connected to the hybrid circuit between the reception path and the transmission path.

A conventional echo canceller comprises an adaptive filter which may be, for example, a transversal filter. The adaptive filter is supplied with the received signal through the reception path to filter the received signal into a filtered signal in accordance with first through N-th controllable tap gains, where N represents a positive integer which is not less than one. The filtered signal may be called a pseudo-echo signal.

The conventional echo canceller further comprises a producing section supplied with the echo signal through the transmission path. The producing section is further supplied with the pseudo-echo signal. The producing section produces an error signal representative of an error level between the echo signal and the pseudo-echo signal. The adaptive filter renews the first through the N-th controllable tap gains into first through N-th renewal controllable tap gains in accordance with the received signal and the error signal as known in the art. Thereafter, the adaptive filter filters the received signal into the pseudo-echo signal in accordance with the first through the N-th renewal controllable tap gains.

As described above, the echo signal is received through the transmission path at the echo canceller. When taking a delay time of the transmission path in consideration, it is necessary to make the positive integer N be very large in order to cancel the echo signal as desired. Therefore, it is particularly difficult to cancel the echo signal at a high speed because the conventional echo canceller must control the first through the N-th controllable tap gains.

It is therefore an object of this invention to provide an echo canceller capable of cancelling an echo signal at a high speed.

It is another object of this invention to provide an echo canceller capable of controlling tap gains with a simple structure.

Other objects of this invention will become clear as the description proceeds.

In describing this invention, it is possible to understand that an echo canceller for cancelling an echo signal produced on a transmission path on the basis of a received signal which is received through a reception path.

According to this invention, the echo canceller comprises first producing means for producing an error signal representative of an error level between the echo signal and a pseudo-echo signal, second producing means supplied with the error signal for producing selected ones of first through N-th tap gains as output tap gains when the error level is less than a predetermined threshold level, where N represents a positive integer which is not less than one, the second producing means producing the first through the N-th tap gains as the output tap gains when the error level is not less than the predetermined threshold level, and adaptive filter means for filtering the received signal into a filtered signal in accordance with the output tap gains to produce the filtered signal as the pseudo-echo signal, the adaptive filter means renewing the output tap gains into renewal tap gains in accordance with the received signal and the error signal.

FIG. 1 is a block diagram of a conventional echo canceller; and

FIG. 2 is a block diagram of an echo canceller according to a preferred embodiment of this invention.

Referring to FIG. 1, description will first be made with regards to a conventional echo canceller 10 to better understand of this invention. The echo canceller 10 has input and output terminals 11 and 12. The input terminal 11 is connected to a hybrid circuit 13 through a transmission path 14. The hybrid circuit 13 is connected to a reception path 15 which is connected to a reception terminal 16. Namely, the echo canceller 10 is connected to the hybrid circuit 13 between the transmission path 14 and the reception path 15. The hybrid circuit 13 is further connected to a terminal device such as a telephone device (not shown). A transmitted signal is supplied to the reception terminal 16 as a received signal to be delivered to the terminal device through the hybrid circuit 13. The transmitted signal may be, for example, a digital signal which is produced by sampling an analog signal at a sampling frequency f. The analog signal may be a speech signal.

An echo signal is inevitably produced on the transmission path 14 on the basis of the received signal as known in the art. The echo signal is supplied to the input terminal 11. The echo canceller 10 is operable to cancel the echo signal.

The echo canceller 10 comprises an adaptive filter 17 which may be, for example, a transversal filter. The echo canceller 10 further comprises a tap gain memory 18 for memorizing first through N-th tap gains as first through N-th memorized tap gains, where N represents a positive integer which is not less than one. The tap gain memory 18 supplies the adaptive filter 17 with the first through the N-th memorized tap gains as first through N-th output tap gains. In accordance with the first through the N-th output tap gains, the adaptive filter 17 filters the received signal into a filtered signal to produce the filtered signal as a pseudo-echo signal as known in the art. More particularly, the adaptive filter 17 produces the pseudo-echo signal in accordance with Equation given by: ##EQU1## where HX represents the pseudo-echo signal. HRi represents an i-th output tap gain (i is a variable between one and N, both inclusive). Xj represents a delayed signal which is produced by delaying the received signal j times at a delay time (1/f) (j represents a variable between zero and (N-1), both inclusive).

The pseudo-echo signal is supplied to a subtracter 19. The subtracter 19 is supplied with the echo signal through the input terminal 11. The subtracter 19 subtracts the pseudo-echo signal from the echo signal to produce a difference signal representative of a difference level between the echo signal and the pseudo-echo signal. The difference signal is supplied to a square error calculating circuit 20.

The square error calculating circuit 20 calculates a square error in accordance with the difference signal to produce an error signal representative of an error level between the echo signal and the pseudo-echo signal. The error signal is delivered to the adaptive filter 17 and a judging circuit 21.

The judging circuit 21 judges whether or not the error level is less than a predetermined threshold level. When the error level is not less than the predetermined threshold level, the judging circuit 21 supplies the adaptive filter 17 with a first control signal which may be represented by binary one. When the error level is less than the predetermined threshold level, the judging circuit 21 supplies the adaptive filter 17 with a second control signal which may be representative of zero.

Responsive to any one of the first and the second control signals, the adaptive filter 17 produces first through N-th renewal tap gains in accordance with the received signal and the error signal. More specifically, the adaptive filter 17 renews the first through the N-th output tap gains into the first through the N-th renewal tap gains on the basis of Equation given by: ##EQU2## where HWi represents an i-th renewal tap gain. E2 represents the error signal. μ represents a control coefficient by which convergence of the echo signal is determined.

The control coefficient μ is one of a first and second parameter. The first parameter is greater than the second parameter. The adaptive filter 17 selects one of first and second parameters as the control coefficient. More particularly, the adaptive filter 17 selects the first parameter as the control coefficient in response to the first control signal. Responsive to the second control signal, the adaptive filter 17 selects the second parameter as the control coefficient.

After the adaptive filter 17 calculates the first through the N-th renewal tap gains as described above, the adaptive filter 17 stores the first through the N-th renewal tap gains as the first through the N-th memorized tap gains in the tap gain memory 18.

By repeating renewal of the tap gains in a manner similar to the above-mentioned manner, the pseudo-echo signal is equivalent to the echo signal. As a result, the difference signal has a minimum difference level. Namely, the echo signal is cancelled on the transmission path.

However, the positive integer N must be very large in the echo canceller 10 in order to cancel the echo signal when taking the delay time of the transmission path into consideration. When positive integer N is very large, the adaptive filter 17 carries out very much calculation on renewing the tap gains. Therefore, it is difficult to cancel the echo signal at a high speed in the echo canceller 10.

Referring to FIG. 2, description will proceed to an echo canceller according to a preferred embodiment of this invention. The illustrated echo canceller is different in structure from the echo canceller 10 illustrated in FIG. 1 and is therefore designated by new reference numerals as appropriate. The echo canceller 30 comprises similar parts which are designated by like reference numerals and are operable with likewise named and denoted signals. In the echo canceller 30, the adaptive filter is different in function from the adaptive filter 17 illustrated in FIG. 1 and is therefore designated afresh by a reference numeral 31. The echo canceller 30 further comprises a tap gain supplying circuit 32 which will later be described.

At an initial state, the tap gain supplying circuit 32 is supplied with the first through the N-th memorized tap gains from the tap gain memory 18 to deliver the first through the N-th memorized tap gains as output tap gains to the adaptive filter 31.

As described in conjunction with FIG. 1, the adaptive filter 31 produces the pseudo-echo signal by Equation (1) in accordance with the output tap gains. The subtracter 19 subtracts the pseudo-echo signal from the echo signal to produce the difference signal representative of the difference level. The square error calculating circuit 20 produces the error signal representative of the error level.

The judging circuit 21 selectively produces the first and the second control signals as described in conjunction with FIG. 1. In FIG. 2, the judging circuit 21 is connected to the adaptive filter 31 and the tap gain supplying circuit 32. Responsive to any one of the first and the second control signals, the adaptive filter 31 renews the first through the N-th output tap gains into the first through the N-th renewal tap gains in accordance with the received signal and the error signal as described in conjunction with FIG. 1. Namely, the adaptive filter 31 produces the first through the N-th renewal tap gains by Equation (2). The adaptive filter 31 stores the first through the N-th renewal tap gains as the first through the N-th memorized tap gains in the tap gain memory 18.

As described above, the tap gain supplying circuit 32 is connected to the judging circuit 21. The tap gain supplying circuit 32 is supplied with the first through the N-th memorized tap gains from the tap gain memory 18. Supplied with the first control signal from the judging circuit 21, the tap gain supplying circuit 32 supplies the first through the N-th memorized tap gains as the first through the N-th output tap gains to the adaptive filter 31.

Supplied with the second control signal from the judging circuit 21, the tap gain supplying circuit 32 compares each of the first through the N-th memorized tap gains with a predetermined value to selectively supply the adaptive filter 31 with selected tap gains of the first through the N-th memorized tap gains as output tap gains. More particularly, the tap gain supplying circuit 32 supplies the first memorized tap gain as the first output tap gain to the adaptive filter 31 when the first memorized tap gain is greater than the predetermined value. When the first memorized tap gain is not greater than the predetermined value, the tap gain supplying circuit 32 does not allow the first memorized tap gain to pass therethrough. When the first memorized tap gain is not greater than the predetermined value, the tap gain supplying circuit 32 may supply zero value as the first output tap gain to the adaptive filter 31.

Similarly, the tap gain supplying circuit 32 supplies a K-th memorized tap gain as a K-th output tap gain to the adaptive filter 31 when the K-th memorized tap gain is greater than the predetermined value, where K is variable between one and N, both inclusive. When the K-th memorized tap gain is not greater than the predetermined value, the tap gain supplying circuit 32 does not allow the K-th memorized tap gain to pass therethrough. When the the K-th memorized tap gain is not greater than the predetermined value, the tap gain supplying circuit 32 may supply zero value as the K-th output tap gain to the adaptive filter 31.

In addition, the tap gain supplying circuit 32 selectively supplies one of primary and subsidiary flag signals in accordance with a result of comparison of each of the first through the N-th memorized tap gains. More specifically, the tap gain supplying circuit 32 supplies the adaptive filter 31 with a k-th primary flag signal, which may be represented by one when the K-th memorized tap gain is greater than the predetermined value. When the K-th memorized tap gain is not greater than the predetermined value, the tap gain supplying circuit 32 supplies the adaptive filter 31 with a k-th subsidiary flag signal, which may be represented by zero.

When the adaptive filter 31 is supplied with the k-th primary flag signal, the adaptive filter 31 uses the k-th output tap gain on producing the pseudo-echo signal. Otherwise, the adaptive filter 31 makes the k-th output tap gain be an unusable tap gain on producing the pseudo-echo signal when the adaptive filter 31 is supplied with the k-th subsidiary flag signal.

As readily understood from the above description, the adaptive filter 31 filters the received signal in accordance with the selected tap gains of the first through the N-th memorized tap gains to produce the pseudo-echo signal when the error level is less than the predetermined threshold level.

Furthermore, the adaptive filter 31 renews the k-th output tap gain into a k-th renewal tap gain in accordance with Equation (2) when the adaptive filter 31 is supplied with the k-th primary flag signal. When the adaptive filter 31 is supplied with the k-th subsidiary flag signal, the adaptive filter 31 does not carry out the renewal of the k-th output tap gain. Namely, the renewal is not carried out at the k-th output tap gain in the adaptive filter 31 when the adaptive filter 31 is supplied with the k-th subsidiary flag signal.

As readily understood from the above description, the adaptive filter 31 renews the selected gains of the first through the N-th memorized tap gains into the renewal tap gains by Equation (2) in response any one of the first and second control signals. The adaptive filter 31 stores the renewal tap gains of selected ones of the first through the N-th memorized tap gains in the tap gain memory 18.

More particularly, the adaptive filter has the control coefficient which comprises first and second parameters. The first parameter is greater than the second parameter. On carrying out renewal of the selected ones of the first through the N-th memorized tap gains by using Equation (2), the adaptive filter 31 selects the first parameter as the control coefficient in response to the first control signal. Otherwise, the adaptive filter 31 selects the second parameter as the control coefficient in response to the second control signal.

It will be assumed that the number of tap gains less than the predetermined value is five when the tap gain supplying circuit 32 is supplied with the second control signal. In Equation (1), the number of multiplications is equal to (N-5). Similarly, the number of multiplications is equal to (N-5) in Equation (2). By repeating renewal of the memorized tap gains, each of the memorized tap gains gradually becomes small. Therefore, the number of the memorized tap gains less than the predetermined value gradually increases. Inasmuch as the number of calculations has a maximum number of 2(N-5) at both steps of production of the pseudo-echo signal and renewal of the memorized tap gains, it is possible to reduce the number of calculations at the step of production of the pseudo-echo signal and the step of renewal of the tap gains. Namely, it is possible to cancel the echo signal at a high speed while reducing the number of calculations.

As readily understood from the above description, the subtracter 19 and the square error calculating circuit 20 are collectively operable as a first producing section. The judging circuit 21, the tap gain memory 18, and the tap gain supplying circuit are collectively operable as a second producing section.

Muraoka, Shinya

Patent Priority Assignee Title
10084547, Jan 08 2016 GOOGLE LLC In-band optical interference mitigation for direct-detection optical communication systems
6201796, May 14 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Startup protocol for high throughput communications systems
6212225, May 14 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Startup protocol for high throughput communications systems
6236645, Mar 09 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Apparatus for, and method of, reducing noise in a communications system
6289047, Aug 28 1998 AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD Dynamic regulation of power consumption of a high-speed communication system
6304598, Aug 28 1998 AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD Apparatus for, and method of, reducing power dissipation in a communications system
6459746, Nov 09 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Multi-pair gigabit ethernet transceiver
6463041, Mar 09 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Apparatus for, and method of, reducing noise in a communications system
6477199, Aug 28 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Dynamic regulation of power consumption of a high-speed communication system
6477200, Nov 09 1998 AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD Multi-pair gigabit ethernet transceiver
6516050, Feb 25 1999 Mitsubishi Denki Kabushiki Kaisha Double-talk detecting apparatus, echo canceller using the double-talk detecting apparatus and echo suppressor using the double-talk detecting apparatus
6738419, Aug 28 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Dynamic regulation of power consumption of a high-speed communication system
6775529, Jul 31 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Active resistive summer for a transformer hybrid
6778602, Nov 09 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Multi-pair gigabit ethernet transceiver
6792038, Feb 12 2001 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Startup protocol for high throughput communications systems
6807228, Sep 03 1999 AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD Dynamic regulation of power consumption of a high-speed communication system
6819709, May 14 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Startup protocol for high throughput communications system
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6898238, Aug 28 1998 AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD Apparatus for, and method of, reducing power dissipation in a communications system
7020099, Mar 09 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Apparatus for, and method of, reducing noise in a communications system
7095348, May 23 2000 Marvell International Ltd. Communication driver
7113121, May 23 2000 Marvell International Ltd. Communication driver
7194037, May 23 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Active replica transformer hybrid
7263134, Nov 09 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Ethernet transceiver with single-state decision feedback equalizer
7280060, May 23 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Communication driver
7298173, Oct 26 2004 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Slew rate control circuit for small computer system interface (SCSI) differential driver
7312662, Aug 09 2005 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Cascode gain boosting system and method for a transmitter
7312739, May 23 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Communication driver
7327995, Jul 31 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Active resistance summer for a transformer hybrid
7369608, Aug 28 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Dynamic regulation of power consumption of a high-speed communication system
7433665, Jul 31 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Apparatus and method for converting single-ended signals to a differential signal, and transceiver employing same
7443910, Aug 28 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED PHY control module for a multi-pair gigabit transceiver
7466971, Jul 31 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Active resistive summer for a transformer hybrid
7536162, Jul 31 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Active resistive summer for a transformer hybrid
7570701, Nov 09 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Multi-pair gigabit ethernet transceiver
7577892, Aug 25 2005 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD High speed iterative decoder
7579873, Oct 26 2004 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Slew rate control circuit for small computer system interface (SCSI) differential driver
7606547, Jul 31 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Active resistance summer for a transformer hybrid
7649483, May 23 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Communication driver
7672368, Aug 28 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED PHY control module for a multi-pair gigabit transceiver
7719314, Oct 26 2004 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Slew rate control circuit for small computer system interface (SCSI) differential driver
7729429, May 23 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Active replica transformer hybrid
7733952, Nov 09 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Multi-pair gigabit Ethernet transceiver having adaptive disabling of circuit elements
7737788, Aug 09 2005 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Cascode gain boosting system and method for a transmitter
7761076, Jul 31 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Apparatus and method for converting single-ended signals to a differential signal, and transceiver employing same
7769101, Aug 17 2004 AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD Multi-pair gigabit ethernet transceiver
7778313, Aug 28 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED PHY control module for a multi-pair gigabit transceiver
7801240, Nov 09 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Multi-pair gigabit ethernet transceiver
7801241, Nov 09 1998 AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD Multi-pair gigabit Ethernet transceiver
7804904, May 23 2000 Marvell International Ltd. Active replica transformer hybrid
7844019, Nov 09 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Timing recovery system for a multi-pair gigabit transceiver
7853855, Aug 25 2005 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD High speed iterative decoder
8009073, May 23 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Method and apparatus for generating an analog signal having a pre-determined pattern
8031799, Nov 09 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Multi-pair gigabit ethernet transceiver
8045946, Jul 31 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Active resistive summer for a transformer hybrid
8050645, Jul 31 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Active resistive summer for a transformer hybrid
8077762, Aug 28 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED PHY control module for a multi-pair gigabit transceiver
8179950, May 14 1998 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED Startup protocol for high throughput communications systems
8280037, Sep 09 2009 Oki Electric Industry Co., Ltd. Echo canceller having its effective filter taps adaptively controlled with echo cancellation amount monitored
8451885, Nov 09 1998 AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD Multi-pair gigabit ethernet transceiver having adaptive disabling of circuit elements
8503961, Jul 31 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Active resistive summer for a transformer hybrid
8744278, Aug 29 2008 Fujitsu Limited Method for electric power supply of optical receiver, digital signal processing circuit, and optical receiver
8880017, Jul 31 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Active resistive summer for a transformer hybrid
9998235, Jan 08 2016 GOOGLE LLC In-band optical interference mitigation for direct-detection optical communication systems
RE40971, Dec 18 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Direct drive programmable high speed power digital-to-analog converter
RE41831, May 23 2000 CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD Class B driver
Patent Priority Assignee Title
3894200,
4823382, Oct 01 1986 NEXTIRAONE, LLC Echo canceller with dynamically positioned adaptive filter taps
4894820, Mar 24 1987 Oki Electric Industry Co., Ltd. Double-talk detection in an echo canceller
5343521, Aug 18 1989 French State, represented by the Minister of the Post, Telecommunications Device for processing echo, particularly acoustic echo in a telephone line
5343522, Feb 05 1992 Nortel Networks Limited Adaptive sparse echo canceller using a sub-rate filter for active tap selection
5351291, Sep 06 1991 INTERNATIONAL BUISNESS MACHINES CORP Adaptive echo cancellation method and device for implementing said method
5396517, Mar 04 1993 ADTRAN Transversal filter useable in echo canceler, decision feedback equalizer applications for minimizing non-linear distortion in signals conveyed over full duplex two-wire communication link
5477534, Jul 30 1993 Kyocera Corporation Acoustic echo canceller
EP446917,
EP604948,
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Aug 30 1995NEC Corporation(assignment on the face of the patent)
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