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The ornamental design for an optoelectronic ic package, as shown and described.
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FIG. 1 is a top perspective view of an optoelectronic IC package of the present invention;
FIG. 2 is a first side view thereof;
FIG. 3 is a second side view thereof;
FIG. 4 is a third side view thereof;
FIG. 5 is a top view thereof; and,
FIG. 6 is a fourth side view thereof.
The ornamental design which is claimed is shown in solid lines in the drawings. Any broken lines in the drawings are for illustrative purposes only and form no part of the claimed design.
Horinouchi, Shogo, Ohyama, Hideki
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Sep 10 2003 | HORINOUCHI, SHOGO | MATSUSHITA ELECTRIC INDUSTRIAL CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 014597 | /0923 | |
Sep 10 2003 | OHYAMA, HIDEKI | MATSUSHITA ELECTRIC INDUSTRIAL CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 014597 | /0923 | |
Oct 10 2003 | Matsushita Electric Industrial Co., Ltd. | (assignment on the face of the patent) | / |
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