Semiconductor device

Abstract

Description

FIG. 1 is a top plan view of a semiconductor device, showing my new design; the opposite side being a mirror image thereof;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a right side elevational view thereof; the opposite side being a mirror image thereof;

FIG. 4 is a rear elevational view thereof; and,

FIG. 5 is an enlarged fragmented rear elevational view thereof, taken along the line 5—5 in FIG. 2.

Claims

The ornamental design for a semiconductor device, as shown and described.