Disclosed is a UGMII system to interface multirate devices including 10 gigabit per second data exchange rates. mode selection is enabled to provide for automatic detection and adaptation to any transmit rate including 10M, 100M, 1G, and 10G. mode selection comprises the negotiation between the UGMII extension sublayers located at the mac and PHY to select between one of several operational modes including: xgmii communication, GMII encapsulation, Clause 22 MDIO register management and Clause 45 MDIO register management. Selection of UGMII and xgmii operating modes are negotiated between the mac and PHY using ordered sets to announce and acknowledgement a mode change. In one embodiment 802.3 Clause 46 defined ordered sets are utilized.
|
0. 56. A rate adaptive interface for use in a network device, the interface comprising:
a physical layer (PHY) device configured to change operational modes;
wherein the PHY device comprises an ordered set generation and detection module, implemented in one or both of circuitry or a processor executing machine readable instructions, that
detects a first ordered set which i) announces an operational mode change to an operational mode selected from xgmii communication and GMII encapsulation, and ii) is communicated to the PHY device in-band from a media access control (mac) device of the network device,
generates a second ordered set which acknowledges the operational mode change,
communicates the second ordered set in-band to the mac device, and
changes to the operational mode.
0. 51. A rate adaptive interface for use in a network device, the interface comprising:
a media access control (mac) device of the network device configured to select an operational mode from xgmii communication and GMII encapsulation;
wherein the mac device comprises an ordered set generation and detection module, implemented in one or both of circuitry or a processor executing machine readable instructions, that generates a first ordered set which announces an operational mode change to the selected operational mode and communicates the first ordered set in-band to a physical layer (PHY) device of the network device;
wherein the mac device changes to the selected operational mode in response to receipt of a second ordered set which acknowledges the first ordered set and is communicated in-band from the PHY device.
5. A rate adaptive interface for use in a network device, the interface comprising:
A mac a media access control (mac) device configured to output data from a first port at a variable first rate and from a second port at a second rate;
a rate adaptation media independent interface module, implemented in one or both of circuitry or a processor executing machine readable instructions, and configured received to (i) receive data from the mac device at the variable first rate and (ii) convert the data at the variable first rate to data at the a second rate;
an encapsulation module configured to receive data at the second rate from the rate adaptation module and convert the data at the second rate to data at a third rate;
a switch configured to interface with the encapsulation module and the mac device to receive data at a rate of 10 Gb/s from either the encapsulation module or from the second port of the mac device and output data at a rate of 10 Gb/s, the switch controlled by a mode selection control signal;
a mode selection module configured to provide the mode selection control signal to the switch to thereby control operation of the switch and
an ordered set generation and detection module, implemented in one or both of circuitry or a processor executing machine readable instructions, and configured to detect ordered sets, wherein the ordered sets (i) determine operational mode changes to all of xgmii communication and GMII encapsulation, (ii) acknowledge the operational mode changes, and (iii) are communicated in-band from the mac device to a physical layer (PHY) device and from the PHY device to the mac device.
14. A method for interfacing a multirate mac media access control (mac) device in a network communication device with a PHY physical layer (PHY) device in a the network communication device, the method comprising:
outputting unprocessed data from the multirate mac device at a variable rate to a rate adaptation media independent interface module or at a first fixed rate to a multiplexer, the media independent interface module implemented in one or both of circuitry or a processor executing machine readable instructions;
processing the data at the rate adaptation media independent interface module to upconvert the data at a variable rate to data at a second first fixed rate;
processing the data at the second fixed rate with an encapsulation module to generate processed data at the first fixed rate;
receiving, at a multiplexer, the unprocessed data from the mac device at the first fixed rate or the processed data at the first fixed rate;
receiving, at the multiplexer, a mode selection signal and responsive to the mode selection signal, outputting from the multiplexer the unprocessed data at the first rate or the processed data at the first rate
detecting, with an ordered set generation and detection module of the media independent interface module, ordered sets, wherein the ordered sets (i) determine operational mode change to all of xgmii communication and GMII encapsulation, (ii) acknowledge the operational mode changes, and (iii) are communicated in-band from the multirate mac device to the PHY device and from the PHY device to the multirate mac device.
1. A rate adaptive interface configured to interface a mac media access control (mac) device of a network device with a PHY physical layer (PHY) device of the network device, the rate adaptive interface comprising:
a rate adaptation media independent interface module in communication with a the mac device implemented in one or both of circuitry or a processor executing machine readable instructions, the rate adaptation media independent interface module configured to:
receive data at a variable rate selected from 10 Mb/s, 100 Mb/s, and 1 Gb/s;,
process the data to a fixed rate of 1 Gb/s;,
output the data at a the fixed rate of 1 Gb/s;
an encapsulation/recovery module configured to receive the data at a rate of 1 Gb/s from the rate adaptation module, and encapsulate the data at a rate of 1 Gb/s to generated data at a rate of 10 Gb/s;
a multiplexer configured to receive the data at a rate of 10 Gb/s from the encapsulation/recovery module or to received data from a mac device at a rate of 10 Gb/s and selectively output data at a rate of 10 Gb/s responsive to a mode selection control signal;
a mode selection module configured to control the multiplexer based on control input from a higher layer device; and
wherein the media independent interface module includes an ordered set generation and detection module in communication with the multiplexer and the mode selection module implemented in one or both of circuitry or a processor executing machine readable instructions, the ordered set generation and detection module configured to detect ordered sets which, wherein the ordered sets (i) announce a operational mode change wherein the ordered set generation and detection module is in communication with the mode selection module changes to all of xgmii communication and GMII encapsulation, (ii) acknowledge the operational mode changes, and (iii) are communicated in-band from the mac device to the PHY device and from the PHY device to the mac device.
2. The system rate adaptive interface of claim 1 21, wherein the encapsulation/recovery module is further configured to recover encapsulated data thereby changing the data rate from a 10 G data rate to a 1 G data rate.
3. The system rate adaptive interface of claim 1 21, wherein the mode selection module adjusts the data rate of operation between 10 Mb/s, 100 Mb/s, or 1 Gb/s.
4. The system rate adaptive interface of claim 1 21, wherein the encapsulation/recovery module is further configured with an input to receive data at a rate of 10 Gb/s and perform recovery thereon to output the data at a rate of 1 Gb/s.
6. The rate adaptive interface of claim 5 31, further comprising an extension sublayer configured to receive data at a rate of 10 Gb/s from the switch, wherein the extension sublayer extends the distance which the data at a rate of 10 Gb/s may be transmitted.
7. The rate adaptive interface of claim 5 31, further comprising an wherein the ordered set generation and detection module (i) is configured to interface with the switch to detect ordered sets which determine a mode change, wherein the ordered set generation and detection module and (ii) is in communication with the mode selection module.
8. The rate adaptive interface of claim 5 31, wherein the encapsulation module is further configured to recover encapsulated data thereby changing the data rate from a 10 G data rate to a 1 G data rate.
9. The rate adaptive interface of claim 5 31, wherein data at the variable first rate comprises data at a rate of 10 Mb/s, 100 Mb/s, or 1 Gb/s, and data at the second third rate comprises data at a rate of 1 Gb/s, and data at the third second rate comprises data at a rate of 10 Gb/s.
10. The rate adaptive interface of claim 5 31, wherein data at the third second rate has a format that is different than the data at the second third rate.
12. The rate adaptive interface of claim 5 31, further comprising a the PHY device device, and wherein the PHY device is configured to receive data at a rate of 10 Gb/s from the switch.
13. The rate adaptive interface of claim 5 31, wherein the first port and the second port comprise input/output ports and the switch is configured to receive and transmit data to either of the second port of the mac device or the encapsulation module.
16. The method of claim 14 41, wherein the first fixed rate comprises 10 Gb/s and the second fixed rate comprises 1 Gb/s.
17. The method of claim 14 41, wherein processing the data at the second fixed rate with an encapsulation module further comprise altering the format of the data.
18. The method of claim 14 41, further comprising outputting the data from the multiplexer to an extension sublayer, a the PHY device, or a second multiplexer.
19. The method of claim 14 41, wherein up-sampling processing the data at the rate adpatation module comprises padding or repeating data received at the variable rate to create data at a the second fixed rate.
20. The method of claim 14 41, further comprising:
establishing a mode of operation;
receiving data at the first fixed rate at the multiplexer from a the PHY device, an extension sublayer, or a second multiplexer;
responsive to the mode of operation, outputting the data at the first fixed rate to either the mac device or to a recovery unit;
responsive to the outputting the data at the first fixed rate to a recovery unit, converting the data at the first fixed rate to the second fixed rate;
converting the data at the second fixed rate to data at a third fixed rate, wherein the data at the third fixed rate is a rate selected from a group of variable rates;
outputting the data at the third fixed rate to the mac device.
0. 21. The rate adaptive interface of claim 1, wherein
the media independent interface module includes a rate adaptation module in communication with the mac device,
the rate adaptation module configured to receive data at a rate selected from 10 Mb/s, 100 Mb/s, and 1 Gb/s,
the fixed rate is 1 Gb/s, and
the media independent interface module further comprises:
an encapsulation/recovery module configured to receive the data at a rate of 1 Gb/s from the rate adaptation module, and encapsulate the data at a rate of 1 Gb/s to generated data at a rate of 10 Gb/s,
a multiplexer configured to receive the data at a rate of 10 Gb/s from the encapsulation/recovery module or to received data from a mac device at a rate of 10 Gb/s and selectively output data at a rate of 10 Gb/s responsive to a mode selection control signal,
a mode selection module configured to control the multiplexer based on control input from a higher layer device;
wherein the ordered set generation and detection module is in communication with the multiplexer and the mode selection module.
0. 22. The rate adaptive interface of claim 1, wherein the fixed rate is 10 Gb/s.
0. 23. The rate adaptive interface of claim 1, wherein the variable rate is selected from 10 Mb/s, 100 Mb/s, 1 Gb/s, and 10 Gb/s.
0. 24. The rate adaptive interface of claim 1, wherein the media independent interface module is configured to repeat data units in the data as part of processing the data to the fixed rate.
0. 25. The rate adaptive interface of claim 24, wherein the media independent interface module is configured to repeat octets in the data.
0. 26. The rate adaptive interface of claim 1, wherein the media independent interface module is configured to perform idle stuffing between data units as part of processing the data to the fixed rate.
0. 27. The rate adaptive interface of claim 1, wherein the media independent interface module is configured to output the data at the fixed rate via a standardized interface.
0. 28. The rate adaptive interface of claim 27, wherein the standardized interface is the 10-gigabit media independent interface (xgmii).
0. 29. The rate adaptive interface of claim 27, wherein the media independent interface module further comprises an extension sublayer module configured to
receive data at the fixed rate via the standardized interface, and
serialize data received via the standardized interface into one or more lanes.
0. 30. The rate adaptive interface of claim 29, wherein the extension sublayer module is configured to serialize data received via the standardized interface into a plurality of lanes.
0. 31. The rate adaptive interface of claim 5, wherein the mac device is configured to output data from a second port at the second rate;
wherein the media independent interface module includes:
a rate adaptation module configured to (i) receive data from the mac device at the variable first rate and (ii) convert the data at the variable first rate to data at a third rate,
an encapsulation module configured to receive data at the third rate from the rate adaptation module and convert the data at the third rate to data at the second rate,
a switch configured to interface with the encapsulation module and the mac device to receive data at a rate of 10 Gb/s from either the encapsulation module or from the second port of the mac device and output data at a rate of 10 Gb/s, the switch controlled by a mode selection control signal,
a mode selection module configured to provide the mode selection control signal to the switch to thereby control operation of the switch.
0. 32. The rate adaptive interface of claim 5, wherein the second rate is 10 Gb/s.
0. 33. The rate adaptive interface of claim 5, wherein the variable first rate is selected from 10 Mb/s, 100 Mb/s, 1 Gb/s and 10 Gb/s.
0. 34. The rate adaptive interface of claim 5, wherein the media independent interface module is configured to repeat data units in the data as part of converting the data at the variable first rate to data at the second rate.
0. 35. The rate adaptive interface of claim 34, wherein the media independent interface module is configured to repeat octets in the data.
0. 36. The rate adaptive interface of claim 5, wherein the media independent interface module is configured to perform idle stuffing between data units as part of converting the data at the variable first rate to data at the second rate.
0. 37. The rate adaptive interface of claim 5, wherein the media independent interface module is configured to output the data at the second rate via a standardized interface.
0. 38. The rate adaptive interface of claim 37, wherein the standardized interface is the 10-gigabit media independent interface (xgmii).
0. 39. The rate adaptive interface of claim 37, wherein the media independent interface module further comprises an extension sublayer module configured to
receive data at the second rate via the standardized interface, and
serialize data received via the standardized interface into one or more lanes.
0. 40. The rate adaptive interface of claim 39, wherein the extension sublayer module is configured to serialize data received via the standardized interface into a plurality of lanes.
0. 41. The method of claim 14, further comprising:
outputting unprocessed data from the multirate mac device at the variable rate to a rate adaptation module of the media independent interface module or at the first fixed rate to a multiplexer;
processing the data at the rate adaptation module to up-convert the data at the variable rate to data at a second fixed rate;
processing the data at the second fixed rate with an encapsulation module to generate processed data at the first fixed rate;
receiving, at a multiplexer, the unprocessed data from the mac device at the first fixed rate or the processed data at the first fixed rate;
receiving, at the multiplexer, a mode selection signal and responsive to the mode selection signal, outputting from the multiplexer the unprocessed data at the first fixed rate or the processed data at the first fixed rate.
0. 42. The method of claim 14, wherein the first fixed rate is 10 Gb/s.
0. 43. The method of claim 14, wherein the variable rate is selected from 10 Mb/s, 100 Mb/s, 1 Gb/s and 10 Gb/s.
0. 44. The method of claim 14, wherein processing the data at the media independent interface module includes repeating data units in the data as part of up-converting the data at the variable rate to data at the first fixed rate.
0. 45. The method of claim 44, wherein repeating data units in the data comprises repeating octets in the data.
0. 46. The method of claim 14, wherein processing the data at the media independent interface module includes performing idle stuffing between data units as part of up-converting the data at the variable rate to data at the first fixed rate.
0. 47. The method of claim 14, further comprising outputting data at the first fixed rate via a standardized interface.
0. 48. The method of claim 47, wherein outputting data at the first fixed rate via the standardized interface includes outputting data at the first fixed rate via the 10-gigabit media independent interface (xgmii).
0. 49. The method of claim 47, further comprising:
providing, via the standardized interface, data at the first fixed rate to an extension sublayer module; and
serializing, with the extension sublayer module, data at the first fixed rate into one or more lanes.
0. 50. The method of claim 49, wherein serializing data at the first fixed rate comprises serializing data at the first fixed rate into a plurality of lanes.
0. 52. The rate adaptive interface of claim 51, wherein the mac device is configured to select the operational mode from xgmii communication, GMII encapsulation, Clause 22 management, and Clause 45 management.
0. 53. The rate adaptive interface of claim 51, wherein the mac device communicates the first ordered set to the PHY device until receipt of the second ordered set.
0. 54. The rate adaptive interface of claim 51, further comprising the PHY device.
0. 55. The rate adaptive interface of claim 54, wherein the mac device communicates the first ordered set to the PHY device via an extension sublayer configured to receive data at a fixed data rate and serialize the data into one or more lanes.
0. 57. The rate adaptive interface of claim 56, wherein the operational mode is selected from xgmii communication, GMII encapsulation, Clause 22 management, and Clause 45 management.
0. 58. The rate adaptive interface of claim 56, wherein the PHY device communicates the second ordered set to the mac device until receipt of the first ordered set has stopped.
0. 59. The rate adaptive interface of claim 56, further comprising the mac device.
0. 60. The rate adaptive interface of claim 56, wherein the PHY device receives the first ordered set via an extension sublayer configured to receive data at a fixed data rate and serialize the data into one or more lanes.
|
This application claim priority to U.S. provisional patent application entitled Method And System For A Multi-rate Gigabit Media Independent Interface filed on Aug. 23, 2006 and assigned Ser. No. 60/839,986.
The invention relates to communication systems and in particular to a method and apparatus for interfacing different transmit rate communication systems.
With the accelerating deployment of Gigabit Ethernet there is a great need for data center equipment supporting a much faster rate in order to handle the aggregation of multiple gigabit links. In response, the IEEE 802.3 working group developed 10 gigabit (10 G) Ethernet. At first, only fiber optic media was specified to support 10 G Ethernet. Soon afterward a very short reach copper media standard was developed, known as 10GBASE-CX4. In June 2006 the 10GBASE-T standard (Clause 55) was approved by IEEE and specifies 10 G Ethernet over unshielded twisted pair (UTP) which is also used with the highly successful 10 megabit (10BASE-T), 100 megabit (100BASE-TX) and gigabit (1000BASE-T) Ethernet copper standards.
The arrival of 10GBASE-T brings a new capability to 10 G Ethernet equipment. That is the capability of operating with link partners of speeds from 10 megabit per second (Mbps) to 10 gigabit per second (Gpbs). However, there is no IEEE defined multi-rate interface between the media access controller (MAC) and the physical layer device (PHY).
802.3 is the IEEE standard for Ethernet networking. 802.3 clauses 44 through 55 define the set of physical coding sublayers (PCS), physical media attachments (PMA) and physical media dependants (PMD) for operation at 10 gigabit per second. Clause 46 defines the 10-gigabit media independent interface (XGMII) that serves as the universal interface between a 10 G media access controller (MAC) and the PCS regardless of the choice of media. XGMII is a 4 byte parallel interface operating at 312.5 MHz. Clause 47 defines the XGMII extension sub-layer (XGXS) and it's interface, the 10-gigabit attachment unit interface (XAUI). XAUI allows the XGMII to be extended across longer distances by serializing the 4 bytes into four serial lanes operating at 3.125 Gbps. Another extension of XGMII known as 10 Gigabit small form factor interface (XFI) is a single lane 10.3 Gbps serial interface using the PCS define in Clause 48 for 10GBASE-R.
802.3 also defines sets of PCS, PMA, and PMD for copper and fiber optic media at rates of 10 Mbps, 100 Mbps, and 1 Gbps each with a corresponding defined interface between the MAC and PCS. For 10 Mbps and 100 Mbps this is the media independent interface (MII) and for a 1 Gbps system it is the gigabit media independent interface (GMII).
However, 802.3 does not define a multi-rate media independent interface. For systems supporting 10 Mbps, 100 Mbps and 1 Gbps, known as 10/100/1000, various solutions were developed within the industry as defacto standards. One of these solutions was SGMII in which GMII is processed by the PCS defined in 802.3 Clause 36 for 1000BASE-X. The GMII is encoded using 8B10B coding and serialized for transmission at 1.25 Gbps.
Several solutions have been proposed, but these proposed solutions do not adequately address the drawbacks of the prior art. For example, the Serial-GMII Specification: ENG-46158 is an industry de-facto standard written and maintained by Cisco Systems. The Serial Gigabit Media Independent Interface (SGMII) is designed to convey network data and port speed between a 10/100/1000 PHY and a MAC. SGMII is specified to operate in both half and full duplex and at all port speeds. However SGMII does not support 10 gigabit operation, and does not support the XGMII interface defined for 10 G Ethernet. Other drawbacks exist with various other prior art systems.
To overcome the drawbacks of the prior art and to provide additional advantages, a universal interface is disclosed. In one embodiment, a rate adaptive interface is provided which is configured to interface a MAC device with a PHY device. In such an embodiment, the interface comprises a rate adaptation module in communication with a MAC device, the rate adaptation module configured to receive data at a rate selected from 10 Mb/s, 100 Mb/s, and 1 Gb/s and process the data to a rate of 1 Gb/s, which is in turn output at a rate of 1 Gb/s. The interface also comprises an encapsulation/recovery module configured to receive the data at a rate of 1 Gb/s from the rate adaptation module and then encapsulate the data at a rate of 1 Gb/s to generated data at a rate of 10 Gb/s. A multiplexer is configured to receive the data at a rate of 10 Gb/s from the encapsulation/recovery module or to received data from a MAC device at a rate of 10 Gb/s and selectively output data at a rate of 10 Gb/s responsive to a mode selection control signal. The mode selection module is configured to control the multiplexer based on control input from a higher layer device. An ordered set generation and detection module is also part of this embodiment and is in communication with the multiplexer and the mode selection module. The ordered set generation and detection module is configured to detect ordered sets which announce a mode change such that the ordered set generation and detection module is in communication with the mode selection module.
In one embodiment, the encapsulation/recovery module is further configured to recover encapsulated data thereby changing the data rate from a 10 G data rate to a 1 G data rate. In one configuration, the encapsulation/recovery module is further configured with an input to receive data at a rate of 10 Gb/s and perform recovery thereon to output the data at a rate of 1 Gb/s. It is also contemplated that the system of Claim 1, wherein the mode selection module adjusts the data rate of operation between 10 Mb/s, 100 Mb/s, or 1 Gb/s.
Also disclosed herein is a rate adaptive interface for use in a network device. In this configuration the interface comprises a MAC device configured to output data from a first port at a variable first rate and from a second port at a second rate. A rate adaptation module is part of this embodiment and configured to receive data from the MAC at the variable first rate and convert the data at the variable first rate to data at the second rate. An encapsulation module configured to receive data at the second rate from the rate adaptation module and convert the data at the second rate to data at a third rate. From there, a switch is configured to interface with the encapsulation module and the MAC device to receive data at a rate of 10 Gb/s from either the encapsulation module or from the second port of the MAC device and then output the data at a rate of 10 Gb/s. The switch may be controlled by a mode selection control signal. In this embodiment, a mode selection module is configured to provide the mode selection control signal to the switch to thereby control operation of the switch.
It is further contemplated that the system further comprise an extension sublayer configured to receive data at a rate of 10 Gb/s from the switch, such that the extension sublayer extends the distance which the data at a rate of 10 Gb/s may be transmitted. In addition, the system may further comprise an ordered set generation and detection module configured interface with the switch to detect ordered sets which determine a mode change, such that the ordered set generation and detection module is in communication with the mode selection module. The encapsulation/recovery module may be further configured to recover encapsulated data thereby changing the data rate from a 10 G data rate to a 1 G data rate. In one embodiment, the data at the variable first rate comprises data at a rate of 10 Mb/s, 100 Mb/s, or 1 Gb/s, and data at the second rate comprises data at a rate of 1 Gb/s and data at the third rate comprises data at a rate of 10 Gb/s. In addition, the data at the third rate may have a format that is different than the data at the second rate. This system may further comprise a PHY Device configured to receive data at a rate of 10 Gb/s from the switch. In one embodiment, the first port and the second port comprise input/output ports and the switch is configured to receive and transmit data to either of the second port of the MAC device or the encapsulation module.
Also disclosed herein is a method for interfacing a multirate MAC device with a PHY device in a network communication device. In this example embodiment, this the method comprises outputting unprocessed data from the multirate MAC device at a variable rate to a rate adaptation module or at a first fixed rate to a multiplexer. The method processes the data at the rate adaptation module to up-convert the data at a variable rate to data at a second fixed rate. Then, the method processes the data at the second fixed rate with an encapsulation module to generate processed data at the first fixed rate. In this embodiment, the method receives, at a multiplexer, the unprocessed data from the MAC device at the first fixed rate or the processed data at the first fixed rate, and also receives, at the multiplexer, a mode selection signal. Responsive to the mode selection signal, the operation outputs from the multiplexer the unprocessed data at the first rate or the processed data at the first rate. In one variation, the variable rate consists of 10 Mb/s, 100 Mb/s and 1 Gb/s. It is contemplated that the first fixed rate comprises 10 Gb/s and the second fixed rate comprises 1 Gb/s. In addition, processing the data at the second fixed rate with an encapsulation module further comprise altering the format of the data. This method may further comprise outputting the data from the multiplexer to an extension sublayer, a PHY device, or a second multiplexer. In this embodiment, up-sampling may comprise padding or repeating data received at the variable rate to create data at a second fixed rate. This method may also comprise establishing a mode of operation and receiving data at the first fixed rate at the multiplexer from any of a PHY device, an extension sublayer, or a second multiplexer. Then, responsive to the mode of operation, the method outputs the data at the first fixed rate to either the MAC device or to a recovery unit. In addition, responsive to the outputting the data at the first fixed rate to a recovery unit, the method converts the data at the first fixed rate to the second fixed rate and converts the data at the second fixed rate to data at a third fixed rate, such that the data at the third fixed rate is a rate selected from a group of variable MII GMII, MII or XGMII as shown. XGMII is defined by one or more IEEE standards and as such, is not described in detail herein, but it does suffer from the drawback of not adapting to rates. One such drawback is that it is fixed at 10 Gb/s.
The UGMII module 134 is configured to convert any rate of incoming or outgoing data between the MAC 130 and a PHY 140 to thereby provide a universal intermediate device capable of interfacing multi-rate MAC and PHY modules. In this embodiment, the UGMII module 134 includes 10 gigabit data rate transfer capability. The UGMII module 134 is described below in detail in connection with
The output of the UGMII module 134 connect connects to a PHY 140. In this embodiment, the PHY (physical layer device) 140 is capable of operation at any data rate, which in this embodiment may be 10 megabits per second (Mb/s), 100 Mb/s, 1 Gigabits per second (Gb/s), or 10 Gb/s. The PHY 140 may comprise any type of device currently in existence, such as defined by one or more IEEE standards, or developed in the future capable of addressing and channel access control. PHY 140 configuration and operation is generally understood by one of ordinary skill in the art and as such, is not described in detail herein.
The output of the PHY 140 connects to the channels 144, represented by MDI. MDI channels 144 may comprises a multi-line channel, such as but not limited to CAT 3, CAT 5, CAT 5E, CAT 6, CAT6A, or CAT7. Shown on the left hand side of
In operation, the UGMII system performs numerous different functions. In this example embodiment the first aspect of the invention is mode selection. In this embodiment, mode selection comprises the negotiation between the UGMII extension sublayers located at the MAC and PHY to select between one of several operational modes including: XGMII communication, GMII encapsulation, Clause 22 MDIO register management and Clause 45 MDIO register management. The management aspects of the PHY or MAC set the exact link speed, which may be based on the capability of the channel or hardware. In one embodiment, selection of UGMII and XGMII operating modes, or any other operating mode, are negotiated between the MAC and PHY using ordered sets to announce and acknowledgement a mode change. In one embodiment 802.3 Clause 46 defined ordered sets are utilized. The Clause 22 and 45 define the universal standard set of management registers to give status and control of the physical layer. These clauses defined the address, location, and control data stored therein.
In this example embodiment a device incorporating UGMII system enables the support the following interface modes.
The rate adaptation module 214 may also be configured as hardware, software, or a combination of both and be configured to adapt the rate of lower speed data up to a higher rate, such as GMII 1 Gb/s rate. The MII/GMII I/O port 210 connects the MAC 208 to a rate adaptation module 214 which is configured to adapt the variable rate from the MAC 208 to a constant rate of 1 Gb/s. At a rate of 1 Gb/s, the rate adaptation module 214 connects to a GMII encapsulation/recovery module 216. The GMII encapsulation/recovery module 216 up converts data received from the rate adaptation module 214 at 1 Gb/s to a rate of 10 Gb/s, which is in turn provided to a multiplexer 220. GMII data is used to create small packets or frames to be transmitted across the XGMII and may be padded with zeros or other pad data.
Conversely, data received from the multiplexer 220 at a rate of 10 Gb/s is converted to a 1 Gb/s rate by the GMII encapsulation/recover module 216. The multiplexer 220 also receives data without rate conversion from the MAC 208 via the XGMII I/O port as shown. The input and output from the multiplexer 220 on the MAC 208 side occurs over 36 parallel conductors at a rate of 10 Gb/s, but in other embodiments, other rates may be utilized. The path between the rate adaptation module 214 and the GMII encapsulation/recovery module 216 may comprise any type path, but in this embodiment comprises 12 parallel conductors.
Also connecting to the multiplexer 220 on the MAC 208 side is an ordered set generation and detection unit 224 which is configured to communicate with the multiplexer as shown. The ordered set generation and detection unit 224 monitors and/or generates ordered sets from the MAC 208 or the multiplexer 220, or any higher layer. The higher layer may mean any layer in the OSI model or from an application or user input. In one embodiment, the ordered set generation and detection unit 224 both sends and detects received ordered sets.
Orders sets comprise data utilized to control operation of the MAC, PHY, and/or the UGMII module. The ordered sets may be considered as control data that establish the link characteristics and may set the rate of data exchange. In one embodiment, ordered sets are not exchanged during data mode.
The ordered set generation and detection unit 224 also communicates with the mode selection unit 228. The mode selection unit 228 provides a control input to the multiplexer 220 to selectively control which sets of input/output channels to use for communication during operation. For example, if the PHY is set to operate at 10M, 100M, or 1 G, then the mode selection unit 228 will force the multiplexer 220 to use the I/O ports corresponding to the MAC I/O ports 210. Alternatively, if the rate is set at 10 Gb/s then the multiplexer 220 will be forced to utilized the I/O ports associated with the MAC 208 ports 212. In one embodiment, the mode selection unit 228 is configured to report the detection of ordered sets back to the MAC 208, but it could alternatively be done by the ordered set generation/detection unit 224. It is also possible for control data or ordered sets to be exchanged via a status line from the mode selection unit 228 to the MAC 208. In one implementation the MAC 208 would set the MUX 220 by configuring the mode selection unit 228. However, a more complex design could allow the mode selection unit 228 to set the MUX 220 based on mode setting from the MAC 208 and the detection of ordered sets
The multiplexer I/O port 240 operates a 10 Gb/s and may optionally communicate with an optional extension sublayer 244 or directly with a PHY. The optional extension sublayer 244 may be utilized to extend the distances between the MAC 208 and the PHY.
In this example embodiment another aspect of the invention is data up sampling which is discuss in connection with
Up sampling can be replaced by one of several other means for rate adaptation including idle stuffing between data bytes.
After receipt and at step 412, the operation up samples the octet one time, ten times, or one hundred times for the rates of 1 G, 100M or 10M respectively. For example, to create a data rate of 1 G from a 10M receive rate, up sampling occurs at a rate of 100 times. Up sampling may occur by repeating the received octet or padding with created pad bits. Thereafter, at step 416, the operation passes the up sampled octets to the encapsulation block at a rate of 1 G. As a result, data received at a variable rate is output at a constant rate of 1 G.
Another aspect of the invention is GMII encapsulation.
GMII is defined in Clause 35 of IEEE STD 802.3-2005, Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications, December 2005, which is incorporated herein in its entirety. In this example embodiment disclosed herein, the MAC transmits to the PHY using data signals TXD<7:0>, transmit enable TX_EN, and transmit error TX_ER. The PHY transmits to the MAC using data signals RXD<7:0>, data valid RX_DV, receive error RX_ER, and carrier sense CRS. In other embodiments different MAC transmit schemes may be utilized. In one embodiment, encapsulation is performed on a block of N GMII transfers (octets) and generates multiple XGMII transfers.
On the transmit side of the MAC N (for N>1) octets of data, TXD(0)<7:0> to TXD(N−1)<7:0>, along with control signals, TX_EN(0:N−1) to TX_ER(0:N−1), are encapsulated within a very short data frame. This frame contains X bytes including the start symbol, /S/, and is at least 8 bytes (the smallest frame supported by the 10GBASE-R PCS). The data frame is followed by an inter-frame gap (IFG) of at least 12 bytes including the terminate symbol, /T/. For N=2, the total encapsulation requires 20 bytes, the equivalent of 2 GMII or 5 XGMII transfers.
Optionally, the remaining bytes in the encapsulation frame may contain management data exchanges that allow for reading and writing of Clause 22 management registers.
At the PHY transmit input, the short frame is received and the N GMII octets are reconstructed (from UGMII rate) along with control signals and presented to the PHY as GMII signals.
In addition, the remaining information within the data frame may be discarded at step 612. During the idle periods, Idle columns, ∥I∥, may be deleted or inserted for clock rate matching purposes as defined in IEEE STD 802.3-2005, Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications, December 2005.
On the receive side of the PHY the GMII rate adaptation and encapsulation operations are performed similar to those performed on the MAC TX path.
At the MAC receive input, the short encapsulation frame is received and the N GMII octets are reconstructed along with control signals and presented to the MAC as GMII signals. Additional information within the frame may be discarded. During the idle periods (interframe gap) Idle columns, ∥I∥, may be deleted or inserted for clock rate matching purposes as defined in IEEE STD 802.3-2005, Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications, December 2005. In one embodiment Clause 45 management may occur across the XGMII.
When placed in Clause 45 management mode UGMII may be configured to allow the MAC/host to access management registers across the XGMII or extension. This mode may use ordered sets or short frames to encapsulate the host management interface (MDIO) between the host and PHY.
The UGMII has many advantages and distinctions over prior art system. On such distinction of the invention is that is enables a multi-rate interface between MAC and PHY for 10 G Ethernet capable PHYs.
In various embodiment this invention enables:
Additional advantages of further aspects of the invention are the access to Clause 22 and Clause 45 management registers in the PHY using the same 10 G interface. The separate signals MDC and MDIO, defined by IEEE 802.3, are not required.
One benefit of the invention described herein is the ability to interface a MAC to a 10/100/1000/10 G PHY (or any subset thereof) using a single 2 signal (4-pin) XFI interface, enabling greater port density per MAC IC. The XFI interface is shown in
Table of Contents
Introduction—Overview
Functional Specification
Modes of Operation
Data Upsampling
GMII Encapsulation
Clause 22 Management exchanges
Clause 45 Management
UGMII Mode Selection
Electrical Specification
Applicable Documents
Abbreviations
Disclosed herein is a new interface, the Ultra-serial Gigabit Media Independent Interface (UGMII), for the purpose of connecting a PHY operating in 10/100/1000 mode to a 10 G capable MAC using a 10 G defined interface. This interface may be XGMII (74 signals), XAUI (8 signals), or 10GBASE-R/XFI (2 signals).
UGMII is designed to support one or more of the following:
Encapsulation and transport of the 10/100/1000 MII/GMII interface across a 10 G interconnect.
Operation in full duplex and half duplex modes.
Auto-negotiation of operating mode: either XGMII at 10 Gbps or UGMII operating at 10, 100, or 1000 Mbps
Use of defined 10 G physical coding sublayers (PCS) without modification
An additional capability of UGMII may be access to Clause 22 and Clause 45 management registers in the PHY using the same 10 G interface. Thus, in one embodiment MDC and MDIO are not required.
One benefit of UGMII is the ability to interface MAC to a 10/100/1000/10 G PHY (or any subset thereof) using a single 2 signal (4-pin) XFI interface, which in turn enables greater port density per MAC IC.
Overview
UGMII defines a protocol for the transport of the GMII defined by Clause 35 of [1] over any Ethernet 10-gigabit interface. The purpose of UGMII is to allow a 10 G capable MAC to operate with a multi-rate 10 G PHY using minimal interconnect. For the greatest reduction in interconnect, it is expected that UGMII will be used with a 10GBASE-R PCS across an XFI (10 G serial interface) operating at 10.3125 Gbps, thus requiring only 2 differential pair signals on 4 pins.
An example system utilizing UGMII is shown in the figures provided herewith. UGMII is defined at the XGMII (if implemented) such that any defined extension such as XGXS/XAUI (Clause 48 of [1]), or PCS such as 10GBASE-R over XFI may be used as the interface between MAC and PHY.
In UGMII the defined signals for GMII may be fully encapsulated without modification, transported across the (extended) XGMII interface and reconstructed at the MAC RX and PHY TX inputs.
In the example embodiment described herein, selection of UGMII and XGMII operating modes are negotiated between the MAC and PHY using ordered sets to announce and acknowledgement a mode change.
Modes of Operation
A device incorporating UGMII may be configured to support the following interface modes:
Data encapsulation may be performed on the equivalent implementation of GMII for 10/100/1000 PHYs operating at 125 MHz. For PHYs operating lower than 1000 Mbps data upsampling can be performed prior to encapsulation.
For operation in 100 Mbps mode every octet in a frame can be repeated 10 times. For operation in 10 Mbps mode every octet in a frame can be repeated 100 times.
At the far end of the UGMII, after the GMII is reconstructed, the octects will be downsampled by 10 for 100 Mbps operation or by 100 for 10 Mbps operation.
GMII Encapsulation
GMII is defined in Clause 35 of [1]. The MAC transmits to the PHY using data signals TXD<7:0>, transmit enable TX_EN, and transmit error TX_ER. The PHY transmits to the MAC using data signals RXD<7:0>, data valid RX_DV, receive error RX_ER, and carrier sense CRS.
In this example embodiment, encapsulation is performed on a block of 2 GMII transfers (octets) and generates multiple XGMII transfers.
On the transmit side of the MAC two octets of data, TXD0<7:0> and TXD1<7:0>, along with control signals, TX_EN0-1 and TX_ER0-1, are encapsulated within a very short data frame. In this embodiment, this frame contains 8 bytes including the start symbol, /S/, and represents the smallest frame supported by the 10GBASE-R PCS. The data frame is followed by the minimum interframe gap (IFG) of 12 bytes including the terminate symbol, /T/. In this embodiment, the total encapsulation requires 20 bytes, the equivalent of 2 GMII or 5 XGMII transfers.
In one example embodiment, the first byte of the frame following /S/ contains the control signal information and can be constructed as: D1<7:0>=0 0 0 0 TX_ER1 TX_ER0TX_EN1 TX_EN0. The next two bytes may be configured to carry the data: D2<7:0>=TXD0<7:0> and D3<7:0>=TXD1<7:0>. Optionally, the remaining four bytes, D4 to D7, may contain management data exchanges that allow for reading and writing of Clause 22 management registers.
At the PHY transmit input, the short frame is received and the two GMII octets are reconstructed along with control signals and presented to the PHY as GMII signals. Additional information within the frame may be discarded. During the idle periods Idle columns, ∥I∥, may be deleted or inserted for clock rate matching purposes.
On the receive side of the PHY the process may be similar to the MAC TX encapsulation. Thus, two octets of data, RXD0<7:0> and RXD1<7:0>, along with control signals, RX_DV0-1 and RX_ER0-1, may be encapsulated within an 8-byte data frame. A minimum interframe gap follows the data frame.
In this example embodiment, the first byte of the frame following /S/ contains the control signal information and is constructed as: D1<7:0>=0 0 0 0 RX_ER1 RX_ER0 RX_DV1 RX_DV0. The next two bytes may carry the data: D2<7:0>=RXD0<7:0> and D3<7:0>=RXD1<7:0>. Optionally, the remaining four bytes, D4 to D7, may contain management data exchanges that allow for reading and writing of Clause 22 management registers.
At the MAC receive input, the short frame is received and the two GMII octets are reconstructed along with control signals and presented to the MAC as GMII signals. Additional information within the frame may be discarded. During the idle periods, Idle columns, ∥I∥, ma be deleted or inserted for clock rate matching purposes.
Table 1, which follows, illustrates one example encapsulation process.
TABLE 1
Encapsulation of GMII
XGMII group
Byte 0
Byte 1
Byte 2
Byte 3
0
/S/
D1
D2
D3
1
D4
D5
D6
D7
2
/T/
/I/
/I/
/I/
3
/I/
/I/
/I/
/I/
4
/I/
/I/
/I/
/I/
Clause 22 Management Exchanges
It is further contemplated that the MAC/host may access Clause 22 management register through exchanges with the PHY using the last 4 bytes (or other bytes) of the GMII encapsulation frame. In other embodiments, Clause 22 Management Exchanges may occur in a different manner.
Clause 45 Management
It is further contemplated that when placed in Clause 45 management mode UGMII may allow the MAC/host to access management registers across the XGMII or extension.
In addition, various embodiments may use ordered sets or short frames as above. One potential downside to this arrangement is an inability to access management registers if UGMII is not operating or has a fault. It is contemplated that the UGMII system may be configured to access management registers even during data transmission.
UGMII Mode Selection
In the embodiment disclosed herein, the MAC selects UGMII modes of operation by sending ordered sets across XGMII or its extension.
To place the PHY in any (any particular) mode, the MAC may send an ordered set of /Q/ D1 D2 D3 with D1=96, D2=0 and D1 D3 set according to Table 2. When they the PHY receives one of these ordered sets, it replies with the same ordered set, but sets D2=D3 as an acknowledgement. Upon acknowledgement the MAC stops sending the ordered sets. After detecting the absence of the ordered set from the MAC, the PHY may be configured to stop sending ordered sets and begins operating in the new mode. The MAC then begins operation in the new mode and may begin transmitting data.
TABLE 2
Ordered Sets for UGMII Mode Change
UGMII Mode
D0
D1
D2
D3
XGMII
/Q/
96
0/AA
AA
GMII Encapsulation
/Q/
96
0/55
55
Clause 45 Management
/Q/
96
0/66
66
The following documents are incorporated by reference in their entirety herein.
IEEE STD 802.3-2005, Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications, December 2005. This reference is hereby incorporated by referenced in its entirety.
IEEE Standard 802.3an-2006, Amendment 1: Physical Layer and Management Parameters for 10 Gb/s Operation—Type 10GBASET. This reference is hereby incorporated by referenced in its entirety.
The following abbreviations are used herein and defined as set forth below.
While various embodiments of the invention have been described, it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible that are within the scope of this invention. In addition, the various features, elements, and embodiments described herein may be claimed or combined in any combination or arrangement.
Patent | Priority | Assignee | Title |
RE48506, | Aug 23 2006 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Method and system for a multi-rate gigabit media independent interface |
Patent | Priority | Assignee | Title |
4359778, | Feb 05 1981 | United States of America as represented by the Secretary of the Navy | Channel equalizer and method for cancelling ghosts |
4583235, | Nov 11 1982 | Siemens Aktiengesellschaft | Self-adjusting equalizer configuration which automatically adjusts to the cable length |
4878232, | Nov 20 1985 | Nortel Networks Limited | Data transmission system |
4956838, | Mar 15 1988 | ETAT FRANCAIS REPRESENTE PAR LE MINISTRE DES POSTES, TELECOMMUNICATIONS ET DE L ESPACE CENTRE NATIONAL D ETUDES DES TELECOMMUNICATIONS | Echo cancelling device with frequency sub-band filtering |
5150381, | Feb 16 1989 | CIF LICENSING, LLC | Trellis shaping for modulation systems |
5222084, | Jun 25 1990 | NEC Corporation | Echo canceler having adaptive digital filter unit associated with delta-sigma modulation circuit |
5249200, | Jul 30 1991 | CIF LICENSING, LLC | Device and method for combining precoding with symbol-rate spectral shaping |
5293402, | May 02 1991 | TTI Inventions A LLC | Wideband digital equalizers for subscriber loops |
5297170, | Aug 21 1990 | Motorola, Inc | Lattice and trellis-coded quantization |
5301209, | Oct 09 1991 | AT&T Bell Laboratories | Multidimensional trellis-coded modulation for fading channels |
5305307, | Jan 04 1991 | Polycom, Inc | Adaptive acoustic echo canceller having means for reducing or eliminating echo in a plurality of signal bandwidths |
5307405, | Sep 25 1992 | Qualcomm Incorporated | Network echo canceller |
5388124, | Jun 12 1992 | RPX CLEARINGHOUSE LLC | Precoding scheme for transmitting data using optimally-shaped constellations over intersymbol-interference channels |
5633863, | Jul 07 1994 | SIEMENS SCHWEIZ AG | Echo canceler |
5646958, | Dec 26 1994 | NEC Corporation | Decision feedback equalizer for canceling short-and long-multipath components using correspondingly delayed decision symbols |
5822371, | Feb 14 1997 | PC-TEL, INC | Mapper for high data rate signalling |
5856970, | Aug 05 1996 | ZARBAÑA DIGITAL FUND LLC | Multi-channel echo cancellation method and apparatus |
5862179, | Feb 14 1997 | Silicon Laboratories Inc | Mapper for high data rate signalling |
5896452, | May 24 1996 | GENERAL DYNAMICS C4 SYSTEMS, INC | Multi-channel echo canceler and method using convolution of two training signals |
5909466, | Sep 15 1995 | France Telecom | Adaptive equalizer for digital communications systems |
6081502, | Sep 18 1997 | STMICROELECTRONICS N V | Method and apparatus for reducing probability of clipping |
6088827, | Mar 25 1997 | Level One Communications, Inc. | 1000BASE-T packetized trellis coder |
6147979, | Aug 12 1997 | THE CHASE MANHATTAN BANK, AS COLLATERAL AGENT | System and method for echo cancellation in a communication system |
6160790, | Feb 28 1997 | RPX Corporation | Crosstalk canceller system and method |
6167082, | Mar 06 1997 | LEVEL ONE COMMUNICATIONS, INC | Adaptive equalizers and methods for carrying out equalization with a precoded transmitter |
6201831, | Apr 22 1999 | AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD | Demodulator for a multi-pair gigabit transceiver |
6226332, | Apr 22 1999 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | Multi-pair transceiver decoder system with low computation slicer |
6249544, | Apr 22 1999 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | System and method for high-speed decoding and ISI compensation in a multi-pair transceiver system |
6252904, | Apr 22 1999 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | High-speed decoder for a multi-pair gigabit transceiver |
6253345, | Apr 22 1999 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | System and method for trellis decoding in a multi-pair transceiver system |
6259729, | Dec 19 1997 | NEC Corporation | Method of and an apparatus for training tap coefficients of an adaptive equalizer |
6272173, | Nov 09 1998 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | Efficient fir filter for high-speed communication |
6285653, | Sep 11 1998 | Fluke Corporation | Method and apparatus to measure far end crosstalk for the determination of equal level far end crosstalk |
6297647, | Jul 20 1999 | Agilent Technologies, Inc. | Crosstalk test unit and method of calibration |
6304598, | Aug 28 1998 | AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD | Apparatus for, and method of, reducing power dissipation in a communications system |
6351531, | Jan 21 2000 | Google Technology Holdings LLC | Method and system for controlling echo cancellation using zero echo path, ringing, and off-hook detection |
6356555, | Aug 25 1995 | Google Technology Holdings LLC | Apparatus and method for digital data transmission using orthogonal codes |
6359893, | Jul 28 1997 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | Multi-rate switching device for a mixed communication rate ethernet repeater |
6385208, | Jun 02 1998 | Cisco Technology, Inc | Serial media independent interface |
6433558, | May 13 1999 | MICROTEST, INC | Method for diagnosing performance problems in cabling |
6463041, | Mar 09 1998 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | Apparatus for, and method of, reducing noise in a communications system |
6480477, | Oct 14 1997 | SPARKMOTION INC | Method and apparatus for a data transmission rate of multiples of 100 MBPS in a terminal for a wireless metropolitan area network |
6480532, | Jul 13 1999 | STMicroelectronics, Inc. | Echo cancellation for an ADSL modem |
6493448, | Jan 15 1999 | Alcatel | Process for echo suppression with adaptive fir filters |
6584160, | Aug 13 1998 | Ikanos Communications, Inc | System and method for reducing the effects of clipping in a DMT transceiver |
6598203, | Jun 28 2000 | Northrop Grumman Systems Corporation | Parallel punctured convolutional encoder |
6618480, | Apr 30 1997 | Texas Instruments Incorporated | DAC architecture for analog echo cancellation |
6665402, | Aug 31 1999 | Genband US LLC; SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT | Method and apparatus for performing echo cancellation |
6751255, | Mar 09 2000 | RPX Corporation | Decision feedback analyzer with filter compensation |
6813311, | Mar 14 2000 | Ikanos Communications, Inc | Non-linear echo cancellation for wireless modems and the like |
6823483, | Apr 22 1999 | AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD | Physical coding sublayer for a multi-pair gigabit transceiver |
6826226, | Oct 17 2000 | TELEFONAKTIEBOLAGET LM ERICSSON PUBL | Prefilter design by spectral factorization |
6862326, | Feb 20 2001 | Comsys Communication & Signal Processing Ltd. | Whitening matched filter for use in a communications receiver |
6956847, | Jun 19 2003 | Cisco Technology, Inc.; Cisco Technology Inc | Multi-rate, multi-protocol, multi-port line interface for a multiservice switching platform |
6961373, | Jul 01 2002 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Method and apparatus for channel equalization |
7031341, | Jul 26 2000 | Wuhan Research Institute of Post and Communications, Mii. | Interfacing apparatus and method for adapting Ethernet directly to physical channel |
7065167, | Jul 10 2002 | MARVELL INTERNATIONAL LTD | Method and apparatus for constellation shaping |
7230957, | May 18 2002 | Electronics and Telecommunications Research Institute | Method and apparatus for multiplexing and demultiplexing variable-length packets |
7260120, | Nov 07 2002 | Electronics and Telecommunications Research Institute | Ethernet switching apparatus and method using frame multiplexing and demultiplexing |
7286622, | Aug 07 2002 | AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD | System and method for performing on-chip synchronization of system signals utilizing off-chip harmonic signal |
7305047, | Mar 12 2003 | Lattice Semiconductor Corporation | Automatic lane assignment for a receiver |
7343425, | Feb 21 2003 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Multi-speed serial interface for media access control and physical layer devices |
7356047, | Apr 24 2004 | Cisco Technology, Inc. | 10/100/1000/2500 Mbps serial media independent interface (SGMII) |
7376146, | May 16 2002 | Intel Corporation | Bus conversion device, system and method |
7593416, | Dec 30 2004 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Media and speed independent interface |
7599391, | Dec 30 2004 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Media and speed independent interface |
7606945, | Jan 04 2006 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | Method and apparatus for dynamically configuring hardware resources by a generic CPU management interface |
7664134, | Sep 23 2003 | AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD | Programmable Q-ordered sets for in-band link signaling |
7720068, | Aug 23 2006 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Method and system for a multi-rate gigabit media independent interface |
7751442, | Dec 19 2003 | Intel Corporation | Serial ethernet device-to-device interconnection |
7760750, | Dec 30 2004 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Media and speed independent interface |
8018924, | Jul 22 2004 | Marvell Israel (M.I.S.L) Ltd. | Network device with multiple MAC/PHY ports |
8259748, | Jul 22 2006 | Cisco Technology, Inc | Multiple channels and flow control over a 10 Gigabit/second interface |
8320400, | Dec 30 2004 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Media and speed independent interface |
8565261, | Dec 30 2004 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Media and speed independent interface |
8619571, | Feb 09 2000 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Chip-to-chip interface for 1000base-T gigabit physical layer device |
8787402, | Jul 22 2006 | Cisco Technology, Inc. | Systems and methods to control flow and to define and interleave multiple channels |
20010036160, | |||
20020067824, | |||
20020106016, | |||
20020176492, | |||
20020191552, | |||
20030067888, | |||
20030108092, | |||
20030142659, | |||
20030179710, | |||
20030214979, | |||
20040001540, | |||
20040022311, | |||
20040028156, | |||
20040090995, | |||
20040125487, | |||
20050063310, | |||
20050063413, | |||
20050196119, | |||
20060153238, | |||
20070116023, | |||
20070153781, | |||
20070174434, | |||
20070182489, | |||
20070258551, | |||
20090154473, |
Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
May 17 2012 | Marvell International Ltd. | (assignment on the face of the patent) | / | |||
Dec 31 2019 | MARVELL INTERNATIONAL LTD | CAVIUM INTERNATIONAL | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 052918 | /0001 | |
Dec 31 2019 | CAVIUM INTERNATIONAL | MARVELL ASIA PTE, LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 053475 | /0001 |
Date | Maintenance Fee Events |
Nov 20 2017 | M1552: Payment of Maintenance Fee, 8th Year, Large Entity. |
Nov 09 2021 | M1553: Payment of Maintenance Fee, 12th Year, Large Entity. |
Date | Maintenance Schedule |
Aug 22 2020 | 4 years fee payment window open |
Feb 22 2021 | 6 months grace period start (w surcharge) |
Aug 22 2021 | patent expiry (for year 4) |
Aug 22 2023 | 2 years to revive unintentionally abandoned end. (for year 4) |
Aug 22 2024 | 8 years fee payment window open |
Feb 22 2025 | 6 months grace period start (w surcharge) |
Aug 22 2025 | patent expiry (for year 8) |
Aug 22 2027 | 2 years to revive unintentionally abandoned end. (for year 8) |
Aug 22 2028 | 12 years fee payment window open |
Feb 22 2029 | 6 months grace period start (w surcharge) |
Aug 22 2029 | patent expiry (for year 12) |
Aug 22 2031 | 2 years to revive unintentionally abandoned end. (for year 12) |