Method and system for a multi-rate gigabit media independent interface

Abstract

Disclosed is a UGMII system to interface multirate devices including 10 gigabit per second data exchange rates. mode selection is enabled to provide for automatic detection and adaptation to any transmit rate including 10M, 100M, 1G, and 10G. mode selection comprises the negotiation between the UGMII extension sublayers located at the mac and PHY to select between one of several operational modes including: XGIVIII communication, GIYIII encapsulation, Clause 22 MDIO register management and Clause 45 MDIO register management. selection of UGMII and XGMII operating modes are negotiated between the mac and PHY using ordered sets to announce and acknowledgement a mode change. In one embodiment 802.3 Clause 46 defined ordered sets are utilized.

Description

PRIORITY CLAIM

This application MII GMII, MII or XGMII as shown. XGMII is defined by one or more IEEE standards and as such, is not described in detail herein, but it does suffer from the drawback of not adapting to rates. One such drawback is that it is fixed at 10 Gb/s.

The UGMII module 134 is configured to convert any rate of incoming or outgoing data between the MAC 130 and a PHY 140 to thereby provide a universal intermediate device capable of interfacing multi-rate MAC and PHY modules. In this embodiment, the UGMII module 134 includes 10 gigabit data rate transfer capability. The UGMII module 134 is described below in detail in connection with FIG. 2. The UGMII 134 may be configured in hardware, software, or a combination of both. Rate information will be provided to the UGMII in any manner, such as but not limited to, from the PHY, the MAC, or via ordered sets, or automatically detected.

The output of the UGMII module 134 connect connects to a PHY 140. In this embodiment, the PHY (physical layer device) 140 is capable of operation at any data rate, which in this embodiment may be 10 megabits per second (Mb/s), 100 Mb/s, 1 Gigabits per second (Gb/s), or 10 Gb/s. The PHY 140 may comprise any type of device currently in existence, such as defined by one or more IEEE standards, or developed in the future capable of addressing and channel access control. PHY 140 configuration and operation is generally understood by one of ordinary skill in the art and as such, is not described in detail herein.

The output of the PHY 140 connects to the channels 144, represented by MDI. MDI channels 144 may comprises a multi-line channel, such as but not limited to CAT 3, CAT 5, CAT 5E, CAT 6, CAT6A, or CAT7. Shown on the left hand side of FIG. 1F, is a UGMII extension sublayer configured to enable an optional extension sublayer to thereby extend on-board or inter-system transmit distances.

In operation, the UGMII system performs numerous different functions. In this example embodiment the first aspect of the invention is mode selection. In this embodiment, mode selection comprises the negotiation between the UGMII extension sublayers located at the MAC and PHY to select between one of several operational modes including: XGMII communication, GMII encapsulation, Clause 22 MDIO register management and Clause 45 MDIO register management. The management aspects of the PHY or MAC set the exact link speed, which may be based on the capability of the channel or hardware. In one embodiment, selection of UGMII and XGMII operating modes, or any other operating mode, are negotiated between the MAC and PHY using ordered sets to announce and acknowledgement a mode change. In one embodiment 802.3 Clause 46 defined ordered sets are utilized. The Clause 22 and 45 define the universal standard set of management registers to give status and control of the physical layer. These clauses defined the address, location, and control data stored therein.

In this example embodiment a device incorporating UGMII system enables the support the following interface modes.

• • XGMII: Operates as defined in IEEE STD 802.3-2005, Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications, December 2005, which is hereby incorporated in its entirety herein;
  • GMII Encapsulation: perform encapsulation and transport of GMII interface signals;
  • Clause 22 management: perform management register read and write operations across the XGMII or extension; and
  • Clause 45 management: perform management register read and write operations across the XGMII or extension.

FIG. 2 illustrates a block diagram of an example embodiment of a UGMII system as disclosed herein connected to an optional extension sublayer module. In this example embodiment, a MAC module 208 includes an MII/GMII I/O port 210 and a XGMII I/O port 212. The MAC may be considered the end point of the universal interface. In this example embodiment, MII/GMII I/O port 210 is capable of receiving and transmitting data at 10 Mb/s, 100 Mb/s and 1 Gb/s. The XGMII port 212 is capable of receiving and transmitting data a rate of 10 Gb/s. In other embodiments other rates than these may be implemented or specified.

The rate adaptation module 214 may also be configured as hardware, software, or a combination of both and be configured to adapt the rate of lower speed data up to a higher rate, such as GMII 1 Gb/s rate. The MII/GMII I/O port 210 connects the MAC 208 to a rate adaptation module 214 which is configured to adapt the variable rate from the MAC 208 to a constant rate of 1 Gb/s. At a rate of 1 Gb/s, the rate adaptation module 214 connects to a GMII encapsulation/recovery module 216. The GMII encapsulation/recovery module 216 up converts data received from the rate adaptation module 214 at 1 Gb/s to a rate of 10 Gb/s, which is in turn provided to a multiplexer 220. GMII data is used to create small packets or frames to be transmitted across the XGMII and may be padded with zeros or other pad data.

Conversely, data received from the multiplexer 220 at a rate of 10 Gb/s is converted to a 1 Gb/s rate by the GMII encapsulation/recover module 216. The multiplexer 220 also receives data without rate conversion from the MAC 208 via the XGMII I/O port as shown. The input and output from the multiplexer 220 on the MAC 208 side occurs over 36 parallel conductors at a rate of 10 Gb/s, but in other embodiments, other rates may be utilized. The path between the rate adaptation module 214 and the GMII encapsulation/recovery module 216 may comprise any type path, but in this embodiment comprises 12 parallel conductors.

Also connecting to the multiplexer 220 on the MAC 208 side is an ordered set generation and detection unit 224 which is configured to communicate with the multiplexer as shown. The ordered set generation and detection unit 224 monitors and/or generates ordered sets from the MAC 208 or the multiplexer 220, or any higher layer. The higher layer may mean any layer in the OSI model or from an application or user input. In one embodiment, the ordered set generation and detection unit 224 both sends and detects received ordered sets.

Orders sets comprise data utilized to control operation of the MAC, PHY, and/or the UGMII module. The ordered sets may be considered as control data that establish the link characteristics and may set the rate of data exchange. In one embodiment, ordered sets are not exchanged during data mode.

The ordered set generation and detection unit 224 also communicates with the mode selection unit 228. The mode selection unit 228 provides a control input to the multiplexer 220 to selectively control which sets of input/output channels to use for communication during operation. For example, if the PHY is set to operate at 10M, 100M, or 1 G, then the mode selection unit 228 will force the multiplexer 220 to use the I/O ports corresponding to the MAC I/O ports 210. Alternatively, if the rate is set at 10 Gb/s then the multiplexer 220 will be forced to utilized the I/O ports associated with the MAC 208 ports 212. In one embodiment, the mode selection unit 228 is configured to report the detection of ordered sets back to the MAC 208, but it could alternatively be done by the ordered set generation/detection unit 224. It is also possible for control data or ordered sets to be exchanged via a status line from the mode selection unit 228 to the MAC 208. In one implementation the MAC 208 would set the MUX 220 by configuring the mode selection unit 228. However, a more complex design could allow the mode selection unit 228 to set the MUX 220 based on mode setting from the MAC 208 and the detection of ordered sets

The multiplexer I/O port 240 operates a 10 Gb/s and may optionally communicate with an optional extension sublayer 244 or directly with a PHY. The optional extension sublayer 244 may be utilized to extend the distances between the MAC 208 and the PHY.

FIG. 3 is a block diagram of an example embodiment of a UGMII system as disclosed herein connected to another UGMII system via a XGMII connection. As compared to FIG. 2, identical or similar elements are labeled with identical reference numbers. This figure illustrates the UGMII interface system interfacing a PHY and a MAC to enable operation at any rate between 10M to 10 G. In this embodiment, it is shown that two UMGII modules may be linked to provide rate adaptive connectivity between a MAC 208 and a PHY 250. An extension sublayer may be placed between the multiplexers 220 to extend the operational distance between the MAC 208 and the PHY 250.

In this example embodiment another aspect of the invention is data up sampling which is discuss in connection with FIG. 4. In this embodiment, data up sampling comprises the conversion from a data bit rate of 10 or 100 megabits per second to a bit rate of 1000 megabits per second through the repetition of data bytes. Data encapsulation will be performed on the equivalent implementation of GMII for 10/100/1000 PHYs operating at 125 MHz. For PHYs operating lower than 1000 Mbps data upsampling may be performed prior to encapsulation. For operation in 100 Mbps mode every octet in a frame is repeated 10 times. For operation in 10 Mbps mode every octet in a frame is repeated 100 times. At the far end of the UGMII after the GMII is reconstructed the octets will be downsampled by 10 for 100 Mbps operation or by 100 for 10 Mbps operation. In this discussion, octets are utilized as a unit of data, but in other embodiments, other data units may be utilized.

Up sampling can be replaced by one of several other means for rate adaptation including idle stuffing between data bytes. FIG. 4 illustrates one example method of transmit side rate adaptation. In FIG. 4 at a step 404, the rate adaptation system determines the rate of operation. This may by any rate, but in this example embodiment comprises a rate selected from 10M, 100M, 1 G, and 10 G. At a step 408 the operation receives an octet of information from the MAC via the GMII or MII, in the case of the rate being selected at 10M, 100M, or 1 G. In other embodiments, the data may be received in units other than octets.

After receipt and at step 412, the operation up samples the octet one time, ten times, or one hundred times for the rates of 1 G, 100M or 10M respectively. For example, to create a data rate of 1 G from a 10M receive rate, up sampling occurs at a rate of 100 times. Up sampling may occur by repeating the received octet or padding with created pad bits. Thereafter, at step 416, the operation passes the up sampled octets to the encapsulation block at a rate of 1 G. As a result, data received at a variable rate is output at a constant rate of 1 G.

FIG. 7 illustrates one example method of receiver side rate adaptation. The operation of FIG. 7 is similar to the operation of FIG. 4. However, instead of up sampling, down sampling occurs. In FIG. 7, at a step 704, the operation establishes a data output rate or rate of operation. Then at step 708, the adaptation module receives the data. At a step 712, the adaptation module accumulates groups of Y octets from the receiver GMII extraction block. In this embodiment, the variable Y may comprise 1, 10, or 100 for 1 G, 100 m or 10M data rates respectively. In other embodiment Y may comprise other numeric values. After accumulation of Y number of octets, the operation advances to step 716 and passes the first octet in the group of Y octet to the MAC via the GMII/MII at a rate of 1 G, 100M, or 10M. In this manner, the operation down converts data received at a rate of 1 G to an adaptive output rate.

Another aspect of the invention is GMII encapsulation. FIG. 5 illustrates an example method of encapsulation. In this embodiment, GMII encapsulation comprises the operation of generating a data frame for transport across the XGMII and/or extension sublayer using data presented at the GMII. FIG. 5 illustrates one example method of transmit side data encapsulation. In this example embodiment, at a step 504, the encapsulation module accumulates a group of N octets from the transmit rate adaptation block. Thereafter at step 508, the encapsulation module generates a data frame of X byes that encapsulates the N octets plus additional octets of pad and or control octets. In one embodiment, N equals 2. In other embodiments other frame generation and padding schemes may be implemented. Then, at a step 512, the operation passes the data frame to the multiplexer at the XGMII rate followed by an interframe gap. The interframe gap may comprise at least 12 octets, which is the minimum interframe gap size defined in IEEE 802.3 Clause 46. The data frame will depend on the value of N. For N equal two, two octets from GMII would be encapsulated creating a data frame that is 8 bytes. Those 8 bytes would include the start character, which can be followed by the terminate character and 11 idle bytes. It is contemplated that part of the encapsulation operation comprises a change in format and not only a change in rate. In this embodiment, the data input to the encapsulation module is at a rate of 1 G (GMII), and output at a rate of 10 G (UGMII).

GMII is defined in Clause 35 of IEEE STD 802.3-2005, Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications, December 2005, which is incorporated herein in its entirety. In this example embodiment disclosed herein, the MAC transmits to the PHY using data signals TXD<7:0>, transmit enable TX_EN, and transmit error TX_ER. The PHY transmits to the MAC using data signals RXD<7:0>, data valid RX_DV, receive error RX_ER, and carrier sense CRS. In other embodiments different MAC transmit schemes may be utilized. In one embodiment, encapsulation is performed on a block of N GMII transfers (octets) and generates multiple XGMII transfers.

On the transmit side of the MAC N (for N>1) octets of data, TXD(0)<7:0> to TXD(N−1)<7:0>, along with control signals, TX_EN(0:N−1) to TX_ER(0:N−1), are encapsulated within a very short data frame. This frame contains X bytes including the start symbol, /S/, and is at least 8 bytes (the smallest frame supported by the 10GBASE-R PCS). The data frame is followed by an inter-frame gap (IFG) of at least 12 bytes including the terminate symbol, /T/. For N=2, the total encapsulation requires 20 bytes, the equivalent of 2 GMII or 5 XGMII transfers.

Optionally, the remaining bytes in the encapsulation frame may contain management data exchanges that allow for reading and writing of Clause 22 management registers.

At the PHY transmit input, the short frame is received and the N GMII octets are reconstructed (from UGMII rate) along with control signals and presented to the PHY as GMII signals. FIG. 6 illustrates one example method of operation of the PHY side data extraction. In operation, in this embodiment the method of extraction shown in FIG. 6 extracts data received at a XGMII rate (10 Gb/s) to generate an output at a GMII rate (1 Gb/s). At a step 604 the recovery module (element 216 in FIG. 2) receives a data frame from the MUX at a XGMII rate. During or after receipt of the data, the operation detects the first N octets of data. This occurs at step 608 and the value of N may be any number. At step 612, the operation extracts the first N octets of data and may optionally discard the remaining octets of data. The portions which may be discarded my include padding and interframe gap. Thereafter, at a step 616, the operation passes the first N octets to the rate adaptation block. It is contemplated that in this embodiment the output is at a rate of 1 Gb/s.

In addition, the remaining information within the data frame may be discarded at step 612. During the idle periods, Idle columns, ∥I∥, may be deleted or inserted for clock rate matching purposes as defined in IEEE STD 802.3-2005, Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications, December 2005.

On the receive side of the PHY the GMII rate adaptation and encapsulation operations are performed similar to those performed on the MAC TX path.

At the MAC receive input, the short encapsulation frame is received and the N GMII octets are reconstructed along with control signals and presented to the MAC as GMII signals. Additional information within the frame may be discarded. During the idle periods (interframe gap) Idle columns, ∥I∥, may be deleted or inserted for clock rate matching purposes as defined in IEEE STD 802.3-2005, Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications, December 2005. In one embodiment Clause 45 management may occur across the XGMII.

When placed in Clause 45 management mode UGMII may be configured to allow the MAC/host to access management registers across the XGMII or extension. This mode may use ordered sets or short frames to encapsulate the host management interface (MDIO) between the host and PHY.

The UGMII has many advantages and distinctions over prior art system. On such distinction of the invention is that is enables a multi-rate interface between MAC and PHY for 10 G Ethernet capable PHYs.

In various embodiment this invention enables:

• • Encapsulation and transport of the 10/100/1000 MII/GMII interface across a 10 G interconnect.
  • Operation in full duplex and half duplex modes.
  • Auto-negotiation of operating mode: either XGMII at 10 Gbps or UGMII operating at 10, 100, or 1000 Mbps
  • Use of defined 10 G physical coding sublayers (PCS), which may also be referred to as extension sublayers, without modification. The extension sublayers may be optionally used to extend reach.

Additional advantages of further aspects of the invention are the access to Clause 22 and Clause 45 management registers in the PHY using the same 10 G interface. The separate signals MDC and MDIO, defined by IEEE 802.3, are not required.

One benefit of the invention described herein is the ability to interface a MAC to a 10/100/1000/10 G PHY (or any subset thereof) using a single 2 signal (4-pin) XFI interface, enabling greater port density per MAC IC. The XFI interface is shown in FIG. 1B and is designated by a multi-source agreement defining a small form factor configuration for a two signal interface between a MAC and PHY.

APPENDIX A SUPPLEMENT

Table of Contents

Introduction—Overview

Functional Specification

Modes of Operation

Data Upsampling

GMII Encapsulation

Clause 22 Management exchanges

Clause 45 Management

UGMII Mode Selection

Electrical Specification

Applicable Documents

Abbreviations

Disclosed herein is a new interface, the Ultra-serial Gigabit Media Independent Interface (UGMII), for the purpose of connecting a PHY operating in 10/100/1000 mode to a 10 G capable MAC using a 10 G defined interface. This interface may be XGMII (74 signals), XAUI (8 signals), or 10GBASE-R/XFI (2 signals).

UGMII is designed to support one or more of the following:

Encapsulation and transport of the 10/100/1000 MII/GMII interface across a 10 G interconnect.

Operation in full duplex and half duplex modes.

Auto-negotiation of operating mode: either XGMII at 10 Gbps or UGMII operating at 10, 100, or 1000 Mbps

Use of defined 10 G physical coding sublayers (PCS) without modification

An additional capability of UGMII may be access to Clause 22 and Clause 45 management registers in the PHY using the same 10 G interface. Thus, in one embodiment MDC and MDIO are not required.

One benefit of UGMII is the ability to interface MAC to a 10/100/1000/10 G PHY (or any subset thereof) using a single 2 signal (4-pin) XFI interface, which in turn enables greater port density per MAC IC.

Overview

UGMII defines a protocol for the transport of the GMII defined by Clause 35 of [1] over any Ethernet 10-gigabit interface. The purpose of UGMII is to allow a 10 G capable MAC to operate with a multi-rate 10 G PHY using minimal interconnect. For the greatest reduction in interconnect, it is expected that UGMII will be used with a 10GBASE-R PCS across an XFI (10 G serial interface) operating at 10.3125 Gbps, thus requiring only 2 differential pair signals on 4 pins.

An example system utilizing UGMII is shown in the figures provided herewith. UGMII is defined at the XGMII (if implemented) such that any defined extension such as XGXS/XAUI (Clause 48 of [1]), or PCS such as 10GBASE-R over XFI may be used as the interface between MAC and PHY.

In UGMII the defined signals for GMII may be fully encapsulated without modification, transported across the (extended) XGMII interface and reconstructed at the MAC RX and PHY TX inputs.

In the example embodiment described herein, selection of UGMII and XGMII operating modes are negotiated between the MAC and PHY using ordered sets to announce and acknowledgement a mode change.

Modes of Operation

A device incorporating UGMII may be configured to support the following interface modes:

• XGMII: Operates as defined in [1]
• GMII Encapsulation: perform encapsulation and transport of GMII interface signals
• Clause 22 management: perform management register read and write operations across the XGMII or extension
• Clause 45 management: perform management register read and write operations across the XGMII or extension
  Data Upsampling

Data encapsulation may be performed on the equivalent implementation of GMII for 10/100/1000 PHYs operating at 125 MHz. For PHYs operating lower than 1000 Mbps data upsampling can be performed prior to encapsulation.

For operation in 100 Mbps mode every octet in a frame can be repeated 10 times. For operation in 10 Mbps mode every octet in a frame can be repeated 100 times.

At the far end of the UGMII, after the GMII is reconstructed, the octects will be downsampled by 10 for 100 Mbps operation or by 100 for 10 Mbps operation.

GMII Encapsulation

GMII is defined in Clause 35 of [1]. The MAC transmits to the PHY using data signals TXD<7:0>, transmit enable TX_EN, and transmit error TX_ER. The PHY transmits to the MAC using data signals RXD<7:0>, data valid RX_DV, receive error RX_ER, and carrier sense CRS.

In this example embodiment, encapsulation is performed on a block of 2 GMII transfers (octets) and generates multiple XGMII transfers.

On the transmit side of the MAC two octets of data, TXD₀<7:0> and TXD₁<7:0>, along with control signals, TX_EN_0-1 and TX_ER_0-1, are encapsulated within a very short data frame. In this embodiment, this frame contains 8 bytes including the start symbol, /S/, and represents the smallest frame supported by the 10GBASE-R PCS. The data frame is followed by the minimum interframe gap (IFG) of 12 bytes including the terminate symbol, /T/. In this embodiment, the total encapsulation requires 20 bytes, the equivalent of 2 GMII or 5 XGMII transfers.

In one example embodiment, the first byte of the frame following /S/ contains the control signal information and can be constructed as: D1<7:0>=0 0 0 0 TX_ER₁ TX_ER₀ TX_EN₁ TX_EN₀. The next two bytes may be configured to carry the data: D2<7:0>=TXD₀<7:0> and D3<7:0>=TXD₁<7:0>. Optionally, the remaining four bytes, D4 to D7, may contain management data exchanges that allow for reading and writing of Clause 22 management registers.

At the PHY transmit input, the short frame is received and the two GMII octets are reconstructed along with control signals and presented to the PHY as GMII signals. Additional information within the frame may be discarded. During the idle periods Idle columns, ∥I∥, may be deleted or inserted for clock rate matching purposes.

On the receive side of the PHY the process may be similar to the MAC TX encapsulation. Thus, two octets of data, RXD₀<7:0> and RXD₁<7:0>, along with control signals, RX_DV_0-1 and RX_ER_0-1, may be encapsulated within an 8-byte data frame. A minimum interframe gap follows the data frame.

In this example embodiment, the first byte of the frame following /S/ contains the control signal information and is constructed as: D1<7:0>=0 0 0 0 RX_ER₁ RX_ER₀ RX_DV₁ RX_DV₀. The next two bytes may carry the data: D2<7:0>=RXD₀<7:0> and D3<7:0>=RXD₁<7:0>. Optionally, the remaining four bytes, D4 to D7, may contain management data exchanges that allow for reading and writing of Clause 22 management registers.

At the MAC receive input, the short frame is received and the two GMII octets are reconstructed along with control signals and presented to the MAC as GMII signals. Additional information within the frame may be discarded. During the idle periods, Idle columns, ∥I∥, ma be deleted or inserted for clock rate matching purposes.

Table 1, which follows, illustrates one example encapsulation process.

TABLE 1
Encapsulation of GMII
XGMII group	Byte 0	Byte 1	Byte 2	Byte 3
0	/S/	D1	D2	D3
1	D4	D5	D6	D7
2	/T/	/I/	/I/	/I/
3	/I/	/I/	/I/	/I/
4	/I/	/I/	/I/	/I/

Clause 22 Management Exchanges

It is further contemplated that the MAC/host may access Clause 22 management register through exchanges with the PHY using the last 4 bytes (or other bytes) of the GMII encapsulation frame. In other embodiments, Clause 22 Management Exchanges may occur in a different manner.

Clause 45 Management

It is further contemplated that when placed in Clause 45 management mode UGMII may allow the MAC/host to access management registers across the XGMII or extension.

In addition, various embodiments may use ordered sets or short frames as above. One potential downside to this arrangement is an inability to access management registers if UGMII is not operating or has a fault. It is contemplated that the UGMII system may be configured to access management registers even during data transmission.

UGMII Mode Selection

In the embodiment disclosed herein, the MAC selects UGMII modes of operation by sending ordered sets across XGMII or its extension.

To place the PHY in any (any particular) mode, the MAC may send an ordered set of /Q/ D1 D2 D3 with D1=96, D2=0 and D1 D3 set according to Table 2. When they the PHY receives one of these ordered sets, it replies with the same ordered set, but sets D2=D3 as an acknowledgement. Upon acknowledgement the MAC stops sending the ordered sets. After detecting the absence of the ordered set from the MAC, the PHY may be configured to stop sending ordered sets and begins operating in the new mode. The MAC then begins operation in the new mode and may begin transmitting data.

TABLE 2
Ordered Sets for UGMII Mode Change
	UGMII Mode	D0	D1	D2	D3
	XGMII	/Q/	96	0/AA	AA
	GMII	/Q/	96	0/55	55
	Encapsulation
	Clause 45	/Q/	96	0/66	66
	Management

The following documents are incorporated by reference in their entirety herein.

IEEE STD 802.3-2005, Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications, December 2005. This reference is hereby incorporated by referenced in its entirety.

IEEE Standard 802.3an-2006, Amendment 1: Physical Layer and Management Parameters for 10 Gb/s Operation—Type 10GBASET. This reference is hereby incorporated by referenced in its entirety.

The following abbreviations are used herein and defined as set forth below.

• GMII Gigabit Media Independent Interface: IEEE defined interface between the 1 G PHY and the MAC
• MDIO Management Data Input/Output Interface
• MII Media Independent Interface: IEEE defined interface between the 10/100 PHY and the MAC.
• MMD MDIO Manageable Device
• RS Reconciliation Sublayer
• XAUI Ten Gigabit Attachment Unit Interface
• XGMII Ten Gigabit Media Independent Interface
• UGMII Refers to the encapsulation of GMII over a 10 G link proposed in this document

While various embodiments of the invention have been described, it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible that are within the scope of this invention. In addition, the various features, elements, and embodiments described herein may be claimed or combined in any combination or arrangement.

Claims

1. A rate adaptive interface configured to interface a mac media access control (mac) device of a network device with a PHY physical layer (PHY) device of the network device, the rate adaptive interface comprising:

a rate adaptation media independent interface module in communication with a the mac device implemented in one or both of circuitry and software, the rate adaptation media independent interface module configured to:

receive fixed rate data at a first fixed rate from a first mac port and variable rate data at a variable rate selected from 10 Mb/s, 100 Mb/s, and 1 Gb/s; from a second mac port,

process the variable rate data to a the first fixed rate of 1 Gb/s; to generate processed data at the first fixed rate,

output the fixed rate data or the processed data at a the first fixed rateof 1 Gb/s; and

an encapsulation/recovery module configured to receive the data at a rate of 1 Gb/s from the rate adaptation module, and encapsulate the data at a rate of 1 Gb/s to generated data at a rate of 10 Gb/s;

a multiplexer configured to receive the fixed rate data at a rate of 10 Gb/s from the encapsulation/recovery module or to received receive the processed data from a mac device at a rate of 10 Gb/s and selectively output the fixed rate data or the processed data at a the fixed rate of 10 Gb/s responsive to a mode selection control signal;

a mode selection module configured to control the multiplexer based on control input from a higher layer device; and

wherein the media independent interface module includes an ordered set generation and detection module in communication with the multiplexer and the mode selection module implemented in one or both of circuitry and software, the ordered set generation and detection module configured to detect ordered setswhich, wherein the ordered sets include (i) ordered sets that announce a operational mode change wherein the ordered set generation and detection module is in communication with the mode selection module changes corresponding to changes in data rate and are communicated in-band from the mac device to the PHY device and from the PHY device to the mac device, and (ii) ordered sets that acknowledge the operational mode changes and are communicated in-band from the mac device to the PHY device and from the PHY device to the mac device.

2. The system rate adaptive interface of claim 1 21, wherein the encapsulation/recovery module is further configured to recover encapsulated data thereby changing the data rate from a 10 G data rate to a 1 G data rate.

3. The system rate adaptive interface of claim 1 21, wherein the mode selection module adjusts the data rate of operation between 10 Mb/s, 100 Mb/s, or 1 Gb/s.

4. The system rate adaptive interface of claim 1 21, wherein the encapsulation/recovery module is further configured with an input to receive data at a rate of 10 Gb/s and perform recovery thereon to output the data at a rate of 1 Gb/s.

5. A rate adaptive interface for use in a network device, the interface comprising:

A mac a media access control (mac) device configured to output variable rate data from a first port at a variable first rate and fixed rate data from a second port at a fixed second rate;

a rate adaptation media independent interface module, implemented in one or both of circuitry and software, and configured received to (i) receive the variable rate data from the mac device at the variable first rate and (ii) convert the variable rate data at the variable first rate to processed data at the second a fixed third rate; and

an encapsulation module configured to receive the processed data at the second fixed third rate from the rate adaptation module and convert the processed data at the second fixed third rate to processed data at a third the fixed second rate;

a switch configured to interface with the encapsulation module and the mac device to receive data at a rate of 10 Gb/s the fixed second rate from either the encapsulation module or from the second port of the mac device and output the data at a rate of 10 Gb/s the fixed second rate, the switch controlled by a mode selection control signal;

a mode selection module configured to provide the mode selection control signal to the switch to thereby control operation of the switch;

an ordered set generation and detection module, implemented in one or both of circuitry and software, and configured to generate and detect ordered sets, wherein the ordered sets include (i) ordered sets that announce operational mode changes corresponding to changes in data rate and are communicated in-band from the mac device to the PHY device and from the PHY device to the mac device, and (ii) ordered sets that acknowledge the operational mode changes and are communicated in-band from the mac device to the PHY device and from the PHY device to the mac device.

6. The rate adaptive interface of claim 5 31, further comprising an extension sublayer configured to receive data at a rate of 10 Gb/s from the switch, wherein the extension sublayer extends the distance which the data at a rate of 10 Gb/s may be transmitted.

7. The rate adaptive interface of claim 5 31, further comprising an wherein the ordered set generation and detection module (i) is configured to interface with the switch to detect ordered sets which determine a mode change, wherein the ordered set generation and detection module and (ii) is in communication with the mode selection module.

8. The rate adaptive interface of claim 5 31, wherein the encapsulation module is further configured to recover encapsulated data thereby changing the data rate from a 10 G data rate to a 1 G data rate.

9. The rate adaptive interface of claim 5 31, wherein data at the variable first rate comprises data at a rate of 10 Mb/s, 100 Mb/s, or 1 Gb/s, and data at the second third rate comprises data at a rate of 1 Gb/s, and data at the third second rate comprises data at a rate of 10 Gb/s.

10. The rate adaptive interface of claim 5 31, wherein data at the third second rate has a format that is different than the data at the second third rate.

11. The rate adaptive interface of claim 5 31, wherein the switch comprises a multiplexer.

12. The rate adaptive interface of claim 5 31, further comprising a the PHY device device, and wherein the PHY device is configured to receive data at a rate of 10 Gb/s from the switch.

13. The rate adaptive interface of claim 5 31, wherein the first port and the second port comprise input/output ports and the switch is configured to receive and transmit data to either of the second port of the mac device or the encapsulation module.

14. A method for interfacing a multirate mac media access control (mac) device in a network communication device with a PHY physical layer (PHY) device in a the network communication device, the method comprising:

outputting unprocessed i) variable rate data from the multirate mac device at a variable rate to a rate adaptation media independent interface module, the media independent interface module implemented in one or both of circuitry and software, or ii) fixed rate data at a first fixed rate to a multiplexer;

processing the data at the rate adaptation media independent interface module to up-convert the data at a the variable rate to data at a second fixed rate;

processing the data at the second fixed rate with an encapsulation module to generate processed data at the first fixed rate;

receiving, at a the multiplexer, the unprocessed fixed rate data from the mac device at the first fixed rate or the processed data at the first fixed rate;

receiving, at the multiplexer, a mode selection signal and responsive to the mode selection signal, outputting from the multiplexer the unprocessed data at the first rate or the processed data at the first rate;

detecting, with an ordered set generation and detection module of the media independent interface module, ordered sets communicated in-band from the mac device to the PHY device and from the PHY device to the mac device, wherein the ordered sets include (i) ordered sets that announce operational mode changes corresponding to changes in data rate, and (ii) ordered sets that acknowledge the operational mode changes.

15. The method of claim 14 41, wherein the variable rate consists of 10 Mb/s, is selected from a set of rates that includes 100 Mb/s and 1 Gb/s.

16. The method of claim 14 41, wherein the first fixed rate comprises 10 Gb/s and the second fixed rate comprises 1 Gb/s.

17. The method of claim 14 41, wherein processing the data at the second fixed rate with an encapsulation module further comprise altering the format of the data.

18. The method of claim 14 41, further comprising outputting the data from the multiplexer to an extension sublayer, a the PHY device, or a second multiplexer.

19. The method of claim 14 41, wherein up-sampling processing the data at the rate adaptation module comprises padding or repeating data received at the variable rate to create data at a the second fixed rate.

20. The method of claim 14 41, further comprising:

establishing a mode of operation;

receiving data at the first fixed rate at the multiplexer from a the PHY device, an extension sublayer, or a second multiplexer;

responsive to the mode of operation, outputting the data at the first fixed rate to either the mac device or to a recovery unit;

responsive to the outputting the data at the first fixed rate to a recovery unit, converting the data at the first fixed rate to the second fixed rate;

converting the data at the second fixed rate to data at a third fixed rate, wherein the data at the third fixed rate is a rate selected from a group of variable rates;

outputting the data at the third fixed rate to the mac device.

21. The rate adaptive interface of claim 1, wherein

the media independent interface module includes a rate adaptation module in communication with the mac device,

the rate adaptation module is configured to receive the variable rate data at a rate selected from a set of rates that includes 100 Mb/s and 1 Gb/s and output fixed rate data at a second fixed rate,

the first fixed rate is 10 Gb/s, and

the media independent interface module further comprises:

an encapsulation/recovery module configured to receive the fixed rate data at the second fixed rate from the rate adaptation module, and encapsulate the data at a rate of 1 Gb/s to generated data at a rate of 10 Gb/s,

a mode selection module configured to control the multiplexer based on control input from a higher layer device;

wherein the ordered set generation and detection module is in communication with the multiplexer and the mode selection module.

22. The rate adaptive interface of claim 1, wherein the first fixed rate is 10 Gb/s.

23. The rate adaptive interface of claim 1, wherein the variable rate is selected from a set of rates that includes 10 Mb/s, 100 Mb/s, 1 Gb/s, and 10 Gb/s.

24. The rate adaptive interface of claim 1, wherein the variable rate is selected from a set of rates that includes 100 Mb/s, 1 Gb/s, and 10 Gb/s.

25. The rate adaptive interface of claim 1, wherein the media independent interface module is configured to repeat data units in the data as part of processing the data to the fixed rate.

26. The rate adaptive interface of claim 25, wherein the media independent interface module is configured to repeat octets in the data.

27. The rate adaptive interface of claim 1, wherein the media independent interface module is configured to perform idle stuffing between data units as part of processing the data to the first fixed rate.

28. The rate adaptive interface of claim 1, wherein the media independent interface module is configured to output the data at the fixed rate via a standardized interface.

29. The rate adaptive interface of claim 28, wherein the standardized interface is the 10-gigabit media independent interface (XGMII).

30. The rate adaptive interface of claim 28, wherein the media independent interface module further comprises an extension sublayer module configured to:

receive data at the first fixed rate via the standardized interface, and

serialize data received via the standardized interface into one or more lanes.

31. The rate adaptive interface of claim 30, wherein the extension sublayer module is configured to serialize data received via the standardized interface into a plurality of lanes.

32. The rate adaptive interface of claim 5,

wherein the media independent interface module includes:

a rate adaptation module configured to (i) receive the variable rate data from the mac device at the variable first rate and (ii) convert the variable rate data at the variable first rate to the processed data at the fixed third rate.

33. The rate adaptive interface of claim 5, wherein the fixed third rate is 10 Gb/s.

34. The rate adaptive interface of claim 5, wherein the variable first rate is selected from a set of rates that includes 10 Mb/s, 100 Mb/s, 1 Gb/s and 10 Gb/s.

35. The rate adaptive interface of claim 5, wherein the variable first rate is selected from a set of rates that includes 100 Mb/s, 1 Gb/s and 10 Gb/s.

36. The rate adaptive interface of claim 5, wherein the media independent interface module is configured to repeat data units in the data as part of converting the data at the variable first rate to data at the second rate.

37. The rate adaptive interface of claim 36, wherein the media independent interface module is configured to repeat octets in the data.

38. The rate adaptive interface of claim 5, wherein the media independent interface module is configured to perform idle stuffing between data units as part of converting the data at the variable first rate to data at the second rate.

39. The rate adaptive interface of claim 5, wherein the media independent interface module is configured to output the data at the third fixed rate via a standardized interface.

40. The rate adaptive interface of claim 39, wherein the standardized interface is the 10-gigabit media independent interface (XGMII).

41. The rate adaptive interface of claim 39, wherein the media independent interface module further comprises an extension sublayer module configured to:

receive data at the third fixed rate via the standardized interface, and

serialize data received via the standardized interface into one or more lanes.

42. The rate adaptive interface of claim 41, wherein the extension sublayer module is configured to serialize data received via the standardized interface into a plurality of lanes.

43. The method of claim 14, further comprising:

outputting unprocessed data from the multirate mac device at the variable rate to a rate adaptation module of the media independent interface module or at the first fixed rate to a multiplexer;

processing the data at the rate adaptation module to up-convert the data at the variable rate to data at a second fixed rate;

processing the data at the second fixed rate with an encapsulation module to generate processed data at the first fixed rate;

receiving, at a multiplexer, the unprocessed data from the mac device at the first fixed rate or the processed data at the first fixed rate;

receiving, at the multiplexer, a mode selection signal and responsive to the mode selection signal, outputting from the multiplexer the unprocessed data at the first fixed rate or the processed data at the first fixed rate.

44. The method of claim 14, wherein the first fixed rate is 10 Gb/s.

45. The method of claim 14, wherein the variable rate is selected from a set of rates that includes 10 Mb/s, 100 Mb/s, 1 Gb/s and 10 Gb/s.

46. The method of claim 14, wherein the variable rate is selected from a set of rates that includes 100 Mb/s, 1 Gb/s and 10 Gb/s.

47. The method of claim 14, wherein processing the data at the media independent interface module includes repeating data units in the data as part of up-converting the data at the variable rate to data at the first fixed rate.

48. The method of claim 47, wherein repeating data units in the data comprises repeating octets in the data.

49. The method of claim 14, wherein processing the data at the media independent interface module includes performing idle stuffing between data units as part of up-converting the data at the variable rate to data at the first fixed rate.

50. The method of claim 14, further comprising outputting data at the first fixed rate via a standardized interface.

51. The method of claim 50, wherein outputting data at the first fixed rate via the standardized interface includes outputting data at the first fixed rate via the 10-gigabit media independent interface (XGMII).

52. The method of claim 50, further comprising:

providing, via the standardized interface, data at the first fixed rate to an extension sublayer module; and

serializing, with the extension sublayer module, data at the first fixed rate into one or more lanes.

53. The method of claim 52, wherein serializing data at the first fixed rate comprises serializing data at the first fixed rate into a plurality of lanes.