The chip resistor includes insulating substrate 10, first and second top electrodes (11x, 11b) on the top surface of the insulating substrate each on either longitudinal end thereof, and resistive element 12 electrically in contact with the top electrodes, wherein each of the top electrodes has, on its inner side facing to the other, cutout part 11a and protruding part 11b, with the cutout part in the first top electrode extending from at least one longitudinal side of the insulating substrate, transversely inwards thereof, and with the cutout part in the second top electrode arranged substantially point-symmetrically to the cutout part in the first top electrode with respect to the center of the insulating substrate, wherein the resistive element has contacting regions 12b, and non-contacting regions 12c, and trimming slot (53a, 53b) including a linear part.
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1. A rectangular chip resistor comprising:
an insulating substrate,
a pair of first and second top electrodes disposed on a top surface of the insulating substrate each on either longitudinal end thereof, and
a resistive element electrically in contact with said top electrodes,
wherein each of said first and second top electrodes has, on its inner side facing to the other, a cutout part and a protruding part protruding with respect to the cutout part, with said cutout part in the first top electrode extending from at least one of two longitudinal sides of the insulating substrate, transversely inwards of the insulating substrate, and with said cutout part in the second top electrode being arranged substantially point-symmetrically to said cutout part in the first top electrode with respect to a center of the insulating substrate,
wherein said resistive element has contacting regions each in contact with said first or second top electrode along the protruding part, and non-contacting regions each out of contact with said top electrodes along the cutout part, and
wherein said resistive element has a trimming slot including a linear part extending from at least one point on said non-contacting regions along a longitudinal direction of the insulating substrate,
wherein each protruding part of said first and second top electrodes is in a shape with two vertices, whereas said resistive element has contacting points in contact with said vertices, wherein said resistive element consists of a rectangular area enclosed by straight lines connecting said contacting points, and an area other than said rectangular area, wherein said area other than the rectangular area, which is out of contact with the first and second top electrodes, is a trimming-slot-forming area.
6. A method for producing a rectangular chip resistor, comprising:
(A) providing a pair of first and second top electrodes on a top surface of an insulating substrate each on either longitudinal end thereof,
(B) providing a resistive element in electrical contact with said first and second top electrodes, and
(C) forming a trimming slot in the resistive element for adjusting resistance,
wherein in said step (A), said first top electrode is formed so as to have, on its inner side facing to said second top electrode, a cutout part extending from at least one of two longitudinal sides of the insulating substrate, transversely inwards of the insulating substrate, and a protruding part protruding with respect to the cutout part, and said second top electrode is formed so as to have, on its inner side facing to said first top electrode, a cutout part arranged substantially point-symmetrically to said cutout part in the first top electrode with respect to a center of the insulating substrate, and a protruding part protruding with respect to the cutout part,
wherein in said step (B), said resistive element is provided in a shape having contacting regions each in contact with said first or second top electrode along the protruding part, and at least one non-contacting region for each top electrode out of contact therewith along the cutout part, and
wherein in said step (C), each protruding part of said first and second top electrodes is in a shape with two vertices, whereas said resistive element has contacting points in contact with said vertices, wherein said resistive element consists of a rectangular area enclosed by straight lines connecting said contacting points, and an area other than said rectangular area, wherein said area other than the rectangular area, which is out of contact with the first and second top electrodes, is a trimming-slot-forming area, wherein said trimming slot is formed in said trimming-slot-forming area to include a linear part extending from at least one point on the non-contacting regions of the resistive element along a longitudinal direction of the insulating substrate, by laser trimming from said at least one point.
2. The rectangular chip resistor according to
3. The rectangular chip resistor according to
5. The rectangular chip resistor according to
7. The method according to
8. The method according to
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This is the national stage of International Application PCT/JP2016/062724, filed Apr. 22, 2016.
The present invention relates to a rectangular chip resistor and a method for producing the same, in which current constriction caused by trimming slots that have been formed for adjustment of resistance, is suppressed, and which has excellent tolerance to overload, such as surge current.
For adjusting resistance of a chip resistor, there is widely known to form trimming slots in its resistive element. There are conventionally known, for example as shown in
In view of the above, there have been proposed various techniques for controlling the problems caused by such current constriction (see Patent Publications 1 to 4).
These prior art trimming slots, however, are formed linearly or in L-shape by first cutting out the slots at generally right angles to the direction of the current flowing through the resistive element, so that it is difficult to sufficiently suppress the current turbulence caused by the trimming slots.
Patent Publication 5 proposes to form a trimming slot by linearly cutting the resistive element in its longitudinal direction over its full length in parallel to the direction of the current flowing through the resistive element. According to this method, the trimming slot is required to be formed even into the electrodes adjacent to the resistive element, in order to inhibit microcracks which tend to form at the tip of the trimming slots. In this case, since the resistive element is not reliably cut out from the electrodes due to the trimming slot, it is difficult to precisely set the resistance during the formation of the trimming slots. In addition, the resistive element is completely divided by the trimming slot in the current-carrying condition, so that the smaller region of the divided resistive element may have risk of current load constriction.
It is an object of the present invention to provide a rectangular chip resistor in which current constriction caused by trimming slots is suppressed, and which has excellent tolerance to overload, such as surge current.
It is another object of the present invention to provide a method for producing a rectangular chip resistor, which allows excellently precise, and wide range of resistance setting, as well as easy and fine adjustment of resistance, resulting in efficient manufacturing of rectangular chip resistors in which current constriction caused by trimming slots is effectively suppressed and which have excellent tolerance to current overload.
It is another object of the present invention to provide a rectangular chip resistor and a method for producing the same, which allows sufficient suppression of adverse effects of current constriction due to microcracks generated during trimming of the resistive element, and current overload.
According to the present invention, there is provided a rectangular chip resistor comprising:
an insulating substrate,
a pair of first and second top electrodes disposed on a top surface of the insulating substrate each on either longitudinal end thereof, and
a resistive element electrically in contact with said top electrodes,
wherein each of said first and second top electrodes has, on its inner side facing to the other, a cutout part and a protruding part protruding with respect to the cutout part, with said cutout part in the first top electrode extending from at least one of two longitudinal sides of the insulating substrate, transversely inwards of the insulating substrate, and with said cutout part in the second top electrode being arranged substantially point-symmetrically to said cutout part in the first top electrode with respect to a center of the insulating substrate,
wherein said resistive element has contacting regions each in contact with said first or second top electrode along the protruding part, and non-contacting regions each out of contact with said top electrodes along the cutout part, and
wherein said resistive element has a trimming slot including a linear part extending from at least one point on said non-contacting regions along a longitudinal direction of the insulating substrate.
In the resistive element, at least two trimming slots may be formed, comprising a trimming slot including a linear part extending from at least one point on one non-contacting region on the side of the first top electrode along a longitudinal direction of the insulating substrate, and a trimming slot including a linear part extending from at least one point on one non-contacting region on the side of the second top electrode along a longitudinal direction of the insulating substrate. With two or more, i.e., a plurality of, trimming slots, the length of each trimming cut may be made shorter, which allows further reduction of current constriction and easy and fine adjustment of the resistance.
At least one of the trimming slots may be, for example, in an L-shape having said linear part extending along a longitudinal direction of the insulating substrate, and a subsequent bend extending from a tip of said linear part, transversely outwards of the insulating substrate. By allowing formation of trimming slots of such a shape, the resistance setting may be controlled over a wider range.
Each protruding part of the first and second top electrodes may be in the shape with two vertices, whereas the resistive element has contacting points in contact with these vertices. The resistive element may be divided into two virtual areas; a rectangular area enclosed by straight lines connecting these contacting points, and an area other than the rectangular area. The area other than the rectangular area, which is out of contact with the first and second top electrodes, may be a trimming-slot-forming area. By defining such a trimming-slot-forming area, trimming slots for setting the resistance may be formed still more easily and conveniently without causing turbulence of current in the rectangular area. Further, by adjusting the angle of one of the two opposite pairs of angles, sufficient flow of current may be secured in the rectangular area, the defect of current constriction at the trimming slots may sufficiently be alleviated, the resistance change ratio may be kept low against overload voltage even when the rated power of the resistor is high, and the limiting power may be increased.
According to the present invention, there is provided a method for producing a rectangular chip resistor, comprising:
(A) providing a pair of first and second top electrodes on a top surface of an insulating substrate each on either longitudinal end thereof,
(B) providing a resistive element in electrical contact with said first and second top electrodes, and
(C) forming a trimming slot in the resistive element for adjusting resistance,
wherein in said step (A), said first top electrode is formed so as to have, on its inner side facing to said second top electrode, a cutout part extending from at least one of two longitudinal sides of the insulating substrate, transversely inwards of the insulating substrate, and a protruding part protruding with respect to the cutout part, and said second top electrode is formed so as to have, on its inner side facing to said first top electrode, a cutout part arranged substantially point-symmetrically to said cutout part in the first top electrode with respect to a center of the insulating substrate, and a protruding part protruding with respect to the cutout part,
wherein in said step (B), said resistive element is provided in a shape having contacting regions each in contact with said first or second top electrode along the protruding part, and at least one non-contacting region for each top electrode out of contact therewith along the cutout part, and
wherein in said step (C), said trimming slot is formed to include a linear part extending from at least one point on the non-contacting regions of the resistive element along a longitudinal direction of the insulating substrate, by laser trimming from said at least one point.
In step (C), at least one trimming slot may be formed by laser trimming from said at least one point on the non-contacting regions along a longitudinal direction of the insulating substrate, and then by laser trimming in a direction bent transversely outwards of the insulating substrate. By forming a trimming slot along a longitudinal direction of the insulating substrate in this way, for example, generation of noise caused by microcracks formed at the bent portion or the like may be suppressed, and the change in resistance may be suppressed.
Further, a higher ratio of microcracks is oriented toward the longitudinal direction of the insulating substrate, so that the current constriction due to the generated microcracks and the effect of current overload may sufficiently be suppressed.
In step (C), in forming a plurality of trimming slots extending from a plurality of points on said non-contacting regions of the resistive element along the longitudinal direction of the insulating substrate, the trimming slots may be formed by laser trimming so as to partly overlap one on another along a trimming direction. By laser trimming in this way, trimming may be carried out while removing the cutting scrap from the resistive element generated in the previous trimming.
The rectangular chip resistor according to the present invention (sometimes referred to as the present resistor hereinbelow) has the above-mentioned configuration wherein, in particular, the region where the first and second top electrodes are in contact with the resistive element and the region where the electrode are out of contact therewith, are distinctly divided, and the resistive element has a trimming slot including a linear part extending along the longitudinal direction, and formed from at least one point on the non-contacting regions of the resistive element. Thus, sufficient area in the resistive element may be secured for the current flowing unaffected by the trimming slots, and even in the area having the trimming slots formed therein, the current constriction may be suppressed by bringing the direction of the trimming slots into general conformity with the current flow direction. Further, the length of the contacting regions of the resistive element in contact with the first or second top electrode, and the length of the non-contacting regions out of contact therewith, may suitably be controlled, and the length and the number of the trimming slots may be controlled, so that a wide range of desired resistance may be secured. Thus, with the above-mentioned configuration, the problem of current constriction due to trimming slots may be solved easier compared to the prior art, the tolerance to the overload current may be improved, the change in resistance may be suppressed sufficiently even at a higher rated power of the resistor, and the limiting power may be increased.
The production method according to the present invention has the above-mentioned configuration wherein, in particular, the cutout parts and the protruding parts are formed in step (A), and the contacting regions and the non-contacting regions are provided on the resistive element distinctly dividedly in step (B). Thus, sufficient area may be secured for the current flowing unaffected by the trimming slots, and the area in which the trimming slots are to be formed may be distinctly defined. In this way, precise control of the resistance setting is facilitated, the range of the resistance adjustment is widened, and the fine adjustment of the resistance is easily achieved. Further, the microcracks, which may be generated in the trimming in step (C), tend to be oriented toward the longitudinal direction of the insulating substrate, so that the current constriction due to the generated microcracks and the effect of current overload may sufficiently be suppressed.
Embodiments of the present invention will now be explained with reference to the attached drawings, which do not limit the present invention.
Referring to
Referring to
As used herein, “substantially point-symmetrically” means that not only the embodiments wherein the shapes of the first and second top electrodes are totally identical is encompassed, but also the embodiments wherein the shapes are generally the same is encompassed. For example, when the first and second top electrodes are formed by printing or the like means, even when the two electrodes are printed in the same shape in design, it is sometimes difficult to completely conform the shapes of the two electrodes due to some deformation. Further, it does not mean that the solution to the problem to be solved by the present invention is not achieved unless the first and second top electrodes are perfectly in the identical shape. Thus, the term “substantially point-symmetrically” means as discussed above, and the difference in shape between the first and second top electrodes may be tolerated as long as the problems to be solved by the present invention are solved.
Referring to
Referring to
Each of the two cutout parts 11a of each of the first and second top electrodes (11x, 11y) in
Referring to
Each of the two cutout parts 21a of each of the first and second top electrodes (21x, 21y) in
Referring to
Each of the two cutout parts 31a of each of the first and second top electrodes (31x, 31y) in
Referring to
The parallelogram area (41, 51, 61) is preferably an area in which the trimming slots are not formed, so that the flow of the current from the first and second top electrodes (11x, 11y) is not disturbed. Thus, by securing such an area extensively, the desired objects of the present invention are more easily achieved. In view of this, angle θ indicated in the figures is preferably 70° to 90°, more preferably 75° to 90°, most preferably 80° to 90°. By securing such an area (41, 51, 61) more extensively and employing the configuration to form the trimming slots in the particular direction in the trimming-slot-formed areas (42, 52, 62), the defects of current constriction at the trimming slots may be alleviated more sufficiently, the change in resistance may be kept still lower against overload voltage even when the rated power of the resistor is high, and the limiting power may be increased still more.
In the present resistor, for example as shown in FIG. 4, the trimming slots 43 start from the non-contacting region 12c, which is out of contact with the second top electrode 11y, and are formed in linear shape extending from the starting end, along the longitudinal direction of the insulating substrate 10, i.e., along the direction of the current flowing through the resistive element 12. Thus, the current constriction at the trimming slots 43 may be suppressed sufficiently.
According to the present resistor, the shape of the trimming slots may be selected from various shapes, as long as the shape includes a linear part extending along the longitudinal direction of the insulating substrate, and the number, length, width, and the like of the trimming slots may suitably be selected so as to form the slots in the above-mentioned predetermined locations for achieving the desired resistance.
An embodiment for illustrating the configuration of the present resistor and an embodiment of the production method of the present invention will now be explained with reference to the drawings, but the method of producing the present invention is not limited to the production method of the present invention.
On the under surface of the insulating substrate 80 are provided a pair of bottom electrodes 81z. The resistive element 82 is protected with a glass-type protective film 83a and a resin-type protective film 83b, as shown in the figure. Though not shown, the resistive element 82 is provided with trimming slots, as discussed with reference to
The first and second top electrodes (81x, 81y) and the bottom electrodes 81z are connected with end electrodes 84. The top, bottom, and end electrodes are coated with a nickel plated layer 85, which is coated with a tin plated layer 86 as overcoating.
The configuration illustrated in
The production method according to the present invention includes: (A) providing a pair of first and second top electrodes on the top surface of an insulating substrate each on either longitudinal end thereof, (B) providing a resistive element in electrical contact with the first and second top electrodes, and (C) forming a trimming slot in the resistive element for adjusting resistance. In the following, each step is explained with reference to an example wherein the cutout parts and the like are formed by screen printing, but formation by other means, such as laser patterning or etching, are also encompassed by the present invention.
In steps (A) and (B), the top electrodes and the resistive element may be formed on the insulating substrate by, usually, screen printing or the like means, so as to be in the desired shapes as discussed above.
In step (A), the first top electrode is formed so as to have, on its inner side facing to the second top electrode, a cutout part extending from at least one of the two longitudinal sides of the insulating substrate, transversely inwards of the insulating substrate, and a protruding part protruding with respect to the cutout part, whereas the second top electrode is formed so as to have, on its inner side facing to the first top electrode, a cutout part arranged substantially point-symmetrically to the cutout part in the first top electrode with respect to the center of the insulating substrate, and a protruding part protruding with respect to the cutout part. Here, the cutout parts have been explained to be formed by screen printing, but may alternatively be formed by laser patterning or etching, after the top electrodes are formed.
In step (B), the resistive element is provided in a shape having contacting regions each in contact with the first or second top electrode along the protruding part, and at least one non-contacting region for each top electrode out of contact therewith along the cutout part.
The desired shapes of the top electrodes and the resistive element formed in this way are as discussed above with reference to
In step (C), the trimming slot may be formed by a conventional manner, for example, laser cutting while the resistance is measured with probes in contact with the resistive element, as discussed above.
In step (C), the trimming slot is formed to include a linear part extending from at least one point on the non-contacting regions of the resistive element along the longitudinal direction of the insulating substrate, by laser trimming from the at least one point, as discussed above with reference to
According to the production method of the present invention, the present resistor may be produced by performing, in addition to steps (A) to (C), steps of, for example, forming bottom and end electrodes, protective films, and plated layers by conventional manners or the like, as discussed above with reference to
The present invention will now be explained in further detail with reference to examples, which however, do not limit the present invention.
Resistors as shown in
In Example 1-1 the angle θ in
The short time overload test was conducted on each resistor thus produced, by applying a voltage 2.5 times the rated voltage for 5 seconds, i.e., 14.14V on the resistor with the rated power of 0.1 W, 22.36 V on the resistor with the rated power of 0.25 W, 25.69 V on the resistor with the rated power of 0.33 W, and 28.28 V on the resistor with the rated power of 0.4 W, respectively, and measuring the maximum, minimum, and mean values of the resistance change ratio (ΔR/R). The results are shown in Table 1. The resistors exhibiting the resistance change ratio of within ±1.0% passed the test. Incidentally, the blanks in Table 1 mean incapable of measurement.
A resistor was produced in the same way as in Example 1-1, except that the top electrodes and the resistive element were those shown in
TABLE 1
Rated
Resistance
power
change ratio
Comp. Ex. 1
Ex. 1-1
Ex. 1-2
Ex. 1-3
(W)
ΔR/R (%)
—
θ = 70°
θ = 79°
θ = 87°
0.1
Max.
0.00
0.00
+0.01
0.00
Min.
−0.03
−0.01
−0.02
−0.03
Mean
−0.01
0.00
−0.01
−0.01
0.25
Max.
+0.22
+0.27
−0.09
−0.01
Min.
−0.10
−0.18
−0.14
−0.01
Mean
+0.02
−0.07
−0.11
−0.01
0.33
Max.
+0.47
+0.33
−0.03
Min.
−0.21
−0.31
−0.04
Mean
+0.21
+0.01
−0.03
0.4
Max.
+4.51
−0.05
Min.
+2.34
−0.07
Mean
+3.63
−0.06
The results shown in Table 1 indicate that the resistors of the present invention are excellent in tolerance to overload voltage even with higher rated powers, compared to the resistor of Comparative Example. It is also shown that this advantage is further improved in the present resistors at larger θ.
Resistors with a rated power of 0.1 W, 0.25 W, and 0.33 W, respectively, were produced in the same way as in Examples 1-1 to 1-3 and Comparative Example 1.
The intermittent overload test was conducted on each resistor thus produced, by performing 10000 cycles of application of a voltage 2.5 times the rated voltage for 1 second and non-application of a voltage for 25 seconds, and measuring the maximum, minimum, and mean values of the resistance change ratio (ΔR/R). The results are shown in Table 2. The resistors exhibiting the resistance change ratio of within ±1.0% passed the test. Incidentally, the blanks in Table 2 mean incapable of measurement.
TABLE 2
Rated
Resistance
power
change ratio
Comp. Ex. 2
Ex. 2-1
Ex. 2-2
Ex. 2-3
(W)
ΔR/R (%)
—
θ = 70°
θ = 79°
θ = 87°
0.1
Max.
+0.04
+0.03
+0.05
0.00
Min.
−0.06
0.00
−0.06
−0.03
Mean
0.00
+0.02
+0.02
−0.01
0.25
Max.
−0.02
−0.01
Min.
−0.06
−0.01
Mean
−0.04
0.00
0.33
Max.
+5.50
+0.20
Min.
+1.30
−0.03
Mean
+2.50
+0.03
The results shown in Table 2 indicate that the resistors of the present invention are more excellent in tolerance at larger θ even with higher rated powers in the intermittent overload test.
Resistors were produced in the same way as in Examples 1-1 to 1-3 and Comparative Example 1.
The resistors thus produced were measured of the one pulse limiting power (voltage V×application time t=limiting power (W)) by applying voltage V for application time 1 ms. The results are shown in Table 3. The limiting power was taken from those of the resistance change ratio of within ±1.0%.
TABLE 3
Application
Comp. Ex. 3
Ex. 3-1
Ex. 3-2
Ex. 3-3
time
—
θ = 70°
θ = 79°
θ = 87°
1 ms
Limiting
6.5
6.5
18
38
power
(W)
The results shown in Table 3 indicate that, in the resistors of the present invention, the limiting power may be increased by controlling the angle θ.
Resistors were produced in the same way as in Examples 1-1 to 1-3 and Comparative Example 1.
The current-noise test for fixed resistors was conducted on each resistor thus produced according to JIS C 5201-1 to measure the noise voltage generated by the resistor, and the maximum, minimum, and mean values of the noise voltage were obtained by calculation with predetermined formulae. Further, the noise from the maximum to minimum values was obtained. The results are shown in Table 4. The results are indicated as ratios of the noise voltage with respect to the applied direct-current voltage, and negative values with larger absolute values indicate better results.
TABLE 4
Resistance
change ratio
Comp. Ex. 4
Ex. 4-1
Ex. 4-2
Ex. 4-3
ΔR/R (%)
—
θ = 70°
θ = 79°
θ = 87°
Max.
−3.8
−11.3
−12.9
−22.0
Min.
−13.2
−13.5
−14.8
−23.4
Mean
−10.0
−12.6
−14.0
−22.9
Max − Min
9.4
2.2
1.9
1.4
The results in Table 4 indicate that the noise voltage is suppressed in the present resistors compared to that of the Comparative Example, and this trend is more significant particularly at larger angle θ.
Morita, Tomiharu, Nojiri, Yuusuke
| Patent | Priority | Assignee | Title |
| 11626219, | Jan 15 2021 | KOA Corporation | Chip resistor and method for manufacturing same |
| 11646136, | Apr 05 2021 | KOA Corporation | Chip resistor and method of manufacturing chip resistor |
| Patent | Priority | Assignee | Title |
| 5548269, | Nov 17 1993 | Rohm Co. Ltd. | Chip resistor and method of adjusting resistance of the same |
| 6084502, | Mar 11 1996 | Matsushita Electric Industrial Co., Ltd. | Resistor and method of making the same |
| 6107909, | Aug 27 1997 | MMC BIDDING, INC | Trimmed surge resistors |
| 7782174, | Sep 21 2005 | KOA Corporation | Chip resistor |
| 7940158, | Oct 13 2005 | ROHM CO , LTD | Chip resistor and its manufacturing method |
| 20050275503, | |||
| JP10189317, | |||
| JP2001203101, | |||
| JP2008305985, | |||
| JP2009141171, | |||
| JP444011987, | |||
| JP497501, | |||
| JP5243002, | |||
| JP6028209, | |||
| JP848011984, |
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