An apparatus includes an integrated circuit and a plurality of conducting wires disposed on the integrated circuit. The integrated circuit includes: (i) a signal generation circuit, which is configured to generate random signal and selection signal based on random or pseudo-random numbers, (ii) a transmitting circuit configured to select at least one from among the plurality of conducting wires based on the selection signal and to output the random signal through the at least one conducting wire, and (iii) a receiving circuit configured to detect an invasive attack on the integrated circuit based on signal received through the at least one conducting wire.
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13. An apparatus, comprising:
an integrated circuit having a plurality of conducting wires thereon, said integrated circuit comprising:
a signal generation circuit configured to generate a random signal and a selection signal based on random or pseudo-random numbers;
a transmitting circuit configured to select at least one of the plurality of conducting wires based on the selection signal, and output the random signal via the selected at least one of the plurality of conducting wires; and
a receiving circuit configured to detect an invasive attack on the integrated circuit based on a signal(s) received through the selected at least one of the plurality of conducting wires;
wherein the signal generation circuit comprises a first random number generator configured to periodically generate a first random number, and a second random number generator configured to generate a second random number based on the first random number; and
wherein the random signal and the selection signal are generated based on the second random number.
17. An apparatus, comprising:
an integrated circuit having a plurality of conducting wires thereon, said integrated circuit comprising:
a signal generation circuit configured to generate a random signal and a selection signal based on random or pseudo-random numbers;
a transmitting circuit configured to select at least one of the plurality of conducting wires based on the selection signal, and output the random signal via the selected at least one of the plurality of conducting wires; and
a receiving circuit configured to detect an invasive attack on the integrated circuit based on a signal(s) received through the selected at least one of the plurality of conducting wires;
wherein the plurality of conducting wires comprise a first group disposed on a first layer and a second group disposed on a second layer;
wherein the first group of conducting wires and the second group of conducting wires have the same pitch; and
wherein the first group of conducting wires is disposed in a center of adjacent conducting wires of the second group.
1. An apparatus, comprising:
an integrated circuit having a plurality of conducting wires thereon, which includes a plurality of first conducting wires, said integrated circuit comprising:
a signal generation circuit configured to generate a random signal and a selection signal based on random or pseudo-random numbers,
a transmitting circuit configured to select at least one of the plurality of conducting wires based on the selection signal, and output the random signal via the selected at least one of the plurality of conducting wires, said transmitting circuit comprising a first transmitting unit circuit configured to: (i) select one from amount the plurality of first conducting wires based on the selection signal, and (ii) output a first bit of the random signal through the selected one of the first conducting wires; and
a receiving circuit configured to detect an invasive attack on the integrated circuit based on a signal(s) received through the selected at least one of the plurality of conducting wires, said receiving circuit comprising a first receiving unit circuit configured to: (i) select one from among the plurality of first conducting wires based on the selection signal, and (ii) detect the invasive attack based on a bit signal received through the selected one of the first conducting wires.
2. The apparatus of
wherein the plurality of conducting wires comprise a plurality of second conducting wires;
wherein the transmitting circuit comprises a second transmitting unit circuit configured to select one from among the plurality of second conducting wires based on the selection signal, and output a second bit of the random signal through the selected one of the second conducting wires; and
wherein the receiving circuit comprises a second receiving unit circuit configured to select one from among the plurality of second conducting wires based on the selection signal, and detect the invasive attack based on a bit signal received through the selected one of the second conducting wires.
3. The apparatus of
wherein the transmitting circuit and the receiving circuit face each other in a first direction; and
wherein the first transmitting unit circuit, the first receiving unit circuit, the second transmitting unit circuit, and the second receiving unit circuit have the same length in a second direction perpendicular to the first direction.
4. The apparatus of
5. The apparatus of
wherein the receiving circuit further comprises a third receiving unit circuit and a fourth receiving unit circuit, which are disposed at both sides of the first receiving unit circuit to be adjacent to each other and to have the same structure as the first receiving unit circuit; and
wherein the first receiving unit circuit is configured to generate a second accumulated signal based on a first accumulated detection signal received from the third receiving unit circuit and the first detection signal and to provide the second accumulated detection signal to the fourth receiving unit circuit.
6. The apparatus of
wherein the first transmitting unit circuit is configured to select another one from among the plurality of first conducting wires based on the selection signal, and output an inverted bit signal of the first bit of the random signal through the other selected first conducing wire; and
wherein the first receiving unit circuit is configured to select another one from among the plurality of first conducting wires based on the selection signal, and detect the invasive attack further based on bit signal received through the other selected first conducing wire.
7. The apparatus of
8. The apparatus of
9. The apparatus of
10. The apparatus of
11. The apparatus of
12. The apparatus of
14. The apparatus of
15. The apparatus of
16. The apparatus of
18. The apparatus of
19. The apparatus of
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The application claims the benefit of Korean Patent Application No. 10-2020-0003185, filed Jan. 9, 2020, the disclosure of which is hereby incorporated herein by reference.
The inventive concepts relate to technologies for protecting integrated circuits from hacking and other inappropriate attacks and, more particularly, to an apparatus and methods for detecting invasive attacks.
In order to extract security information from an integrated circuit, such as information stored in the integrated circuit and/or information about operations performed by the integrated circuit, invasive attacks on the integrated circuit may be launched. For example, attackers may attempt to obtain the security information by probing after dismantling a device including the integrated circuit, such as a semiconductor device, and powering the integrated circuit. Some semiconductor devices may be designed to include structures for detecting invasive attacks by detecting such dismantling, but newer invasive attack strategies are being developed to neutralize the structures for detecting such dismantling. Accordingly, structures for detecting invasive attacks may be required to have higher performance characteristics, which are sufficient to detect more advanced invasive attacks, while still maintaining high efficiency, such as high flexibility, low power consumption, small area, etc.
The inventive concepts provide apparatus and methods for effectively detecting advanced invasive attacks.
According to an aspect of the inventive concept, there is provided an apparatus including an integrated circuit and a plurality of conducting wires disposed on the integrated circuit. The integrated circuit includes: (i) a signal generation circuit configured to generate a random signal and selection signal based on random or pseudo-random numbers, (ii) a transmitting circuit configured to select at least one from among the plurality of conducting wires based on the selection signal and to output the random signal through the at least one conducting wire, and (iii) a receiving circuit configured to detect an invasive attack on the integrated circuit based on a signal received through the at least one conducting wire.
According to another aspect of the inventive concept, there is provided an apparatus, which includes an integrated circuit and a plurality of conducting wires disposed on the integrated circuit. The integrated circuit includes: (i) a signal generation circuit configured to generate a random signal and a selection signal based on random or pseudo-random numbers, (ii) a transmitting circuit including a plurality of demultiplexers, which are each configured to select one from among the plurality of conducting wires based on the selection signal and to output one bit of the random signal through the selected conducting wire, and (iii) a receiving circuit including a plurality of multiplexers, which are each configured to select one from among the plurality of conducting wires and to output a signal received through the selected conducting wire. In some embodiments, the receiving circuit is configured to detect an invasive attack on the integrated circuit based on output signals provided by the plurality of multiplexers.
According to another aspect of the inventive concept, there is provided a method that detects an invasive attack using a plurality of conducting wires disposed on an integrated circuit. This method includes generating a random signal and a selection signal based on random or pseudo-random numbers, selecting at least one from among the plurality of conducting wires based on the selection signal, outputting the random signal through the at least one selected conducting wire, and detecting the invasive attack based on signal received through the at least one selected conducting wire.
Embodiments of the inventive concept will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings in which:
The drawings attached to the present specification may not fit the scale for convenience of illustration, and may show exaggerated or reduced components;
Herein, a Z-axis direction, which is a direction in which the plurality of conducting wires WS faces the integrated circuit, may be referred to as a vertical direction, and components disposed in a +Z-direction relative to other components may be referred to as being over other components, and components disposed in a −Z-direction relative to other components may be referred to as being under other components. Also, a surface exposed in the +Z-direction from among surfaces of a component may be referred to as a top surface of the component, and a surface exposed in the −Z-direction may be referred to as a bottom surface of the component. Each of the Y-axis direction and the X-axis direction may be referred to as a first direction or second direction, and a plane including an X-axis and a Y-axis may be referred to as a horizontal plane. For convenience of illustration, the drawings of the present specification may illustrate only some layers.
The security-critical circuit 14 may store or process information, which may be referred to as security information to be secured from the outside of the apparatus 10. In some embodiments, the security-critical circuit 14 may include a cryptographic circuit and may store a key to be secured or may perform an encryption/decryption operation based on the key. In some embodiments, the security-critical circuit 14 may also store authenticated user's unique information of the apparatus 10, for example, payment information, etc. Attackers may launch an invasive attack on the apparatus 10 so as to extract information from the security-critical circuit 14. For example, the attackers may proceed to dismantling of the apparatus 10 from a top surface of the apparatus 10 in the −Z-direction and may probe the security-critical circuit 14 after powering the apparatus 10, which is dismantled, thereby trying extraction of information. This attack may be referred to an active probing. In some embodiments, when the apparatus 10 has a flip chip structure, dismantling of the apparatus 10 may also include removal of solder balls. In order to protect the security-critical circuit 14 from the active probing, the apparatus 10 may include an active shield as a shield for detecting an invasive attack.
The active shield may include the plurality of conducting wires WS disposed on the security-critical circuit 14 so as to detect dismantling of the apparatus 10 and may detect an abnormality that has occurred in signals passing through the plurality of conducting wires WS, thereby detecting the invasive attack. The plurality of conducting wires WS may extend in various forms. In some embodiments, the plurality of conducting wires WS may extend in parallel in the X-axis direction, as shown in
In the invasive attack, the signals passing through the plurality of conducting wires WS may be estimated, or the conducting wires WS having the same electric potential may be connected to one another by using a jumper so that some of the plurality of conducting wires WS may be removed. Thus, the active shield may be required to prevent the invasive attack by reducing the predictability of the signals passing through the plurality of conducting wires WS while preventing some of the plurality of conducting wires WS from having the same electric potential. Also, the active shield may be required to have high efficiency, for example, high flexibility, low power consumption, and small area, and in particular, when the apparatus 10 is used in a mobile application, the efficiency of the active shield may be significant. Hereinafter, as will be described with reference to the drawings, the active shield according to an embodiment of the inventive concept may provide a structure and function for detecting an advanced invasive attack and simultaneously may provide high efficiency.
The signal generation circuit 11 may generate random signal and selection signal based on random (or pseudo-random) numbers. For example, the signal generation circuit 11 may include at least one random number generator, and values of the random signal and the selection signal may be drawn from the random numbers. The random signal and/or the selection signal may be provided to the transmitting circuit 12 and the receiving circuit 13, and examples of the signal generation circuit 11 will be described below with reference to
The transmitting circuit 12 may be electrically connected to the plurality of conducting wires WS and may receive the random signal and the selection signal from the signal generation circuit 11. The transmitting circuit 12 may select at least one from among the plurality of conducting wires WS according to the selection signal generated based on the random numbers and may output the random signal through the at least one selected conducting wire. For example, as shown in bold in
The receiving circuit 13 may be electrically connected to the plurality of conducting wires WS and may receive the selection signal from the signal generation circuit 11. Similarly to the transmitting circuit 12, the receiving circuit 13 may select at least one from among the plurality of conducting wires WS according to the selection signal generated based on the random numbers and may receive signal through at least one selected conducting wire. In some embodiments, the transmitting circuit 12 and the receiving circuit 13 may commonly receive the selection signal. Thus, at least one from among the plurality of conducting wires WS may be identically selected. When no invasive attack has occurred, signal received by the receiving circuit 13 through at least one of the plurality of conducting wires WS may be same with the random signal output by the transmitting circuit 12, whereas, when an invasive attack has occurred, the signal may be different from the random signal. Thus, the receiving circuit 13 may detect the invasive attack based on the signal received through at least one conducting wire, and examples of the receiving circuit 13 will be described with reference to
In some embodiments, conducting wires not selected by the selection signal from among the plurality of conducting wires WS may maintain an electric potential corresponding to the random signal passing through them in a previously selected state. For example, the transmitting circuit 12 and the receiving circuit 13 may float the unselected conducting wires. In some embodiments, the conducting wires not selected by the selection signal from among the plurality of conducting wires WS may have a constant electric potential. For example, the transmitting circuit 12 and/or the receiving circuit 13 may apply a constant electric potential, for example, a ground electric potential, to the unselected conducting wires. Thus, the unselected conducting wires may have different electric potentials from the selected conducting wires. As a result, the predictability of the signals passing through the plurality of conducting wires WS may be reduced.
The security-critical circuit 14 may perform an operation of preventing leakage of security information when the invasive attack has been detected. In some embodiments, the security-critical circuit 14 may stop an operation being performed in response to detection of the invasive attack. In some embodiments, the security-critical circuit 14 may transition at least one pattern or element to an irreversible state in response to detection of the invasive attack, thereby preventing leakage of the security information. For example, the security-critical circuit 14 may apply strong electrical signal to fine patterns, thereby opening the patterns and preventing the signal from being transmitted through the shorted patterns. In some embodiments, the security-critical circuit 14 may perform an operation of rewriting arbitrary data in response to detection of the invasive attack. For example, the security-critical circuit 14 may rewrite arbitrary data (e.g., all-zero data) into memory for storing security information, thereby preventing leakage of the security information. Operations performed by the security-critical circuit 14 in response to detection of the invasive attack are not limited to the above-described examples, and the active shield detects the invasive attack, thereby triggering operations of the security-critical circuit 14 for preventing leakage of the security information.
Referring to
The plurality of conducting wires WS may include conducting wires disposed on a plurality of layers. For example, as shown in
In some embodiments, as shown in
Referring to
The signal generation circuit 31 may generate random signal RS and selection signal SEL. For example, the signal generation circuit 31 may generate random numbers and may generate random signal RS and selection signal SEL based on the random numbers, as described above with reference to
The transmitting circuit 32 may include first through n-th transmitting unit circuits TX1 through TXn. Each of the first through n-th transmitting unit circuits TX1 through TXn may receive the selection signal SEL and may select at least one conducting wire based on the selection signal SEL. Also, each of the first through n-th transmitting unit circuits TX1 through TXn may output one bit of the random signal RS through at least one selected conducting wire. For example, the first transmitting unit circuit TX1 may select one from among a plurality of first conducting wires WS1 based on the selection signal SEL and may output a first bit RS[1] of the random signal RS through a selected first conducting wire. Also, the second transmitting unit circuit TX2 may select one from among a plurality of second conducting wires WS2 based on the selection signal SEL and may output a second bit RS[2] of the random signal RS through a selected second conducting wire. Also, the n-th transmitting unit circuit TXn may select one from among a plurality of n-th conducting wires WSn based on the selection signal SEL and may output an n-th bit RS[n] of the random signal through an n-th selected conducting wire. In some embodiments, the number of first conducting wires WS1, the number of second conducting wires WS2, and the number of n-th conducting wires WSn may be same.
The receiving circuit 33 may include first through n-th receiving unit circuits RX1 through RXn. Each of the first through n-th receiving unit circuits RX1 through RXn may receive the selection signal SEL and may select at least one conducting wire based on the selection signal SEL. For example, the first receiving unit circuit RX1 may select one from among the plurality of first conducting wires WS1 based on the selection signal SEL, and the second receiving unit circuit RX2 may select one from among the plurality of second conducting wires WS2 based on the selection signal SEL, and the n-th receiving unit circuit RXn may select one from among the plurality of n-th conducting wires WSn based on the selection signal SEL.
In some embodiments, the transmitting circuit 32 may output an inverted random signal/RS through the plurality of conductive patterns 35, and the receiving circuit 33 may receive the inverted random signal/RS through the plurality of conductive patterns 35. Also, the receiving circuit 33 may generate a detection signal DET based on the signal received through the selected conducting wires from among the plurality of conducting wires WS1, WS2, . . . , and WSn and the inverted random signal/RS received through the plurality of conductive patterns 35. For example, the receiving circuit 33 may generate the detection signal DET activated indicating that the invasive attack has occurred, when the signal received through the selected conducting wires from among the plurality of conducting wires WS1, WS2, . . . , and WSn and the inverted random signal/RS are not different from one another bitwise. As shown in
In some embodiments, unlike in
In some embodiments, the transmitting unit circuit and the receiving unit circuit may have the same length in a direction (e.g., a Y-axis direction of
Referring to
The second receiving unit circuit RX2 may include a multiplexer MUX and an XOR gate G42. The multiplexer MUX may receive the selection signal SEL and may provide signal received through one second conducting wire from among the plurality of second conducting wires WS2 that is selected according to the selection signal SEL, to the XOR gate G42. The XOR gate G42 may receive the inverted second bit/RS[2] of the inverted random signal/RS through the conductive pattern 45_1, may receive output signal of the multiplexer MUX, and may generate a second detection signal DET2. Thus, when the inverted second bit/RS[2] of the inverted random signal/RS and the output signal of the multiplexer MUX are different from each other, i.e., when the inverted second bit/RS[2] of the inverted random signal/RS is same with an inverted version of the output signal of the multiplexer MUX, the second detection signal DET2 may have a high level. On the other hand, when the inverted second bit/RS[2] of the inverted random signal/RS and the output signal of the multiplexer MUX are same, i.e., when an event, such as the invasive attack, has occurred in the plurality of second conducting wires WS2, the second detection signal DET2 may have a low level. In some embodiments, unlike in
Referring to
In comparison with to the second receiving unit circuit RX2 of
The signal generation circuit 51 may generate random signal RS and selection signal SEL and may further generate inverted random signal/RS. As shown in
In some embodiments, as will be described below with reference to
The transmitting circuit 52 may include first through n-th transmitting unit circuits TX1 through TXn. The transmitting circuit 52 may receive the random signal RS and the selection signal SEL from the signal generation circuit 51 and may output the random signal RS through conducting wires from among the plurality of conducting wires WS1, WS2, . . . , and WSn according to the selection signal SEL. The receiving circuit 53 may receive the inverted random signal RS and the selection signal SEL from the signal generation circuit 51 and may generate detection signal DET including first through n-th detection signals DET1 through DETn based on signal received through conducting wires selected from among the plurality of conducting wires WS1, WS2, . . . and WSn according to the selection signal SEL and the inverted random signal RS.
The second transmitting unit circuit TX2 may include a demultiplexer DEMUX. The demultiplexer DEMUX may receive a second bit RS[2] of random signal RS and selection signal SEL and may output the second bit RS[2] of the random signal RS through a second conducting wire from among a plurality of second conducting wires WS2, selected according to the selection signal SEL. In comparison with to the second transmitting unit circuit TX2 of
The second receiving unit circuit RX2 may include a multiplexer MUX and an XNOR gate G60. The multiplexer MUX may receive the selection signal SEL and may provide signal received through one from among the plurality of second conducting wires WS2 that is selected according to the selection signal SEL, to the XNOR gate G60. The XNOR gate G60 may receive the inverted second bit/RS[2] of the inverted random signal/RS from a signal generation circuit (for example, 51 of
A receiving circuit 70 may be connected to a plurality of conducting wires WS. For example, as shown in
The NAND gate G70 may receive the first through n-th detection signals DET1 through DETn and may generate detection signal DET′, as shown in
Referring to
Referring to
As shown in
The true random number generator 91 may generate a first random number RN1 that is unpredictable. The true random number generator 91 may have an arbitrary structure for generating the first random number RN1 that is unpredictable. In some embodiments, the true random number generator 91 may periodically generate the first random number RN1, and in some embodiments, the true first random number generator 91 may generate the first random number RN1 in response to a request of the first pseudo random number generator 92. The true random number generator 91 may consume relatively high power so as to generate the first random number RN1 and may be required to generate a new first random number RN1 with a relatively long time, i.e., to update the first random number RN1. Thus, when the random signal RS and/or the selection signal SEL is generated as part of the first random number RN1 generated by the true random number generator 91, it may not be easy to protect a security-critical circuit, such as the receiver circuit 13 of
The first pseudo random number generator 92 may generate a second random number RN2 based on the first random number RN1. In some embodiments, the first pseudo random number generator 92 may generate a second random number RN2 according to a sequence having characteristics approximated to characteristics of random numbers and may have an arbitrary structure in which a starting point of the sequence varies according to the first random number RN1. For example, the first pseudo random number generator 92 may include a self-looped substitution-permutation network (SPN), and the first random number RN1 may be provided with an initial input of the SPN. Thus, the first pseudo random number generator 92 may generate the second random number RN2 at an adjustable period, i.e., update the second random number RN2. In some embodiments, the first pseudo random number generator 92 may be set to update the second random number RN2 at a fixed period unlike in at least one second pseudo random number generator 93 that will be described below. Also, in some embodiments, as will be described below with reference to
At least one second pseudo random number generator 93 may generate a third random number RN3 based on the second random number RN2. For example, a second pseudo random number generator 93_I may generate a third random number RN31 based on the second random number RN2, and a second pseudo random number generator 93_k may generate a third random number RN3k based on the third random number RN31. In some embodiments, the third random numbers RN3k and RN31 generated by two or more second pseudo random number generators 93_I and 93_k may be used for different active shields and may have different bit widths, as will be described below with reference to
Unlike in
Referring to
The signal generation circuit 111 may include a true random number generator 111_1, a first pseudo random number generator 111_2, and at least one second pseudo random number generator 111_3, and a first random number RN1, a second random number RN2, and a third random number RN3 may be generated. As described above with reference to
The hacking detection circuit 112 may be referred to as an attack countermeasure and may detect attacks on the apparatus 110 in an arbitrary manner, thereby generating an output signal OUT. For example, the hacking detection circuit 112 may include another active shield independent of the signal generation circuit 111 and may also include a light detection sensor (for example, a photodiode) for sensing light flowing into the apparatus 110 when dismantling.
The active shield including the signal generation circuit 111 may enhance detection of an invasive attack when attacks are detected by the hacking detection circuit 112. In some embodiments, the signal generation circuit 111 may increase the update speed of the random numbers when no attacks are detected by the hacking detection circuit 112. For example, as shown in
The signal generation circuit 121 may generate random signal RS and selection signal SEL based on random numbers. For example, as described above with reference to
The test circuit 126 may perform testing on an active shield. For example, as shown in
In Operation S10, an operation for entering a test mode may be performed. For example, the test circuit 126 may enter the test mode in response to an enable signal ENA that is activated. In some embodiments, the enable signal ENA may be activated when powering of the apparatus 120 is initiated, and/or the enable signal ENA may be periodically activated while the apparatus 120 is powered. Also, in some embodiments, the enable signal ENA may be omitted, and the test circuit 126 may also enter the test mode when powering of the apparatus 120 is initiated. In some embodiments, the test circuit 126 may generate, for example, a result signal RES that is not activated, indicating that the active shield has not passed the test during the test mode.
In Operation S11, an operation of resetting the signal generation circuit 121 may be performed. For example, the test circuit 126 may rest the signal generation circuit 121 according to the control signal CTR. Random number generators included in the signal generation circuit 121, for example, a true random number generator and a pseudo random number generator may be rest in response to the control signal CTR. Thus, the true random number generator may generate a first random number RN1 in a different state from the state before the reset.
In Operation S12, an operation of collecting first random numbers may be performed, and in Operation S13, an operation of measuring entropy of the first random numbers may be performed. As described above with reference to
In Operation S14, an operation of comparing measured entropy to a reference value may be performed. As shown in
In Operation S15, an operation of updating the state of the active shield may be performed. For example, the signal generation circuit 121 of
In Operation S16, an operation of determining whether an attack has been detected, may be performed. For example, the test circuit 126 may determine whether an attack has been detected, based on the detection signal DET provided from the receiving circuit 123. As shown in
In Operation S20, an operation of generating random signal and selection signal may be performed. For example, the signal generation circuit 11 may generate random numbers and may generate random signal and selection signal based on the random numbers. An example of Operation S20 will be described below with reference to
In Operation S40, an operation of selecting at least one conducting wire may be performed. For example, the transmitting circuit 12 and the receiving circuit 13 may receive the selection signal commonly and may select at least one from among the plurality of conducting wires WS based on the selection signal. As described above with reference to
In Operation S60, an operation of outputting random signal through at least one conducting wire may be performed. For example, the transmitting circuit 12 may output random signal through at least one conducting wire selected based on the selection signal. When no invasive attack has occurred, the random signal may arrive at the receiving circuit 13 normally, whereas when the invasive attack has occurred and at least part of the plurality of conducting wires WS may be open or shorted, the random signal may not normally arrive at the receiving circuit 13.
In Operation S80, an operation of detecting the invasive attack may be performed. For example, the receiving circuit 13 may receive inverted random signal (or random signal) and may generate detection signal based on the inverted random signal and signal received through at least one selected from among the plurality of conducting wires WS. An example of Operation S80 will be described with reference to
In Operation S22, an operation of generating a first random number RN1 periodically may be performed. For example, a true random number generator 91 of the signal generation circuit 90 may generate the first random number RN1 periodically. In some embodiments, as described above with reference to
In Operation S24, an operation of generating a second random number RN2 based on the first random number RN1 may be performed. For example, a first pseudo random number generator 92 of the signal generation circuit 90 may receive the first random number RN1 and may use the first random number RN1 as a seed, thereby generating a second random number RN2. In some embodiments, as described above with reference to
In Operation S26, an operation of generating random signal and selection signal based on the second random number RN2 may be performed. For example, at least one second pseudo random number generator 93 of the signal generation circuit 90 may receive the second random number RN2 and may use at least part of the second random number RN2 as a seed, thereby generating a third random number RN3. The random signal and the selection signal may be configured of different parts of the third random number RN3. In some embodiments, as described above with reference to
In Operation S82, an operation of receiving signal through at least one conducting wire may be performed. For example, the receiving circuit 33 may receive the selection signal SEL commonly with the transmitting circuit 32 and may receive signal through at least one selected from among the plurality of conducting wires WS based on the selection signal SEL.
In Operation S84, an operation of receiving inverted random signal/RS may be performed. For example, the receiving circuit 33 may receive the inverted random signal/RS from the transmitting circuit 32 through the plurality of conductive patterns 35 disposed under the plurality of conducting wires WS. In some embodiments, as described above with reference to
In Operation S86, an operation of generating detection signal DET may be performed. For example, the receiving circuit 33 may include first through n-th receiving unit circuits RX1 through RXn, and each of the first through n-th receiving unit circuits RX1 through RXn may compare the signal received through one conducting wire selected to one bit of the inverted random signal/RS, thereby generating each of first through n-th detection signals DET1 through DETn. In some embodiments, the first through n-th detection signals DET1 through DETn may be directly provided to the security-critical circuit (for example, 14 of
While the inventive concept has been particularly shown and described with reference to embodiments thereof, it will be understood that various changes in form and details may be made therein without departing from the spirit and scope of the following claims.
Karpinskyy, Bohdan, Park, Jieun, Noh, Mijung, Lee, Juyeon, Lee, Yongki
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