Testable tape for bonding leads to semiconductor die and process for manufacturing same

Abstract

A testable tape for forming electrical innerlead connections between conductive pads, such as in semiconductor die, and a process for manufacturing the testable tape are disclosed. The testable tape includes a plurality of leads arranged in a pattern to form the innerlead bonds to the die. The plurality of leads is supported with a dielectric fill formed selectively on the lead pattern to support and electrically isolate the leads for testing.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an article of manufacture for forming leads to interconnect semiconductor die with the next level of electronics packaging and a process for manufacturing the same.

2. Background of the Invention

The term interconnects herein refers to the electrical connections between a semiconductor die and the next level of microelectronics packaging, such as lead frames, chip carriers, ceramic substrates, printed circuit boards, etc. Historically this first-level interconnect has been achieved using very fine gold or aluminum wire. Other methods of first-level interconnection which have been used somewhat successfully include processes known as Controlled Collapse Solder Bump, Flipchips, Beam Leads, and "TAB" (Tape for Automated Bonding).

This invention expands the field for successful utilization of TAB. TAB in general consists of a very thin copper foil processed to produce a pattern of copper leads or traces which can be used in the same manner as gold or aluminum wires to form interconnections between the semiconductor die and the next level of microelectronic packaging.

A semiconductor die typically has interconnect pads exposed on its surface. These pads, called I/O (input/output) pads, are typically termination conductive pads of the aluminum traces which carry the electrical signals internal to the semiconductor die. The surface of the semiconductor die is protected with a very thin passivation layer made for example of silicon dioxide, silicon nitride, or other inert dielectric materials, with windows or vias exposing the I/O pads.

On these semiconductor I/O pads, the gold, aluminum, or copper leads are bonded to form an "innerlead bond". The gold, aluminum, or copper leads are also bonded to the next level of microelectronic packaging and this is termed "the outerlead" bond, completing the electrical interconnection.

TAB has been an attractive alternative to gold and aluminum wire bonding in that it consists of a continuous tape of patterns of copper leads, each pattern corresponding to the pattern of I/O pads on the surface of the semiconductor die. This continuous tape has sprocket hole patterns along its edge, much like a motion picture film strip, allowing an automated transport of the tape across the bonding location where the semiconductor die is accurately positioned, and in one step all the copper leads are "innerlead" bonded to the semiconductor die. The semiconductor die at that point is lifted from the bonding location and becomes part of the continuous tape.

Many times it is desirable to electrically test the semiconductor die after the innerlead bonds are made but before the die is permanently attached to its next level of packaging. Such testing is possible using a type of TAB tape on which the conductor pattern consists of electrically isolated copper leads with large test pad areas for each lead and a dielectric film under the conductor pattern for support during bonding and testing. After the innerlead bonds are made, the test pads can be contacted to electrically test the die and the innerlead bonds before the outerlead bonds are made. After testing, the continuous tape with the "innerlead" bonded semiconductor die is then fed across a second bonding location where the copper leads, typically in one operation, are excised from the continuous tape, formed if desired, and "outerlead" bonded to the next level of packaging.

Prior art TAB tapes having dielectric support have been manufactured so that the dielectric support has been formed in an essentially continuous film bonded to the metal leads with the interface between the metal leads and dielectric support being essentially continuous and planar. These TAB tapes have been made by bonding a tape of dielectric support with an adhesive to a tape of metal lead patterns with holes punched in the dielectric for sprockets and for allowing access to the leads for bonding. Alternatively, the dielectric support has been formed on the metal leads by casting a continuous liquid dielectric film over a planar metal tape and then photolithographically etching the lead pattern into the metal tape. Yet another prior art method involves using an electroless copper deposition technique to apply a very thin layer of copper to a planar dielectric film tape which is then photolithographically processed so that the desired lead pattern can be pattern plated, or the entire surface of one side of the dielectric is electroplated to the desired thickness and then photolithographically processed so that the desired lead pattern can be etched into the electroplated metal, typically copper metal. In each of the last three processes, a photolithographic process is required so that certain areas of the dielectric film can be etched so as to open either sprocket holes and/or areas where the copper metal is accessible through the dielectric.

Advantages of TAB, besides providing the capability of testing the innerlead bonds, include greater bond strengths, greater lead strengths, improved thermal dissipation and higher conductivity because TAB leads generally have greater cross-sectional area and bonding area than do fine wire leads for comparable bonding environments. Further, the manufacture of TAB leads allows greater control over the patterns of the leads providing greater design flexibility in the semiconductor die since the TAB leads can bond to I/O pads which are smaller and closer together than has been possible using wire bonding techniques.

However, when TAB is used, because I/O pads on the semiconductor die are somewhat recessed below the surface of the passivation layer, it is necessary to provide a conductive mechanical stand-off, called a "bump", between the I/O pad on the die and the lead of the TAB tape. Without this bump, there is a danger of cracking the passivation layer on the die and destroying its functionality when the lead is bonded to the pad, and/or a danger of the leads contacting the exposed edge of the die and thereby creating electrical shorts.

These bumps can be processed onto the die before the dies are separated out of the wafer form. This typically involves various layers of thin film metal depositions over the entire wafer to provide adhesion to the surface of the wafers, a thermal diffusion barrier, and a plateable surface. Then, using a photolithographic process, electroplated bumps are formed, typically of gold, over the I/O pads. A final step involves the removal of the thin film metal deposition layers that are exposed everywhere but under the electroplated bumps. These electroplated bumps can now be innerlead bonded to flat, or planar, TAB copper leads. If the bump is of gold plating, the copper leads of the TAB tape are typically plated with a very thin layer of tin or gold, to allow the formation of a gold-tin eutectic bond or a gold-gold thermocompression bond. Other metallurgies are also used. However, dies with "bumps" formed on the pads are available only to those companies that have control of the wafer fabrication, which is not typically the case. Therefore, alternative bumping techniques are needed to process the bumps as part of the metal leads of the TAB tape. Such techniques include selectively etching the metal to form the bumps on the innerlead tips of the copper leads or photolithographically processing the copper leads to allow the electroplating of bumps onto the innerlead tips of the copper leads. These techniques are entirely practical and are being utilized in commercial applications.

However, these bumping processes have not been successfully applied to TAB tape using dielectric support for electrical isolation and thus testing of the leads after innerlead bonding. This is due in great part to the difficulties in processing either a selectively etched or electroplated bump on the innerlead tips of the metal leads while there is a continuous film of dielectric support material adjacent to one side of a continuous metal film.

In sum, prior art technology provides a utilization of non-testable TAB tape where a bumped semiconductor die is innerlead bonded with a non-bumped planar all copper TAB tape, or a non-bumped semiconductor die is innerlead bonded with a bumped all copper TAB tape. Testable TAB can be used on a bumped semiconductor die that is innerlead bonded with a non-bumped planar TAB tape which has copper leads supported on a dielectric film.

To expand the field of successful utilization of testable TAB tape, there is a need for a process for manufacturing a TAB tape which overcomes the difficulties of having a continuous dielectric film mated to a continuous metal film along a planar interface and a further need for a testable bumped TAB tape.

SUMMARY OF THE INVENTION

In accordance with the foregoing, the present invention provides an article of manufacture for use in forming an electrical connection to conductive pads on a semiconductor die that is testable and eliminates the use of a continuous dielectric film. The article comprises a plurality of conductive leads in a pattern for alignment with conductive pads on the die, the leads having a contact side on which the contacts to the conductive pads are to be made. In one embodiment at least one of the leads has a bump on the contact side for forming a contact on one of the conductive pads. The plurality of conductive leads incorporates a dielectric means for supporting and electrically isolating the leads. Thereby, the leads are supported in the pattern to align the plurality of leads with the conductive pads on the die for the electrical connection. The dielectric means is formed in a fill pattern connecting the plurality of leads as designed by the user.

The article of the present invention is manufactured according to a unique process which involves the steps of:

(1) providing a metal base tape with a first side and a contact side;

(2) electroplating with a dissimilar metal a lead pattern on said first side of said metal base tape and bump pattern on the contact side to define a bumped lead pattern for innerlead bonding;

(3) selectively etching said base tape on said contact side to form recesses defining a fill pattern;

(4) filling said recesses in said fill pattern with a dielectric fill to provide a dielectric support for said lead pattern; and

(5) selectively etching said base tape on said first side and said contact side simultaneously to remove the portions of said base tape that are left exposed after said steps of electroplating and filling until the leads in said lead pattern are electrically isolated and supported by said dielectric fill.

In another embodiment, a further step after the step of electroplating is included comprising the step of electroplating with gold metal a bump pattern on the contact side of the metal base tape to define a bump pattern for the innerlead tips of the leads in the lead pattern.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram of one embodiment of an article of manufacture according to the present invention;

FIG. 2 is a partial cross-section showing a bumped lead according to one embodiment of the present invention contacting a conductive pad on a semiconductor die;

FIGS. 3A-3D are schematic illustrations of some of the steps of the process for manufacturing the testable tape according to the present invention;

FIGS. 4A-4F are schematic illustrations of some of the steps of the process for manufacturing the testable tape according to the present invention; and

FIGS. 5A-5C are schematic illustrations of some of the steps of the process for manufacturing the testable tape according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

With reference to the drawings, the preferred embodiments of the present invention are described.

FIG. 1 shows an article of manufacture 10 for use in forming electrical contact to conductive pads (not shown) such as vias or I/O pads on semiconductor dies. Specifically, FIG. 1 shows a first side 33 of a metal tape 11 having a contact side (not shown in FIG. 1) for contacting the conductive pads of a semiconductor die. The metal tape 11 consists of a plurality of lead pattern units 12 formed from the metal tape 11. The lead pattern units 12 are separated by unit interstices 13 so that each of the lead pattern units 12 is electrically isolated from the metal tape 11 and the other lead pattern units 12. If desired, support bars 35 and support fields 37 may be formed for additional support of the lead pattern units 12. The support bars 35 and support fields 37 are formed from the metal base tape 11 and are isolated by the unit interstices 13 and lead interstices 15.

Each of the lead pattern units 12, according to the present invention, consists of a plurality of conductive leads 14 arranged in a pattern for alignment with the conductive pads of a particular semiconductor die. Each of the conductive leads 14 in one preferred embodiment has a bump (not shown in FIG. 1) near the innerlead tip 25 on the contact side of each conductive lead 14 for forming electrical contact to the conductive pads which may be recessed on the surface of a semiconductor die. The leads 14 are separated and electrically isolated by lead interstices 15 from the supporting metal base tape 11 and from the other leads 14.

Further, a dielectric means 16 is formed connecting portions of the plurality of leads 14, the metal base tape 11 and support bars 35, across the lead interstices 15 and unit interstices 13 for supporting the conductive leads 14 and the lead pattern units 12 to the metallic base tape 11. The dielectric means 16 consists in the preferred embodiment of a dielectric fill 17 (hatched in FIG. 1), such as a polyimide compound.

FIG. 2 shows a partial cross-section of a lead 14 from the pattern of leads of the present invention with a bump 18 near the innerlead tip 25 on the contact side 19 of the metal tape 11. The bump 18 is formed for electrical connection with a conductive pad 20 on a semiconductor die 21. The conductive pad 20 is typically formed of aluminum in an integrated circuit formed on a semiconductor die 21. A passivation layer 22 is formed over the semiconductor die 21 of an inert dielectric material such as silicon dioxide or silicon nitride to protect the components of the semiconductor die 21. The metal tape 11 from which the leads 14 are formed is preferably copper. To optimize the bonding metallurgical process, the lead 14, for example, may be plated with gold or tin, depending on the particular metallurgical system involved.

FIG. 1 illustrates the lead pattern unit 12 of a plurality of electrically isolated leads 14 which are, however, electrically connected along traces 36 to punchout pads 23. If the user desires to electroplate the leads 14, such as with gold, the punchout pads 23 are contacted for the electroplating process. When the electroplating process is completed, the punchout pads 23 are punched out from the tape 11 leaving the leads 14 of the lead pattern 12 electrically isolated for testing as discussed below. The traces 36 and punchout pads 23 are included in one embodiment of the present invention.

The metal tape 11 shown in FIG. 1 with a plurality of lead pattern units 12 is ideal for automated testable bonding to semiconductor die. An alignment means, such as sprocket guides 24 on the metal tape 11, allows journaling the metal tape 11 with the plurality of lead pattern units 12 formed thereon in an automated bonding machine which precisely aligns the tape 11 in a continuous roll form for high speed and high accuracy bonding to semiconductor die.

Once innerlead bonds have been made to a semiconductor die by, for instance, thermal compression at the innerlead tips 25 of the leads 14, the innerlead bonds and the die itself may be electrically tested before the leads 14 are bonded to its next level of packaging (not shown) by contacting the test pads 26. In this manner, the die and the innerlead bonds at the innerlead tips 25 of the leads 14 are tested before the die is mounted on a substrate. Thus, a poorly or improperly bonded die or otherwise defective die may be detected and removed from the production line before incurring additional cost.

After the innerlead bonds are tested, the metal tape 11 and lead pattern units 12 with the die attached are aligned over the next level of packaging for outerlead bonding. The outerlead bonds are formed on the leads 14 between test pads 26 and the innerlead tips 25. Before or after the outerlead bonds are formed depending on the choice of the designer, the leads 14 are cut between the outerlead bonds and the test pads 26 along, for instance, along the edge 38 of the support field 37 in FIG. 1 and the metal tape 11 is separated from the packaging.

Thus, as can be seen from the above, the present invention provides a testable tape for forming bonds to semiconductor die in an automated process. A unique process for manufacturing such testable tape is now described. The process of the present invention will be described using a copper base metal tape 11 as a starting material. Other conductive materials may be used as suits the user, however copper is found to be a preferred material.

The process for manufacturing a testable bumped tape for bonding to semiconductor die begins with providing a metal base tape 11 with a first side 33 (FIG. 3A) and a second side, or contact side 19 (FIG. 3B). The metal base tape 11 is preferably copper which has been chemically cleaned to remove any undesirable impurities, such as oxides, fingerprint oils, and the like.

A step involves electroplating with a dissimilar metal 34 a lead pattern 27 on the first side 33 of the metal base tape 11. Also, in one embodiment a bump pattern 28 is electroplated with the dissimilar metal 34 on the contact side 19 of the metal base tape 11. The bump pattern 28 is aligned so that each bump 18 will be aligned with the innerlead tip 25 of each of the leads 14. Further, a support pattern 39 is electroplated with the dissimilar metal 34 on both sides, as explained below. The electroplating is accomplished using a dissimilar metal 34 which is chemically stable during the chemical etch process of the metal of the metal base tape 11 for a particular etchant, such as nickel or tin for a copper metal base tape 11 with an ammoniated cupric chloride etchant.

The lead pattern 27, bump pattern 28 and support pattern 39 may be established on the metal base tape 11 using photolithographic techniques. The cleaned metal base tape 11 should be coated with a thin uniform film of a photoresist 31, and dried and cured. The photoresist should be of a type which allows double exposure and development, such as Shipleys Microposit 119S photoresist, as described below. Two photo masks are formed, one to define the lead pattern 27 and support pattern 39 for the first side 33 and one to define bump pattern 28 and support pattern 39 for the contact side 19. The metal base tape 11 with the photoresist coating is aligned, exposed and developed leaving the copper tape uncovered only in the lead pattern on the first side 33, the bump pattern on the contact side 19 and the support pattern 39 on both sides, as can be seen in FIG. 3C.

FIG. 3C shows a cross-section of the metal base tape 11 taken along the line III--III of FIG. 3A and FIG. 3B, with FIG. 3A showing the first side 33 of the metal base tape 11 and FIG. 3B showing the contact side 19 of the metal base tape 11. The exposed and developed photoresist 31 will leave uncovered copper along the lead patterns 27, the bump patterns 28 and the support pattern 39 while leaving the remainder of the metal base tape 11 protected by the photoresist 31. The dissimilar metal electroplate is then conducted forming an electroplate layer 29 (hatched in FIG. 3D) of dissimilar metal 34 in the areas left uncovered by the photolithographic techniques in the lead pattern 27, the bump pattern 28 and the support pattern 39.

The next step (see FIGS. 4A-4F in which 4A and 4B show the first side 33 and the contact side 19, respectively, and 4C through 4F are cross-sections taken along the line IV--IV in FIGS. 4A and 4B) involves selectively etching the metal base tape 11 to form recesses 32 defining a fill pattern 30 (hatched in FIG. 4B) on the contact side 19 of the metal base tape 11 as shown in FIG. 4B. The fill pattern 30 on the contact side 19 overlaps with portions of the support pattern 27 on the first side 33 in order to provide support as described below.

While the electroplate layers 29 and the photoresist 31 remain on the metal base tape 11, the step of selectively etching a fill pattern 30 is accomplished by re-exposing and developing the contact side 19 of the metal base tape 11 with a fill pattern 30 using well known photolithographic techniques on the photoresist 31 which will allow a second exposure and development. The first side 33 of the metal base tape 11 is not altered during the step of selectively etching the fill pattern 30 in the metal base tape 11.

When the photoresist 31 is exposed and developed leaving the fill pattern 30 uncovered on the copper metal base tape 11, as illustrated in FIG. 4C, only the portions of the metal base tape 11 corresponding to the fill pattern 30 are left exposed. The lead pattern 27, the bump pattern 28 and the support pattern 39 remain covered by the electroplate layer 29. The balance of the metal base tape 11 is covered by the photoresist 31.

With the fill pattern 30 uncovered on the metal base tape 11, the metal base tape 11 is etched with a chemical etchant which will selectively attack the copper metal base tape 11 without removing the dissimilar metal electroplate 29 or the photoresist 31. For a nickel or tin electroplate layer and a copper metal base tape, an example of a suitable etchant chemical is again an ammoniated cupric chloride. The metal base tape 11 is etched as shown in FIG. 4D until recesses 32 are formed defining the fill pattern 30 on the metal base tape 11. The recesses 32 are preferably as deep as half the thickness of the metal base tape 11. Thus, for example with a metal base tape of copper that is about 1.4 mils thick, the recess 32 will be about 0.7 mils deep in the contact side 19 of the metal base tape 11.

The next step in the manufacturing process involves filling the recesses 32 in the fill pattern 30 with a dielectric fill 17 using a screening process, an injection fill process or other suitable means to provide a dielectric support across the lead interstices 15 and unit interstices 13 for the lead pattern units 12 being manufactured. As illustrated in FIG. 4E, before filling the recesses 32, the photoresist 31 is stripped from the metal base tape 11 leaving only the electroplate layer 29 and the recesses 32 in addition to the metal base tape 11.

As illustrated in FIG. 4F, the recesses 32 are then filled with a dielectric fill 17 which bonds to the recesses 32 in the metal base tape 11 after curing. A suitable dielectric fill 17 is found to be a polyimide compound. Other dielectrics may be used, however, as suits the user.

After the dielectric fill 17 has been cured and bonded to the metallic tape 11, the metal base tape 11 has copper exposed over its entire surface on the first side 33 and the contact side 19, except for the portions that are covered by the electroplate layer 29 in the lead pattern 27, the bump pattern 28 and support pattern 39 or covered by the dielectric fill 17. The metal base tape 11 is then selectively etched using an etchant chemical, such as ammoniated cupric chloride, which will etch the copper metal base tape 11 while not harming the dielectric fill 17 nor the portions of the metal base tape 11 covered by the electroplate 29. The metal base tape 11 is etched until the leads 14 in the lead pattern 27 are electrically isolated by lead interstices 15 and unit interstices 13 but supported by the dielectric fill 17 as illustrated in FIGS. 5A, 5B and 5C. FIG. 5A shows the leads 14 from the first side 33 supported in a lead pattern 27 by the dielectric fill 17. FIG. 5B shows the leads 14 in the lead pattern 27 from the contact side 19 with bumps 18 at the innerlead tips 25 of the leads 14 in the bump pattern 28 and the dielectric fill 17 bonded to the leads 14.

After the step of selectively etching the base tape to form the electrically isolated leads with bumps and dielectric support, the electroplate layer 29 will remain on the top of the bumps 18 on the contact side 19, along the leads 14 on the first side 26 and over the support pattern 39 on both sides. Then the electroplate layer 29 is selectively etched away from the metal base tape, leaving just the copper leads 14 and the dielectric support 17 (not shown in FIG. 5).

If necessary, the bonding of the dielectric fill 17 to the metal base tape 11 may be enhanced by a variety of techniques which involve increasing the surface area of the exposed copper in the recesses 32 and before the step of filling the recesses 32 with the dielectric fill 17. For instance, immediately after forming the recesses 32, the copper metal base tape 11 may be processed to form an oxide (not shown) in the recesses 32 which will increase the surface area in the recesses 32 for bonding of the dielectric fill 17.

Further, after removing the dissimilar metal electroplate, the leads 14 may be plated with gold, tin or other metals to enhance bonding for the particular metallurgies involved.

It can be seen that the metal base tape 11 remains twice as thick as the leads 14 in the regions of the support pattern 39 including along the sprocket guides 24, support fields 37 and support bars 35. This double thick metal base provides strong solid support for the leadpatterns 12 during high speed bonding operations. The present invention thus eliminates the need for an essentially continuous film of dielectric support for use in testable TAB tape. Further, while TAB tapes which have an essentially continuous film of dielectric support tend to curl due to the internal stresses produced during the copper electroplate onto the continuous dielectric film or during the curing of the cast liquid continuous dielectric film onto a continuous copper film, the metal base tape 11 of the present invention will remain substantially flat during processing.

As can be appreciated, the lead pattern 14 shown in the figures is relatively simple. Much more detailed and adaptable lead patterns are available as known in the art using photolithographic techniques. Further, the fill pattern 30 may take on a variety of shapes as suits the user. The arrangement of the fill pattern 30 for the dielectric fill 17 should be such that the individual lead pattern units 12 are suitably supported to metal base tape 11 portion with the sprocket guides 24 for high speed automated bonding. Further, the dielectric fill 17 should provide support and alignment for the leads 14 during the bonding process.

As can be seen from the foregoing, the present invention provides an article of manufacture and a process for manufacturing the article for use in the automated bonding of TAB tape to semiconductor die which provides a testable bond. A further advantage of the present invention resides in the fact that a small amount of dielectric fill can be utilized as compared to other processes for creating a testable tape. This is desirable because dielectric fills such as polyimide materials will retain a small degree of water. Once the bonds have been made to a semiconductor die and the package sealed, the water may evaporate causing corrosion on the semiconductor die or even, in conditions of higher heat, a popping open of the substrate package. Thus, it is desirable to include as little dielectric fill 17 as possible in the fill pattern 30 of the present invention.

Further aspects and advantages of the present invention are apparent from a study of the specification, the drawings and the claims.

Claims

1. A process for manufacturing an article for use in forming bonds to conductive pads on a die, such bonds being testable before the die is mounted on the next level of packaging, comprising the steps of:

(1) providing a metal base tape with a first side and a second side;

(2) electroplating a lead pattern on said first side of said metal base tape to define for the bonding a lead pattern consisting of a plurality of leads with innerlead tips aligned for bonding to conductive pads on the die and separated from said tape and the others of said plurality of leads by interstices, using a dissimilar metal, said dissimilar metal being dissimilar to said metal base tape so that said dissimilar metal and said metal base tape may be selectively etched;

(3) selectively etching said metal base tape on said second side to form recesses defining a fill pattern corresponding to portions of said interstices;

(4) filling said recesses in said fill pattern with a dielectric fill to provide a dielectric support for said lead pattern; and

(5) selectively etching said base tape on said first side and said second side simultaneously to remove the portions of said base tape that are left exposed after said steps of electroplating and filling until said plurality of leads in said lead pattern are electrically isolated by interstices and supported across portions of said interstices by said dielectric fill.

2. The process of claim 1, further including in the step of electroplating the step of:

electroplating a bump pattern on said second side using said dissimilar metal to define a bump pattern for forming at least one bump on said second side near the innerlead tip of at least one of said plurality of leads.

3. The process of claim 1, further including in the step of electroplating the step of:

electroplating a support pattern separated from said lead pattern on said first side and said second side for defining a support pattern consisting of portions of said tape separated by interstices from said leads.

4. The process of claim 1, wherein:

said metal base tape is made of copper; and

said dissimilar metal is a metal selected from the class including nickel, tin, solder or gold.

5. The process of claim 1, further including, before said step of filling said recesses, the step of:

increasing the surface area of said recesses.