Two detection systems are provided for a protective device, in particular an FI protective device, having a core balance transformer whose secondary winding is followed by a tripping relay for operating a switching mechanism, which switches a conductor network. In this case, a first detection system carries out the tripping function for fault currents at a fault current frequency below a changeover frequency. The second detection system carries out the tripping function for fault currents above the changeover frequency. The changeover frequency is in this case preferably not less than 1 kHz.
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1. A protective device comprising:
at least two detection systems with a core balance transformer whose secondary winding is followed by a tripping relay for operating a switching mechanism which switches a conductor network, wherein a first detection system carries out a tripping function for a fault current at a fault current frequency below a changeover frequency, and wherein a second detection system carries out the tripping function for fault currents above the changeover frequency.
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This application is the national phase under 35 U.S.C. §371 of PCT International Application No. PCT/DE00/02656 which has an International filing date of Aug. 8, 2000, which designated the United States of America, the entire contents of which are hereby incorporated by reference.
The invention generally relates to a protective device. Preferably, it includes at least one detection system with a core balance transformer whose secondary winding is followed in a tripping circuit by a tripping relay for operating a switching mechanism which switches a conductor network. A tripping circuit is a circuit along which an electrical monitoring variable is produced and is assessed. Further, such a circuit produces an electrical tripping signal which activates a tripping relay (causes it to trip), for example, when a tripping condition is satisfied. A protective device can include a fault current protective device and/or a differential current protective device, for example.
Such a fault current protective device is used to ensure protection against a dangerous body current in an electrical system. Such a body current occurs, for example, when someone touches a live part of an electrical system. The fault current (or else differential current) then flows via the person as a body current to ground. The protective device that is used for protection against the dangerous body currents disconnects the relevant circuit from the main system quickly and safely when the so-called tripping fault current is exceeded.
The construction of known fault current protective devices is known, for example, from "etc" (1986), Issue 20, pages 938 to 945. FIGS. 1 to 3 there show outline circuit diagrams and functional principles of a fault current circuit breaker (Fl circuit breaker) and of a differential current circuit breaker (DI circuit breaker). FI and DI circuit breakers are constructed, in a similar way from three assemblies. When a fault current occurs, a voltage signal is induced in the secondary winding of a core balance transformer, through whose transformer core all the current-carrying conductors of a conductor network are passed. This voltage signal actuates a tripping relay, which is connected to the secondary winding via tripping circuit electronics, or via a tripping circuit. The tripping relay then operates a switching mechanism, via which the conductors of the conductor network are disconnected. In this case, the tripping circuit of the FI circuit breaker is coupled purely inductively via the core balance transformer to the conductor network. It thus takes the energy required for tripping from the fault current itself, irrespective of the main system voltage. In contrast, in a DI circuit breaker, tripping takes place as a function of the main system voltage via an amplifier circuit, which is conductively connected to the conductor network.
The tripping fault current is defined in DIN VDE Standard 0664 Part 10 (=German translation of EN Standard 61008). This is the value of the fault current which causes an FI or DI circuit breaker to trip in defined conditions. In this case, the tripping fault current for, for example, sinusoidal alternating fault currents is 0.5 to 1.0 times the rated fault current, which is in turn a measure of the tripping sensitivity of the FI or DI circuit breaker. Thus, for example, in order to protect personnel coming into direct contact with active parts, the rated fault current must not exceed 30 mA, while an FI protective device with a rated fault current of more than 30 mA offers protection only against indirect contact.
The tripping response of the circuit breaker is furthermore normally also matched to a specific frequency, for example to 50 Hz, or to a specific frequency band, for example from 50 Hz to 400 Hz. Nevertheless, despite this matching, these protective devices can also offer personnel protection at higher frequencies, provided the tripping fault current is below the specified limit curve for ventricular fibrillation, in accordance with IEC Standard 60479. In accordance with this limit curve, the tripping current may rise to approximately 420 mA at 1 kHz, in order still to offer personnel protection.
In order to ensure, furthermore, that such a protective device provides fire protection as well, a maximum electrical power of 100 W must not be exceeded, irrespective of the frequency, in order to avoid fires. If the voltage between an outer conductor and ground is assumed to be 230 V, this results in a maximum tripping fault current of 430 mA, which must not be exceeded, in order to avoid fires. Other limit values for the tripping fault current for other main system voltages correspond to this.
However, DI and FI protective devices until now have had the problem that their tripping fault current rises continuously as the frequency increases and, at high frequencies, in particular in the kilohertz band, exceeds the maximum acceptable value for fire protection of, in this example, 430 mA. For applications in electrical systems in which frequency changers and appliances with pulsed power supplies are used, fault currents having fault current frequencies up to about 20 kHz, furthermore, can also occur in the event of a fault. Thus, the tripping fault current of the protective device or of the circuit breaker rises beyond the limit value, in the described manner, and fire protection is no longer ensured in all cases. As a result of the greatly increasing number of equipment items which can generate such fault currents at a relatively high frequency in the event of a fault, this problem is becoming increasingly important.
An embodiment of the invention is based on an object of specifying a protective device, in particular a fault current protective device, via which it is also possible to detect fault currents at a fault current frequency of more than 1 kHz. The tripping fault current should not exceed the respective predetermined limit values for personnel protection and fire protection, in particular over a frequency band from about 50 Hz to at least 20 kHz.
According to an embodiment of the invention, this object can be achieved by a protective device.
An embodiment may be based on the idea that, in the case of a protective device such as this and even over a wide frequency range from, for example, 50 Hz to at least 20 kHz, firstly, fire protection is ensured provided the tripping fault current is less than 430 mA for 100 W and 230 V and, secondly, at the same time, personnel protection is provided as long as the tripping fault current is always below the limit curve for ventricular fibrillation in accordance with IEC 60479. Since, as is known, the limit curve for ventricular fibrillation reaches a value of 420 mA at a fault current frequency of about 1 kHz, and is thus virtually equivalent to the limit value for fire protection, the tripping fault current would need to be restricted to this limit value only above a corresponding changeover frequency, while the tripping fault current for fault current frequencies below this changeover frequency should have a profile below the limit curve for ventricular fibrillation and, in this case, should follow this profile as closely as possible.
This can be achieved in a reliable manner via two detection systems of different design, one of which provides the tripping function below this changeover frequency, while the other provides the tripping function above this changeover frequency which is, for example, between 1 kHz and 5 kHz, and preferably in the band between 1 kHz and 2 kHz.
A first detection system, which provides the tripping function below the changeover frequency, can be expediently matched to a fault current frequency of 50 Hz, or for fault currents in the comparatively broad frequency band from, for example, 50 kHz to 400 kHz. At this frequency, or in this frequency band, the tripping conditions can be satisfied, in accordance with EN Standard 61008 (which corresponds to VDE 0664 Part 10) for a protective device which is sensitive to pulsed currents (corresponding to Type A in accordance with EN 61008). The first detection system may have added to it a detection system for smooth direct fault currents whose fault current frequency is 0 Hz, so that, overall, this results in a protective device which is sensitive to all currents.
The second detection system can be matched to a frequency band which is wider than that of the first detection system, such that, at least above the changeover frequency, the tripping signal of the second detection system is greater than the tripping signal of the first detection system. This advantageously means that the second detection system provides the tripping function above this changeover frequency. The tripping value, that is to say the tripping fault current of either the first detection system or of the second detection system, is thus always below the respectively lower limit value for ventricular fibrillation or fire protection. This ensures that the tripping fault current of the overall protective device is always below this limit value.
These two detection systems, which are matched to different frequency bands enable the tripping fault current of the protective device in the band above the changeover frequency to not only be below the limit curve for ventricular fibrillation, but to also be below the limit curve for reliable fire protection. Below the changeover frequency, the tripping fault current is, furthermore, also always below the limit curve for ventricular fibrillation, which rises continuously from about 50 Hz as the fault current frequency increases.
The two detection systems may each be formed from a core balance transformer and a tripping relay which is fed via the secondary winding of this core balance transformer. The two detection systems may also feed one tripping relay, which is common to the two of them. However, a single core balance transformer is expediently provided for both detection systems, in which case the core balance transformer, which is preferably designed to detect both low-frequency and high-frequency fault currents, then has two secondary windings, which once again preferably feed a common tripping relay.
To this end, the transformer core of the single core balance transformer is designed in accordance with Type AC from German Standard VDE 0664, Part 10, which corresponds to EN Standard 61008, for detecting sinusoidal alternating fault currents, or in accordance with Type A from EN Standard 61008 for detecting sinusoidal alternating fault currents and pulsating direct fault currents. In addition, the transformer core is designed to detect both low-frequency fault currents, in particular below 1 kHz, and high-frequency fault currents, in particular from 1 kHz up to at least 20 kHz. High-frequency fault current forms at, for example, several kilohertz are, in particular, detected by a core balance transformer whose transformer core is formed from nanocrystalline or amorphous material. The use of nanocrystalline core material for this purpose is known per se, for example from DE 197 02 371 A1. Such a material is a rapidly solidifying soft-magnetic alloy, whose electrical resistance is advantageously two to three times greater than that of crystalline soft-magnetic materials. In conjunction with small strip thicknesses, resulting from the production technique, of typically 20 μm, eddy current losses are considerably reduced, so that this amorphous or nanocrystalline material is particularly advantageous for the high-frequency band.
In order to decouple the two detection systems from one another, each of the two detection systems has its own rectifier. Each of the rectifiers is connected on the alternating current side to that secondary winding, which is associated with the respective detection system, of the core balance transformer, which is preferably shared by the two detection systems. Since both rectifiers are preferably connected on the direct current side to a single tripping relay, a decoupling diode is connected in at least one of the two direct current circuits formed in this way. This enables the tripping relay to not represent a load on the respective other detection system which in each case draws power from the respective detection system that is operating with the tripping function.
If a single core balance transformer with two secondary windings is used for both detection systems, high-frequency disturbance fault currents can lead to circulating currents flowing via the two detection systems and via the tripping relay. Since a short time delay, which is intended to cope with such disturbance influences or overvoltages which are normally transient, may not be sufficient to cope with such circulating currents simultaneously, at least in the second detection system for high-frequency fault currents, it is expedient to connect at least one inductor on the direct current side in the second detection system for high-frequency fault currents. This allows such circulating currents to be damped such that short-term high-frequency disturbance fault currents, for example resulting from switching operations in the main system, do not lead to spurious tripping.
The first detection system expediently has a low-pass filter, preferably in the form of a parallel capacitor. This is of such a size, and is designed such that the tripping fault current rises, at least up to the changeover frequency, as the fault current frequency increases, while at the same time being below the limit curve for ventricular fibrillation. In this case, when using a parallel capacitor whose capacitance is preferably of such a magnitude that sinusoidal alternating fault currents at an increasing frequency lead to tripping fault currents which rise steeply in precisely such a way that the profile of the tripping force current, which is dependent on the fault current frequency, is still below the limit curve for ventricular fibrillation, but is as close to it as possible, while maintaining a sufficient safety margin. Such a relatively steep rise in the tripping fault current profile means that the first detection system, and hence the protective device, is insensitive to transient fault currents, so that the protective device has particularly good resistance to spurious tripping.
As the component which governs its function, the first detection system for low-frequency fault currents has a series resistor, which follows that secondary winding of the core balance transformer which is associated with this first detection system and is connected upstream of the parallel capacitance, which acts as a low-pass filter. The secondary winding of the first detection system is thus not directly short-circuited via the parallel capacitance, even at high frequencies. This ensures that the second detection system always receives an input signal which can be evaluated, even in the event of high-frequency fault currents, and in particular above the changeover frequency. The series resistor in the first detection system thus acts as a defined burden for the core balance transformer at high fault current frequencies and, to a major extent, is an additional governing factor for the tripping fault current for the second detection system above the changeover frequency.
The rectifier is preferably followed, at least in the first detection system, by a smoothing capacitor which, on the direct current side, is connected in parallel with the tripping relay. A zener diode, which is connected in parallel with the tripping relay on the direct current side in the first detection system, limits the voltage across the tripping relay, and prevents it from being remagnetized by high fault currents, in order to prevent a failure to trip. The zener diode, which preferably has a zener voltage of 1 V, is operated by virtue of the technology in the forward direction, and additionally improves the resistance of the protective device to surge currents.
In order to avoid spurious tripping in response to brief high-frequency fault currents such as those which can occur when switching inductive loads on long cables - , the second detection system preferably has a short time delay. To this end, the second detection system has a time delay element, that is to say a delay circuit, formed by a parallel capacitor and a series resistor. For a fault current of 430 mA and a fault current frequency of not less than 3 kHz, the tripping time is set to about 300 ms. The tripping time is thus considerably shorter than the required disconnection time in the TN network, which means that this provides particularly reliable fire protection.
The tripping relay expediently has at least one zener diode connected in parallel with it, both in the first detection system and in the second detection system. While the zener diode in the first detections system limits the voltage across the tripping relay and prevents remagnetization (which would lead to a failure to trip) of the tripping relay in the event of high fault currents, preferably two series-connected zanar diodes in the second detection system additionally limit the disturbance voltages which are induced in that secondary winding of the core balance transformer which is associated with this second detection system. The limited disturbance voltages are masked out in conjunction with the time delay element (delay circuit). A resistor, which is expediently connected in parallel with the capacitor in the time delay element, allows the capacitor to discharge completely after such a disturbance event. In order to provide overvoltage protection for the components, on the one hand, while on the other hand providing as great a resistance to surge currents as possible, each detection system also has an overvoltage protective element, preferably a suppressor diode, connected in parallel with each secondary winding.
An exemplary embodiment of the invention will be explained in more detail in the following text with reference to drawings, in which:
Parts which correspond to one another are provided with the same reference symbols in all the figures.
The fault current protective device 1 which is illustrated in outline form in
During normal operation of the conductor main system LN and of the load, the vectorial sum of the currents flowing through the transformer core 6 is always zero. A disturbance occurs when, for example, an insulation fault results in some of the current that is supplied being carried away via ground as a fault current or differential current If on the load side. In this case, the vectorial sum of the currents flowing through the transformer core 6 assumes a value other than zero. This differential or fault current If induces an input or voltage signal Ue1, Ue2, in the secondary windings N1, N2, and this is used as a measure of the fault current If and is supplied to the respective detection system E1 or E2.
The respective detection system E1, E2 which is operating with a tripping function converts the input voltage E in the form of Ue1 or Ue2, respectively, to an output voltage Ua and to a corresponding current Ia which is passed through the tripping relay 3. If the fault current If exceeds a nominal or tripping value which is set in the first detection system E1 or in the second detection system E2, and/or in the tripping relay 3, the tripping relay 3 (which is connected on the output side to the two detection systems E1, E2 and is preferably in the form of a holding magnet) is tripped. In consequence, the switching mechanism 4 (which is coupled to the tripping relay 3) opens the switching contacts of the contact system 5, which acts on all the conductors Li in the conductor main system LN.
The first detection system E1 is in this case preferably matched to fault currents If of 50 Hz, so that, for this fault current frequency f, the tripping conditions are satisfied for sinusoidal alternating fault currents corresponding to Type AC in EN Standard 61008 or, at the same time, pulsating direct fault currents are satisfied in accordance with Type A of EN Standard 61008. As the fault current frequency f increases, the profile of the tripping fault current IA rises steeply with the fault current frequency f in such a way that it still maintains a sufficient safety margin below the limit curve G1, which is illustrated in
The profile of the tripping fault current IA, which is illustrated in the form of a frequency/tripping fault current graph in
In the exemplary embodiment, the first detection system "E1 operates without any delay with, for example, tripping times of τ≦40 ms being achieved for a fault current frequency f of, for example, 1 kHz and a fault current If of 420 mA, which represents the upper limit for ventricular fibrillation. The first detection system E1 may, however, also be designed to have a short time delay. Before the tripping fault current IA of the first detection system E1 reaches the maximum acceptable value of 430 mA for fire protection as the fault current frequency f increases, the second detection system E2 takes over the tripping function. This takes place above the changeover frequency fü, which is not less than 1 kHz. This is illustrated in the respective frequency/tripping fault current graphs in
The graphs shown in
The second detection system E2 is designed such that the tripping fault current IA has a sufficient safety margin below the value of 430 mA, which is the governing factor for fire
protection, from the changeover frequency fü up to a fault current frequency f of at least 20 kHz. At the same time, the tripping fault current Ia in this frequency band should be greater than 200 mA, to ensure that the FI protective device 1 is not sensitive to transient fault currents If in the higher frequency band, such as those which occur, for example, during switching operations in the conductor main system LN.
Furthermore, the FI protective device 1 is designed so as to ensure resistance to surge currents of more than 1000 A with an 8/20 μs wave in accordance with VDE Standard 0432, Part 2. Surge currents such as those which can occur as a result of lightning strikes are simulated in a surge current test such as this. In this case, the requirement is that tripping shall not occur in response to fault currents If of, for example, 250 A which last for a very short time (for example rise time 8 μs and full time, to half value, 20 μs) but whose amplitude is very high.
When a fault current If occurs, an input voltage Ue1 is induced in the secondary winding N1 of the first detection system E1, is rectified via a bridge rectifier formed by four diodes V3 to V6, and is smoothed by a smoothing capacitor C3, which is connected in parallel on the direct current side. The rectified output voltage Ua produces an output current Ia through the tripping relay 3. As soon as the fault current If reaches the tripping value, the tripping relay 3 trips and, via the switching mechanism 4, opens the switch in the contact system 5 of the FI protective device 1.
A suppressor diode V1, which is connected in parallel with the secondary winding N1 in the first detection system E1, limits the voltage induced in the secondary winding N1 to a specific value. This is done in order firstly to protect the components of the detection system A1 against overvoltages and in order, and secondly, to provide a high level of resistance to spurious tripping of the FI protective device 1 in the event of surge currents, for example as a result of lighting strikes, flowing via the primary winding (which is formed by the conductors Li,N) of the core balance transformer 2.
A series capacitor C1, which is connected on the alternating current side upstream of the bridge rectifier V3 to V6 in the detection system E1, forms, together with the inductance of the secondary winding N1, a resonant circuit, which is tuned to approximately 50 Hz, thus providing the tripping relay 3 with the maximum tripping volt amperes, and hence with the maximum possible tripping energy. A capacitor C2, which is connected in parallel with the secondary winding N1 in the first detection system E1, forms a low-pass filter and has a capacitance such that the tripping fault current IA rises as the fault current frequency f increases, but remain below the limit curve G1 for ventricular fibrillation. A series resistor R1 on the alternating current side prevents the secondary winding N1 of the first detection system E1 from being short-circuited directly via the capacitor C2 for high fault current frequencies f. Thus, for high fault current frequencies f, the resistor R1 acts as a burden for the core balance transformer 2 and is, to a major extent, an additional governing factor for the tripping fault current IA of the second detection system E2.
A zener diode V11, which is connected in parallel with the smoothing capacitor C3, limits the output voltage Ua across the tripping relay 3, which is preferably in the form of a holding magnet, and prevents it from being remagnetized by high fault currents If, which would otherwise lead to a failure to trip. In addition, the zener diode V11 improves the resistance of the protective device 1 to surge currents. The zener diode V11 used here has a zener voltage of 1 V and therefore, by virtue of the technology, is operated in the forward direction.
Above the changeover frequency fü which is, for example, between 1 kHz and 4 kHz, the output voltage Ua and the output current Ia (output signal Ua,Ia) of the first detection system I1 are less than the respective output voltage Ua and the output current Ia (output signal Ua,Ia) of the second detection system E1. The second detection system E2 thus takes over the tripping function above this changeover frequency fü.
The second detection system E2 likewise has a bridge rectifier with four diodes V7 to V10. The secondary winding N2 of the second detection system E2 is likewise followed, on the alternating current side, by a series capacitor C4, whose capacitance is, however, considerably less than the capacitance of the series capacitor C1 in the first detection system E1. This is because the detection system E2 is tuned to a higher resonant frequency than the detection system E1. This means that, in the lower frequency band, that is to say below the changeover frequency fü the second detection system E2 does not supply any output signal Ua,Ia which can be evaluated, thus preventing the output signals Ua,Ia from the two detection systems E1 and E2 from intersecting. The input voltage Ue2, which is induced by a high-frequency fault current If in the secondary winding N2 of the second detection system E2, is rectified in an analogous manner by the bridge rectifier V7 to V1, and its voltage is likewise limited by means of a suppressor diode V2, connected in parallel with the secondary winding Nz.
In order that short-term, high-frequency disturbance fault currents If with a time duration of a few milliseconds, such as those which occur when switching inductive loads on long cables, do not lead to spurious tripping, the second detection system E2 has a short time delay. In this case, the tripping time for a fault current frequency If of at least 3 kHz and for a fault current If of 430 mA is expediently about 300 ms. This tripping time is thus considerably shorter than the required disconnection time in the TN main system, thus providing optimum fire protection.
Disturbance voltages induced in the secondary winding N2 of the second detection system E2 are initially limited via two series-connected zener diodes V12 and V13, with this series circuit formed by the two zener diodes V12 and V13 being connected in parallel, on the direct current side, with the bridge rectifier V7 to V10. The zener diodes V12 and V13 likewise have a zener voltage of 1V and are thus likewise, by virtue of the technology, operated in the forward direction. When the zener diodes V12 and V13 respond, a resistor R2 limits the current spikes that occur in this case to a value which is compatible with the diodes V12 and V13.
The short time delay is produced via a time delay element (delay circuit) in the second detection system E2, comprising a parallel capacitor C5 on the alternating current side, and a series resistor R3 connected upstream of it. After a disturbance event, a parallel resistor R4 ensures that the capacitor C5 is discharged completely.
The capacitive coupling of the two secondary windings Ni and N2 of the core balance transformer 2 which is shared by the two detection systems E1 and E2 additionally allows circulating currents, which are caused by high-frequency disturbance fault currents If to flow via the two detection systems E1 and E2 and via the tripping relay 3. The short time delay via the delay element R3, C5 may thus, possibly, not be a sufficient measure on its own. Two inductors L1 and L2 are thus inserted into the secondary detection system E2, so that these circulating currents are reliably damped to such an extent that short-term, high-frequency disturbance fault currents If resulting from switching operations in the main system do not lead to spurious tripping.
In order to prevent the detection systems E1 and E2, which act on the tripping relay 3 that is shared by them, from influencing one another, a decoupling diode V14 is connected upstream of the tripping relay 3. The DC output voltages Ua which are produced by rectification of the input voltages Ue1 and Ue2 via the two detection systems E1 and E2, are thus decoupled via the diode V14. This in each case means that that detection system E1, E2 which is supplying the respectively higher output voltage Ua at a specific fault current frequency f takes over the tripping function, and trips the tripping relay 3.
The invention being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims.
Schmid, Reinhard, Kleemeier, Manfred, Lehner, Gerald
Patent | Priority | Assignee | Title |
10148083, | Jul 01 2015 | NR ELECTRIC CO , LTD; NR ENGINEERING CO , LTD | Fault current-suppressing damper topology circuit and control method thereof and converter |
10401848, | Feb 15 2013 | General Electric Company | Protection monitoring system with fault indicators |
6977445, | Nov 16 2001 | MKS Instruments, Inc | Three phase rectifier circuit with virtual neutral |
7129653, | Sep 30 2004 | ALLY BANK, AS COLLATERAL AGENT; ATLANTIC PARK STRATEGIC CAPITAL FUND, L P , AS COLLATERAL AGENT | Self-contained, self-snubbed, HID dimming module that exhibits non-zero crossing detection switching |
7157807, | Nov 16 2001 | MKS Instruments, Inc | Three phase rectifier circuit with virtual neutral |
7368882, | Sep 30 2004 | ALLY BANK, AS COLLATERAL AGENT; ATLANTIC PARK STRATEGIC CAPITAL FUND, L P , AS COLLATERAL AGENT | Self-contained, self-snubbed, HID dimming module that exhibits non-zero crossing detection switching |
7696639, | Nov 16 2001 | MKS Instruments, Inc. | Three phase rectifier circuit with virtual neutral |
9912147, | Dec 09 2012 | Interface having earth fault current |
Patent | Priority | Assignee | Title |
4091431, | Feb 13 1967 | Hubbell Incorporated | Ground leakage relay circuit |
4860146, | Dec 22 1986 | Siemens Aktiengesellschaft | Differential current protection circuit breaker |
DE19702371, | |||
DE3823098, | |||
EP454516, | |||
EP855779, |
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