In a semiconductor device, a plurality of wiring films are formed on a front surface of a base comprising an insulating resin and having electrode-forming holes, the surfaces of the wiring films and the surface of the base being positioned on the same plane and at least parts of the wiring films overlapping with the electrode-forming holes; a conductive material is embedded into the electrode-forming holes to form external electrodes on the back surface, away from the wiring films, of the base; a semiconductor element is positioned on the front surface of the base with an insulating film therebetween, the back surface of the semiconductor element being bonded to said front surface of the base; wires bond the electrodes of the semiconductor element to the corresponding wiring films; and a resin seals the wiring films and the wires.
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1. A method for making a film circuit comprising:
a step of forming wiring films on a nickel film for stopping etching as an underlying layer by plating using a mask film, the mask being selectively formed on a front surface of a metal substrate;
a step of forming a base comprising an insulating resin and having electrode-forming holes on the front surface of the metal substrate such that at least parts of the wiring films are partly exposed; and
a step of etching at least the region of the metal substrate, in which the wiring films are formed, from the back surface until the nickel film for stopping etching is exposed.
2. A method for making a film circuit according to
3. A method for making a film circuit according to
the metal film for stopping etching is deposited on the surface of the metal substrate;
a mask film is selectively formed on the metal film for stopping etching, and the wiring films are formed on the metal film as an underlying layer through the mask film by plating; and
after completing the etching step for exposing the metal film for stopping etching from the back surface at least in the region of the metal substrate in which the wiring films are formed, the metal film for stopping etching is removed.
4. A method for making a semiconductor device using a film circuit according to
5. A method for making a semiconductor device using a film circuit according to
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This application is a divisional of application Ser. No. 09/199,305, filed Nov. 25, 1998 now ABANDONED.
1. Field of the Invention
The present invention relates to a semiconductor device, a method for making the same, and to an electronic device utilizing the semiconductor device.
2. Description of the Related Art
In recent years, various wire-bond-type chip size packages (CSPs) have appeared in response to multi-electrode trends of semiconductor chips. Among the different types of CSPs,
Although the FPC type CPS shown in
Although the rigid substrate type has an advantage that no solder spherical electrode is formed, it is difficult to reduce the diameter of the electrode-forming holes to 0.35 mm or less. This is a factor limiting higher integration of semiconductor devices. Furthermore, production of a fine wiring film pattern is difficult, the appearance of the electrode-forming holes is inferior, and heat dissipation is slow. Since the electrode-forming holes are formed by drilling, production is difficult.
It is an object of the present invention to provide a CSP- or BGA-type semiconductor device that allows mounting of fine spherical electrodes.
It is another object of the present invention to provide a CSP- or BGA-type semiconductor device that achieves miniaturization of electrode-forming holes, fineness of a wiring film pattern, improved appearance, and simplified production process.
A first aspect of the present invention is a semiconductor device comprising: a plurality of wiring films formed on a front surface of a base comprising an insulating resin and having electrode-forming holes, the surfaces of the wiring films and the surface of the base being positioned on the same plane and at least parts of the wiring films overlapping with the electrode-forming holes; a conductive material embedded into the electrode-forming holes to form external electrodes on the back surface, away from the wiring films, of the base; a semiconductor element positioned on the front surface of the base with an insulating film therebetween, the back surface of the semiconductor element being bonded to the front surface of the base; and wires for bonding the electrodes of the semiconductor element to the corresponding wiring films.
Since the wiring films are formed on a front surface section of the base so as to embed them; surface steps are not formed. Since a sodium chloride is mounted onto the surface, bonding of the semiconductor device and wire bonding are readily performed, resulting in enhancing reliability of the semiconductor device. Since the electrode-forming holes are formed by exposure and development of the base, fineness and high integration permitting large-scale integration and multi-electrodes of the semiconductor device can be achieved.
A metal ring may be bonded on the front surface of the base at the exterior of the connecting sections with wires in the wiring films. In such a preferred embodiment, the ring is used as an electrical power source, for example, a ground source, as an electrostatic shield for electrostatically shielding between the semiconductor device and the exterior, and as a dam for preventing leakage of the sealing resin to the exterior.
A second aspect of the present invention is a method for making a film circuit comprising: a step of forming wiring films on a metal film for stopping etching as an underlying layer by plating using a mask film, the mask being selectively formed on a front surface of a metal substrate; a step of forming a base comprising an insulating resin and having electrode-forming holes on the front surface of the metal substrate such that at least parts of the wiring films are partly exposed; and a step of etching at least the region of the metal substrate, in which the wiring films are formed, from the back surface until the metal film for stopping etching is exposed.
Since the electrode-forming holes can be formed by patterning of the insulating resin on the metal substrate, fining of the electrode-forming holes can be achieved. Thus, the diameter of the electrode-forming holes can be reduced to 0.22 mm or less, whereas the lower limit of the diameter is 0.25 mm for a conventional FPC type, or 0.35 mm for a rigid substrate type. Such fining of the electrode-forming holes can increase the array density of the electrode-forming holes. The electrode-forming holes can be formed by patterning the insulating resin with a reduced working load and increased productivity compared with the formation of electrode-forming holes by drilling as in the rigid substrate type.
Preferably, the metal film for stopping etching is deposited on the surface of the metal substrate, a mask film is selectively formed on the metal film for stopping etching, and the wiring films are formed on the metal film as an underling layer through the mask film by plating; and the metal film for stopping etching is deposited on the surface of the metal substrate; a mask film is selectively formed on the metal film for stopping etching, and the wiring films are formed on the metal film as an underlying layer through the mask film by plating; and after completing the etching step for exposing the metal film for stopping etching from the back surface at least in the region of the metal substrate in which the wiring films are formed, the metal film for stopping etching is removed.
The region, in which at least wiring films are formed, of the metal substrate is etched from the back surface so that the underlying metal film for etching stop is exposed and the metal substrate remains as a ring at the exterior. Thus, the remaining section can be used as a ring. The ring can be used as a ground electrical source terminal and an electrostatic shield, as described above. Since the ring forms an outer shape of the semiconductor device and is formed by etching, working accuracy can be increased. Thus, the semiconductor device has high shape accuracy.
Since it is produced using a metal substrate as a mother material, deformation such as distortion will not occur during the production. Thus, working is easy. A large semiconductor device, therefore, can be readily formed.
A third aspect of the present invention is an electronic device comprising a semiconductor device comprising: a plurality of wiring films formed on a front surface of a base comprising an insulating resin and having electrode-forming holes, the surfaces of the wiring films and the surface of the base being positioned on the same plane and at least parts of the wiring films overlapping with the electrode-forming holes; a conductive material embedded into the electrode-forming holes to form external electrodes on the back surface, away from the wiring films, of the base; a semiconductor element positioned on the a front surface of the base with an insulating film therebetween, the back surface of the semiconductor element being bonded to the front surface of the base; and wires for bonding the electrodes of the semiconductor element to the corresponding wiring films.
A semiconductor device of the present invention comprises a plurality of wiring films formed on a front surface of a base composed of an insulating resin and having electrode-forming holes, the surfaces of the wiring films and the surface of the base being positioned on the same plane and at least parts of the wiring films overlapping with the electrode-forming holes; a conductive material embedded into the electrode-forming holes to form external electrodes protruding from the back surface of the base; a semiconductor element positioned on the front surface of the base with an insulating film therebetween, the back surface of the semiconductor element being bonded to the front surface of the base; wires for bonding the electrodes of the semiconductor element to the corresponding wiring films.
The semiconductor device can be produced by a method for making a semiconductor device comprising: a step of forming wiring films on a metal film for stopping etching as an underlying layer by plating using a mask film, the mask being selectively formed on a front surface of a metal substrate; a step of forming a base composed of an insulating resin and having electrode-forming holes on the front surface of tae metal substrate such that at least parts of the wiring films are partly exposed; and a step of etching at least the region of the metal substrate, in which the wiring films are formed, from the back surface until the metal film for stopping etching is exposed.
The metal substrate functions as a base material in the production of the semiconductor device including the formation of the wiring films and external electrodes by plating and as passage of a plating current, although it may later form an outer ring. It is preferable that the metal substrate comprise copper or a copper-based material having high conductivity. Since these materials have significantly high rigidity, they are not flexible even when thin, and thus have high workability. It is preferable that the thickness be approximately 150 um when copper or a copper-based material is used.
A photosensitive separable acrylic resist can be used as a mask film during plating for forming the wiring films. In this case, the mask film is formed by patterning including exposure and development and then the wiring films are formed using the mask film. After the plating treatment, the mask film is peeled off. An epoxyacrylic photosensitive eternal resist film (having a thickness of, for example, 40 um) may be used. Also, in this case, the mask film is Formed by patterning including exposure and development and the wiring films are formed by plating using the mask film. After the plating treatment, however, the resist film is not removed, although the mask film is peeled off. Thus, the surface of the wiring film and the surface of the base are positioned completely on the same plane; in other words, the surface is planarized. Nickel electrodes will be formed without deformation in the subsequent step, since the underlying layer does not have a stepped structure. The material is not limited to the above-mentioned one. For example, materials that function as masks when a wiring film of metal such as copper is formed are usable.
As a base, for example, a laminate film of a polyamic acid-type polyimide film and a photosensitive layer provided thereon (thickness: for example, 25 um) may be used. The laminate film is patterned by exposing and developing the photosensitive layer, and then etching the polyamic acid-type polyimide film with an etching solution such as an alkaline solution. The polyamic acid-type polyimide film is sufficiently cured by heat treatment at 280° C. for approximately 30 minutes. The thickness of the resist mask film is, for example, approximately 25 um. The entire mask film may be formed of a photosensitive resin and be patterned by exposure to form electrode-forming holes. In the formation of the base, various modifications are possible.
It is preferable that the wiring film be formed by plating copper on a nickel underlayer. Although the wiring film is formed by plating on a metal substrate composed of, for example, copper, it is difficult to deposit by directly plating a dense copper wiring film on the copper. Furthermore, when the wiring film is exposed by etching the metal substrate, an etching stopper is necessary to protect the copper wiring film from being etched. Nickel is most suitable for the etching stopper. The thickness of the nickel film may be, for example, 2 um. It is preferable that the thickness of the copper wiring film be, for example, 25 um, although it depends on the specifications and performance demands of the semiconductor device.
After forming the base having electrode-forming holes, external electrodes are formed by plating, for example, nickel with a thickness of 40 to 150 um thereon. Alternatively, they may be formed by plating nickel in a thickness of approximately 100 um and then by plating solder in a thickness of approximately 100 um, and by reflow-shaping the solder. Accordingly, various modifications are available for the formation of the external electrodes.
The metal substrate is etched from the back surface. Although the etching is essential for exposure of the wiring film, it may be performed on the entire surface or may be performed selectively. In selective etching, the etching is preferably performed in a region in which the wiring film is formed so that the metal substrate is left as a peripheral ring. The peripheral ring can be used as a reinforcing element, a ground electrode and an electrostatic shielding element of the electrical power source, and a dam for blocking the flow of the sealing resin (in the case of CSP). Thus, selective etching is preferred to complete etching. Etching can be performed using an alkaline etchant (ammonia type) that can etch copper but cannot etch nickel. Thus, nickel can function as an etching stopper.
It is preferable that the external electrode be formed of nickel and the surface of the nickel plating film be plated with gold, in view of satisfactory contact formation. Preferably, an underlayer is generally provided for gold plating. In this case, the external electrode and the metal film for stopping etching are formed of nickel; hence it is not necessary to form an additional nickel underlayer for satisfactory gold plating. Of course, the present invention is applicable to the above-mentioned embodiment in which the external electrode is formed of nickel and a solder plating film, and other embodiments.
The present invention is applicable to both CPS-type and BGA-type semiconductor devices.
The semiconductor device in accordance with the present invention can be used in various electronic devices, and in particular, compact electronic devices, such as portable phones, and contributes to miniaturization and improvement in reliability of the devices.
Preferred embodiments of the present invention will be described in detail with reference to the attached drawings.
With reference to
With reference to
When the resist film 2 is of an acrylic photosensitive separable type, it is removed. In contrast, when the resist film 2 is of an epoxyacrylic photosensitive inseparable type, it is not removed. A base 5 (thickness: for example 25 um) composed of, for example, a polyimide resin is formed and patterned to form electrode-forming holes 8 and smaller vent holes 10 at given positions.
The base 5 may be composed of, for example, a laminate film of a polyamic acid-based polyimide film and a photosensitive layer provided thereon. The base 5 is patterned by exposing and developing the photosensitive layer, and then etching the polyamic acid-type polyimide film with an etching solution such as an alkaline solution. The polyamic acid-type polyimide film is sufficiently cured by heat treatment at 280° C. for 30 minutes. The entire mask film may be formed of a photosensitive resin and may be patterned by exposure to form electrode-forming holes 8.
With reference to
With reference to
With reference to
A semiconductor element 14 is die-bonded on the heat dissipating plate 12 with, for example, a silver-paste film 13, followed by wire bonding.
With reference to
With reference to
In the semiconductor device shown in
In this semiconductor device, the wiring film 4 is formed on a surface section of the base 5 so as to be embedded; hence the front surface of the base 5 is planarized. Since the semiconductor element 14 is mounted on the flat surface, bonding and wiring of the semiconductor device can be readily performed, resulting in enhanced reliability of the semiconductor device. Since the semiconductor element 14 is provided on the surface without a stepped structure, die bonding and wire bonding characteristics of the semiconductor element 14 are improved and wiring films with a fine pattern can readily formed. Since the electrode-forming holes 8 are formed by exposure and development of the base 5, fining and high integration of the electrode-forming holes 8 can be achieved. Thus, high integration and multi-electrodes of the semiconductor device can also be achieved. Since the base 5 has vent holes 10, separation of the base 5 due to a popcorn phenomenon is prevented.
Since the peripheral metal ring 9 is provided at the exterior of the wire bonding sections of the wiring films 4 on the surface of the base 5, the peripheral ring 9 can be used as a ground electrode of an electrical power source, and as a electrostatic shield that electrostatically shields the semiconductor element 14 from the exterior. Also, it can be used as a dam that blocks the flow of the sealing resin to the exterior when resin sealing is performed, resulting in a decreased defect rate of the resin sealing.
In the method for making the semiconductor device shown in
According to such a method, the wiring films 4 are formed on the metal substrate 1 by plating using the resist film 2 as a mask, electrode-forming holes 8 are formed in a base 8, and then external electrodes 6 are formed by plating. Thus, the wiring films 4 and the external electrodes 6 are easily formed by electroplating, because the metal substrate is electrically connected to all of the wiring films 4 so that a potential required for electroplating is applied to all of the wiring films 4 through the metal substrate 1. Since electroplating can form a plating film having higher quality than that of electroless plating, satisfactory wiring films 4 and external electrodes 6 are readily formed. Thus, fine, high-density arrangement of the wiring films 4 and the external electrodes 6 can be achieved. With fineness of the wiring films, the number of the wiring films that are provided between the external electrodes can be increased; hence the number of the external electrode arrays and the number of the external electrodes can be increased.
Since the electrode-forming holes 8 can be formed by patterning the base 5 on the metal substrate 1, finesse of the electrode-forming holes 8 is achieved. The size of the electrode-forming holes 8 can be reduced to 0.22 mm or less in a rigid substrate type, whereas its lower limit is 0.5 mm for a conventional FPC type or 0.35 mm for a conventional rigid substrate type. Finesse of the electrode-forming holes 8 results in a higher array density of the electrode-forming holes 8. The electrode-forming holes 8 are formed by patterning the insulating resin, hence working is not troublesome and productivity is high compared with a method requiring drilling of the holes.
The region for forming the wiring films 4 of the metal substrate 1 is etched from the back surface until the nickel metal underlayer 3 for etching stop is exposed, so that the metal substrate 1 remains as a ring 9 at its exterior. The ring 9 can be used as a terminal of the ground electrical power source, and for electrostatic shielding, as described above. The ring 9 is formed in the peripheral region by etching, with high working accuracy. Thus, the semiconductor device has a peripheral form which is highly accurate.
In the production process of the semiconductor device, the metal substrate 1 is used as a base material, thus, deformation such as distortion does not occur in the production process. Thus, handling and working are facilitated. The peripheral ring 9 may be removed to miniaturize the semiconductor device in some cases. Since the resin 16 has reinforcement effects after resin sealing, the peripheral ring 9 also having reinforcement effects is not always essential and may be omitted in some cases. In such a case, the peripheral ring 9 may be removed to miniaturize the semiconductor device.
With reference to
With reference to
With reference to
With reference to
With reference to
A dam 18 is formed on the surface after removing the nickel film 3 by, for example, a screen printing process, so that it blocks the flow of the resin during the resin sealing process. The dam 18 is formed as a ring at the peripheral section of the resin-sealing region of the semiconductor device that will be bonded later.
With reference to
With reference to
The semiconductor device and the method for making the semiconductor device in accordance with the second embodiment also have similar advantages to those of the first embodiment. In the second embodiment, a possible modification is a metal substrate 1 not having a surface nickel film 3 as in the first embodiment. The peripheral ring 9 may be removed later to achieve miniaturization of the semiconductor device, because the reinforcing member 19 sufficiently develops the reinforcing and electrostatic functions in place of the peripheral ring 9.
The semiconductor device can be used in various electronic devices, and particularly meets the high demands of miniaturization in, for example, portable phones.
Patent | Priority | Assignee | Title |
6919264, | Sep 05 2002 | Polaris Innovations Limited | Method for the solder-stop structuring of elevations on wafers |
7126210, | Apr 02 2003 | STMicroelectronics, Inc. | System and method for venting pressure from an integrated circuit package sealed with a lid |
7303978, | Feb 01 2002 | Kyocera Corporation | Board for mounting BGA semiconductor chip thereon, semiconductor device, and methods of fabricating such board and semiconductor device |
7534716, | Apr 02 2003 | STMicroelectronics, Inc. | System and method for venting pressure from an integrated circuit package sealed with a lid |
8844826, | Jul 10 2006 | MORGAN STANLEY SENIOR FUNDING, INC | Integrated circuit transponder, method of producing an integrated circuit and method of producing a transponder |
Patent | Priority | Assignee | Title |
5976912, | Mar 18 1994 | Hitachi Chemical Company, Ltd. | Fabrication process of semiconductor package and semiconductor package |
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