A printed wiring board design aiding system comprises a first unit which acquires design layout information regarding a printed wiring board targeted for design, a second unit which acquires setting parameter information for the printed wiring board, which is targeted for design, and a third unit which estimates a value of the thickness of each of insulation layers of the printed wiring board in a post-manufacture state in accordance with the information acquired by the first unit and the information acquired by the second unit, and for outputting an estimated value.
|
1. A printed wiring board design aiding system comprising:
a printed wiring board design aiding module, including
means for acquiring design layout information regarding a printed wiring board targeted for design;
means for acquiring setting parameter information for the printed wiring board, which is targeted for design; and
means for estimating a value of the thickness of each of insulation layers of the printed wiring board in a post-manufacture state in accordance with the information acquired by the means for acquiring design layout information and the information acquired by the means for acquiring setting parameter information, and for outputting an estimated value.
5. A printed wiring board cad system comprising:
a printed wiring board cad processor;
a transmission line simulator; and
a printed wiring board design aiding module which acquires information of a pattern of a printed wiring board to be designed and information of individual parameters of the thickness of the pattern, the thickness of an insulation material, a resin content of a prepreg, the viscosity of the prepreg, a resin flow amount of the prepreg, and stack conditions as the setting parameters from the printed wiring board cad processor; and estimates either a value of a plate thickness of the printed wiring board or a value of the thickness of each of the insulation layers in accordance with the individual information; and feeds back an estimated value to the transmission line simulator.
6. A record medium having stored thereon a computer readable program for enabling a computer for causing a printed wiring board cad processor to aid a printed wiring board design, said program comprising:
a code means for enabling a printed wiring board design aiding module to aid the printed wiring board design, including
first code means for acquiring design layout information regarding a printed wiring board targeted for design from the printed wiring board cad processor;
second code means for acquiring setting parameter information for the printed wiring board targeted for design;
third code means for estimating a value of the thickness of each of insulation layers of the printed wiring board in a post-manufacture state in accordance with the information acquired by the first code means and the information acquired by the second code means and which outputs an estimated value.
2. The printed wiring board design aiding system according to
3. The printed wiring board design aiding system according to
4. The printed wiring board design aiding system according to
7. The record medium according to
8. The record medium according to
9. The record medium according to
10. The record medium according to
11. The record medium according to
|
|||||||||||||||||||||||||||
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2002-221828, filed Jul. 30, 2002, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The invention relates to a printed wiring board design aiding system, a printed wiring board CAD (computer aided design) system, and a record medium having stored thereon a computer readable program for enabling a computer for causing a printed wiring board CAD processor to aid a printed wiring board design
2. Description of the Related Art
A printed wiring board CAD is known as a tool for designing printed wiring boards. As data for the printed wiring board CAD data, various types of design information of, for example, patterns, through-holes, non-through-holes, vias, printed wiring board shapes are used. Besides the printed wiring board CAD, a CAE (computer aided engineering) is used to perform transmission line simulation by using CAD data.
In general practices, independently of CAD and CAE, work can take place that requires values of the plate thickness of a printed wiring board to be designed, the thickness of individual insulation layers thereof, and permittivities and dielectric loss tangents of the individual layers. In this case, the work is done without linking to CAD or CAE for the printed wiring board. As such, the work needs to be done in the stage of designing the printed wiring board in such a manner that the necessary values are discreetly obtained through calculations, and past referential data is used each time the need arises.
Problems as described below arise in the case of obtaining the thickness of the printed wiring board, the thicknesses of individual insulation layers, and permittivities and dielectric loss tangents of individual layers in the design stage of a printed wiring board.
(1) Thickness of Each Insulation Layer of Printed Wiring Board
A description will be provided with reference to an example of a printed wiring board with four-layer-passing through-holes. A general printed wiring board formed of four layers (L1 to L4) is formed through stacking processes. Specifically, individual prepregs between layers 1 and 2 (L1 and L2) and between layers 1 and 2 (L3 and L4) and individual copper foils of the layer L1 and the layer L4 are adhered onto a double-sided copper-clad laminate plate (core member) placed between the layers 2 and 3 (L2 and L3). Thereafter, through-hole forming openings are individually drilled in the laminate plate, and through-hole plating is applied. In this manner, individual four-layer-passing through-holes are formed.
In this case, the double-sided copper-clad laminate plate between the layers 2 and 3 is manufactured by a printed-wiring-board material manufacturer. As such, since factors causing variations to the thickness of the insulation layer of the double-sided copper-clad laminate plate are few, the thickness accuracy is high. However, the thicknesses of the insulation layers between the layers 1 and 2 and between the layers 3 and 4 are dependent on the manufacturing steps carried out by a printed-wiring-board manufacturer. More specifically, the thicknesses are determined depending on many parameters. The parameters include those representing, for example, residual-copper ratios the layers L2 and L3, pattern thicknesses of the layer L2 and L3, pattern shapes of the layers L2 and L3, resin contents of the prepregs, and the viscosities of the prepregs, resin flow amounts of the prepregs, stack conditions (stack times, temperatures, and pressures). Thus, the large number of parameters are involved that affect the thicknesses of the insulation layers between the layers 1 and 2 and between the layers 3 and 4. This makes it difficult to obtain the thicknesses through trivial calculations, and can cause deviations between measured values and trivially calculated values.
In addition, the thickness of each of the insulation layers of one printed wiring board is variable in distribution over one plane depending on the shape and the place of the pattern. Generally, it is known that an outside portion of a working panel used in the stacking process tends to be thin.
Depending on the case, the thicknesses of the insulation layers of the printed wiring board are each used for transmission line simulation. Printed wiring boards are each designed to be different depending on the types thereof, and each of the insulation layers thereof is variable depending on the parameters described above. As such, precise values cannot be obtained through trivial calculations. With values trivially obtained, a case can occurs in which thickness values used for the transmission line simulation deviate from actually measured values, in which the accuracy of the solution itself produced in the transmission line simulation is consequently low.
(2) Plate Thickness of Printed Wiring Board
Suppose a deviation occurs between a calculated value and a measured value of the thickness of each of the insulation layers of the printed wiring board. In this case, a deviation occurs between a calculated value and a measured value of the plate thickness of the printed wiring board, as a matter of course. A large deviation between the calculated value and the measured value of the plate thickness is large leads to problems as described hereunder. For example, a case assumed in which the printed wiring board is mounted in a product such as a notebook personal computer, which is to be fabricated to include the printed wiring board. In this case, since the thickness of the printed wiring board deviates from the design value, a problem occurs in that the position of a connector mounted on the printed wiring board does not match a connector position of a housing of the computer. By way of another example, when mounting surface-mounting type devices over the printed wiring board, solder paste is printed. In this case, when the thickness of the printed wiring board deviates from a design value, the amount of the print-applied solder paste deviates from an estimated amount. Consequently, a problem occurs in that soldering quality is not steady or consistent.
(3) Permittivities and Dielectric Loss Tangents
No problems occur if the interlayer materials are of one type. Generally, however, a printed wiring board is formed of composite materials including two or more different materials. For example, a generally used material is glass epoxy composed of a mixture of glass cloth and epoxy resin. The permittivity and the dielectric loss tangent of the composite material are variable depending on the contents of the individual materials containing therein. When the prepreg is such a composite material, the permittivity and the dielectric loss tangent before stacking (in a pre-stacking state) are different from those after stacking (in a post-stacking state). Although the prepreg is in the state of the composite material having a certain content before stacking, since, for example, the resin is caused to flow filling non-patterned portions in the stacking process, the content of the composite material is varied. Specifically, in the pre-stacking state, the glass epoxy has, for example, a resin content of 60% and a permittivity of 4.3. In comparison, since the resin flows after stacking, the average resin content is changed to 53%, and the permittivity is changed to 4.5 in the post-stacking state. Even in the case of one of the insulation layers of the printed wiring board, the permittivity and dielectric loss tangent thereof in a plane are individually different depending on, for example, the shape and the position of the pattern. Further problems can arise as described hereunder. With reference to
As described above, conventionally, suppose a printed wiring board, values of, for example, the plate thickness of the printed wiring board, the thicknesses of individual insulation layers, and the permittivities and dielectric loss tangents of individual layers are discreetly obtained. In addition, the values are obtained by, for example, performing calculations and using past referential data upon necessity during the design of each of the printed wiring boards. As such, deviations take place between the individual calculated values and measured values, thereby causing deficiencies in dimensions and electrical characteristics. This leads to problems of requiring much time and labor to obtain a desired product in the manufacture of a printed wiring board for which high mechanical and electrical accuracies are required.
According to one aspect of the invention, there are provided a printed wiring board design aiding system and a record medium having stored thereon a computer readable program for enabling a computer for causing a printed wiring board CAD (computer aided design) processor to aid a printed wiring board design. The system and program bring calculated values in the stage of designing the printed wiring board to be as close to measured values as possible, thereby enabling improvement of design accuracy of the printed wiring board for which high mechanical and electrical accuracies are required.
An embodiment of the invention is disclosed herein. The embodiment realizes functions of estimating values of a plate thickness of a printed wiring board and the thicknesses of individual insulation layers thereof. The functions estimate these values by using CAD data (two-dimensional data of, for example, patterns, through-holes, vias, and wiring-board shapes) provided for designing a printed wiring board. Concurrently, the functions estimate the values in consideration of design and manufacture parameters representing, for example, residual-copper ratios of patterns, thicknesses of the patterns, the shapes of the patterns, the resin contents of the individual insulation layers, the viscosities of the individual insulation layers, resin flow amounts of the individual insulation layers, and stack conditions (stack times, temperatures, and pressures). Using the above-described estimated values, the functions further estimate values of permittivities, dielectric loss tangents, and the like of the individual insulation layers, and presents the estimation results.
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate presently preferred embodiments of the invention, and together with the general description given above and the detailed description of the preferred embodiments given below, serve to explain the principles of the invention.
An embodiment of the invention will be described hereinbelow with reference to the drawings.
In more specific, the database 13 contains parameters that influence the plate thickness and individual layers of the printed wiring board that is to be designed. The parameters include those representing pattern thicknesses, insulation material thicknesses, resin contents of prepregs, viscosities of prepregs, resin flow amounts of the prepregs, and stack conditions (stack times, temperatures, and pressures).
The printed wiring board design aiding module 15 acquires two-dimensional (plane-based) design information for the printed wiring board, which is to be designed, from the printed wiring board CAD processor 11. In addition, from the database 13, the module 15 acquires the parameter information, which influences the plate thickness of the printed wiring board, which is to be designed, and the thicknesses of the individual layers thereof. More specifically, from CAD processor 11, the module 15 acquires individual design layout information of, for example, patterns, through-holes, non-through-holes, vias, wiring board shapes. From the database 13, the module 15 acquires the parameters representing, for example, the pattern thicknesses, pattern shapes, resin contents of the prepregs, the viscosities of the prepregs, resin flow amounts of the prepregs, and stack conditions (stack times, temperatures, and pressures).
Further, the printed wiring board design aiding module 15 estimates the post-manufacture values of plate thickness of the printed wiring board and the thicknesses of the individual insulation layers. The values are estimated in accordance with the design layout information acquired from the printed wiring board CAD processor 11 and the parameters acquired from the database 13. Furthermore, using these estimated values, the module 15 estimates the permittivities and dielectric loss tangents of the individual layers when necessary. Then, the module 15 displays the estimated values on the display section 14, and performs feedback of the estimated values to the transmission line simulator 12.
Processes according to the embodiment of the invention will now be described hereinbelow with reference to the individual drawings.
As shown in
The printed wiring board design aiding module 115 acquires individual design layout information of, for example, patterns, through-holes, non-through-holes, vias, printed wiring board shapes (step S11 shown in
Further, the printed wiring board design aiding module 15 performs estimation of various values (step S13 shown in
The process (step S13 shown in
The printed wiring board design aiding module 15 obtains values of the plate thickness of the printed wiring board to be manufactured and thicknesses of individual insulation layers. In addition, the module 15 obtains values of the permittivities and dielectric loss tangents of the individual layers when necessary. These values are obtained using design data acquired from the printed wiring board CAD processor 11 and the design and manufacture parameters stored in the database 13.
(I) Method of Obtaining Plate Thickness of Printed Wiring Board and Thicknesses of Individual Layers
The method obtains the plate thickness of the printed wiring board and the thicknesses of the individual layers in consideration of CAD data regarding on the printed wiring board and manufacturability of the printed wiring board.
For example, with reference to
With these variation factors being added to CAD data, the plate thickness of printed wiring board to be designed and the thicknesses of the individual insulation layers can be obtained. An essential feature is that the plate thickness of the printed wiring board and the thicknesses of the individual layers that conform to design information, such as the residual-copper ratios of individual conductors and the shapes of the patterns of the individual conductors, through-holes, non-through-holes, vias, and the printed wiring board, are obtained through linkage with the printed wiring board CAD processor 11. The thickness of each insulation layer of one printed wiring board is variable in distribution within one plane depending on the shape of the pattern and the position. However, linking with the printed wiring board CAD processor, the distributed in-plane thicknesses can be obtained.
In general, the printed wiring board CAD processor 11 and the transmission line simulator 12 are linked together. According to the embodiment of the invention, transmission line simulation is carried out using the resultant plate thickness (thickness distribution) of the printed wiring board and the resultant thicknesses of the individual insulation layers, the thicknesses having been obtained by the printed wiring board design aiding module 15. Consequently, the transmission line simulation can be implemented with high accuracy.
The thickness of the insulation layer will further be described hereinbelow.
The pre-stacking insulation layer thickness is related to the post-stacking insulation layer thickness as described hereunder.
(1) Pre-Stacking Insulation Layer Thickness
A printed wiring board using an ordinary glass epoxy resin includes a core (CCL) and a prepreg.
A printed-wiring-board manufacturer procures the core in a cured or solidified state (C stage), in which stacking does not vary the thickness of the core. However, since the manufacturer procures the prepreg in a semi-solidified state, stacking varies the thickness of the prepreg.
A cross section of a prepreg before being stacked pre-stacking prepreg is shown in
The thickness of the pre-stacking prepreg is similar in shape to the thickness of a sheet and is in a state where resin and glass cloth are mixed together at constant ratios of contents. Reference characters A and B represent the volume percentage of the resin and the volume percentage of the glass cloth, respectively, with their relationship (A+B=1). When the area of the prepreg is represented by reference character S and the thickness thereof is represented by reference character Z, the resin content is expressed by Equation (1) shown below.
Resin Content=S×Z×A (1)
(2) Post-Stacking Insulation Layer Thickness
A cross section of the prepreg after being stacked (post-stacking prepreg) is shown in
After the prepreg is processed in the stacking step, the thickness of the prepreg is changed from Z to Z′. Portions where the pattern L2 is not formed are filled with the flowing resin.
The resin content is expressed by Equation (2) shown below, where factors in
Resin Content=S×Z′×A+(1−C)×H×S+D (2)
Since the pre-stacking resin content is the same as the post-stacking resin content (Equation (3)), the relationship Equation (1)=Equation (2) is established, and the post-stacking thickness Z′ becomes as expressed by Equation (4).
S×Z×A=S×Z′×A′+(1−C)×H×S+D (3)
Z′=(Z−(1−C)×H−D/S)/A′ (4)
The resin flow amount D in Equation (4) is a function as represented by a parameter shown in Equation (5).
D=f (prepreg viscosity, stack conditions (stack time, temperature, and pressure)) (5)
(II) Method of Obtaining Permittivities and Dielectric Loss Tangents of Individual Layers
Basically, a method of obtaining the permittivities and the dielectric loss tangents is based on the same concept as that for the method of obtaining the plate thickness of the printed wiring board and the thicknesses of the individual layers. The printed wiring board design aiding module 15 obtains the permittivity and dielectric loss tangent of the insulation layer of the printed wiring board in consideration of CAD data regarding the printed wiring board and manufacturability of the printed wiring board. In a case where the material of each of the insulation layers is a compound of two or more materials, the permittivity and the dielectric loss tangent are variable depending on the content of each of the composite materials. Even in the case one of the insulation layers, the permittivity and the dielectric loss tangent thereof in a plane are individually different depending on, for example, the shape and the position of the pattern.
By way of example, with reference to
The printed wiring board design aiding module 15 is capable of calculating variation factors and obtaining the permittivities and the dielectric loss tangents of the printed wiring board to be designed. An essential feature is that the permittivities and dielectric loss tangents of the individual insulation layers that conform to design information, such as the residual-copper ratios of individual conductors and the shapes of the patterns of the individual conductors, through-holes, non-through-holes, vias, and the printed wiring board, are obtained through linkage with the printed wiring board CAD processor 11. The permittivities and dielectric loss tangents of the insulation layers of the printed wiring board to be designed are variable in distribution within one plane depending on the shape of pattern and the position. Nevertheless, however, since linking is made with the printed wiring board CAD processor, distribution of in-plane the permittivity and the dielectric loss tangent of the insulating layers can be obtained.
In general, the printed wiring board CAD processor 11 and the transmission line simulator 12 are linked together. Transmission line simulation is carried out using the resultant of the permittivities and dielectric loss tangents of the insulation layers of the printed wiring board, which have been obtained by the printed wiring board design aiding module 15. Consequently, the transmission line simulation can be implemented with high accuracy.
The permittivity will further be described hereinbelow.
(1) Pre-stacking Permittivities
Ordinary, glass cloth has a permittivity of 7.0, and an epoxy base resin has a permittivity of 3.6.
Reference characters A and B represent the volume percentage of the resin and the volume percentage of the glass cloth, respectively. The permittivity of the resin is represented by εresin, the permittivity of the glass cloth is represented by εglass, and the permittivity of the pre-stacking glass epoxy is represented by εbefore. These variables have the relationship as expressed by Equation (6) shown below.
Logεbefore=ALogεresin+BLogεglass (6)
(2) Post-stacking Permittivities
Reference characters A′ and B′ represent the volume percentage of the post-stacking resin and the volume percentage of the post-stacking glass cloth, respectively. The volume percentage of the post-stacking resin of the area Z′ shown in
Logεafter=A′Logεresin+B′Logεglass (7)
As described above, using CAD data for designing the printed wiring board and the design and manufacture parameters relative to the printed wiring board, the printed wiring board design aiding module 15 is used to obtain the plate thickness of the printed wiring board and the thicknesses of the individual insulation layers thereof. In addition, as the necessity arises, the module 15 is used to obtain the permittivities and dielectric loss tangents of the individual layers. This enables the individual items of information even closer to an actually manufactured printed wiring, such as the plate thickness of the printed wiring board, the thicknesses of the individual insulation layers, and the permittivities and dielectric loss tangents of the individual layers, to be obtained. In addition, these items of information are displayed on the display section 14, and are fed back to the transmission line simulator 12. Therefore, accuracy with respect to, particularly, the individual layers of the printed wiring board and in the direction to the overall thickness thereof can be improved even higher.
Accordingly, calculated values in the stage of designing the printed wiring board can be brought closer to measured values. Consequently, improvement can be achieved in the design accuracy of printed wiring boards for which high mechanical and electrical accuracies are required.
Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.
| Patent | Priority | Assignee | Title |
| 7827519, | Dec 29 2006 | Cadence Design Systems, INC | Method, system, and computer program product for preparing multiple layers of semiconductor substrates for electronic designs |
| 7962866, | Dec 29 2006 | Cadence Design Systems, INC | Method, system, and computer program product for determining three-dimensional feature characteristics in electronic designs |
| 8769453, | Dec 29 2006 | Cadence Design Systems, Inc. | Method, system, and computer program product for preparing multiple layers of semiconductor substrates for electronic designs |
| 9519732, | Mar 13 2013 | Cadence Design Systems, Inc. | Methods, systems, and articles of manufacture for implementing pattern-based design enabled manufacturing of electronic circuit designs |
| Patent | Priority | Assignee | Title |
| 6753253, | Jun 18 1986 | Renesas Technology Corporation | Method of making wiring and logic corrections on a semiconductor device by use of focused ion beams |
| JP2001273350, |
| Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
| Jul 10 2003 | HAPPOYA, AKIHIKO | Kabushiki Kaisha Toshiba | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 014324 | /0690 | |
| Jul 23 2003 | Kabushiki Kaisha Toshiba | (assignment on the face of the patent) | / |
| Date | Maintenance Fee Events |
| Jun 15 2009 | REM: Maintenance Fee Reminder Mailed. |
| Dec 06 2009 | EXP: Patent Expired for Failure to Pay Maintenance Fees. |
| Date | Maintenance Schedule |
| Dec 06 2008 | 4 years fee payment window open |
| Jun 06 2009 | 6 months grace period start (w surcharge) |
| Dec 06 2009 | patent expiry (for year 4) |
| Dec 06 2011 | 2 years to revive unintentionally abandoned end. (for year 4) |
| Dec 06 2012 | 8 years fee payment window open |
| Jun 06 2013 | 6 months grace period start (w surcharge) |
| Dec 06 2013 | patent expiry (for year 8) |
| Dec 06 2015 | 2 years to revive unintentionally abandoned end. (for year 8) |
| Dec 06 2016 | 12 years fee payment window open |
| Jun 06 2017 | 6 months grace period start (w surcharge) |
| Dec 06 2017 | patent expiry (for year 12) |
| Dec 06 2019 | 2 years to revive unintentionally abandoned end. (for year 12) |