Current generation digital media processors support multi-format video resolutions, SDTV, Progressive Scan and HDTV. Built-in video encoders directly support NTSC and progressive 480P video outputs. These two video formats have different image bandwidth and output gain requirements, but are normally filtered by fixed bandwidth filters. This invention provides adjustable filter bandwidth for improved video filtering and solves the dilemma on filter bandwidth design for multi-format video applications. The invention is applicable to video reconstruction filter applications requiring bandwidth adjustable filters.
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1. A selectable low pass filter comprising:
an input filter section including
an input terminal,
a first shunt resistor (Rs) connected between said input terminal and ground,
a first shunt capacitor (CA) connected between said input terminal and ground, and
a first series inductor (LA) connected between said input terminal and an output terminal of said input section;
an output amplifier section including
an operational amplifier having a first input forming an input of said output amplifier section, a second input and an output generating a output of said low pass filter,
a feedback resistor (R2) connected between said second input of said operational amplifier and said output of said operational amplifier, and
a first gain control resistor (R1) connected between said second input of said operational amplifier and ground; and
a central filter section having an input connected to said output of said input section and an output connected to said input of said output amplifier section, said central filter section being selectively configurable into a first configuration having a first cutoff frequency and a second configuration having a second cutoff frequency different from said first cutoff frequency, wherein said central filter section includes
a second series inductor (LB) connected between said input of said central filter section and an intermediate node of said central filter section,
a second shunt capacitor (CC) connected between said intermediate node of said central filter section and ground,
a third series inductor (LC) connected between said intermediate node of said central filter section and said output of said central filter section,
a third shunt capacitor (CB) having a first terminal connected to said input of said central filter section and a second terminal,
a first mosfet (304) having a source-drain path connected between said second terminal of said third shunt capacitor (CB) and ground and a gate receiving a first control signal (SW1),
a second shunt resistor (RL) having a first terminal connected to said output of said central filter section and a second terminal, and
a second mosfet (305) having a source-drain path connected between said second terminal of said second shunt resistor (RL) and ground and a gate receiving said first control signal (SW1),
a fourth shunt capacitor (CD) having a first terminal connected to said input terminal and a second terminal,
a third mosfet (301) having a source-drain path connected between said second terminal of said fourth shunt capacitor (CD) and ground and a gate receiving a second control signal (SW2),
a fifth shunt capacitor (CE) having a first terminal connected to said intermediate node of said central filter section and a second terminal,
a third shunt resistor (R0) having a first terminal connected to said intermediate node of said central filter section and a second terminal connected to said second terminal of said fifth shunt capacitor (CE), and
a fourth mosfet (302) having a source-drain path connected between said second terminal of said fifth shunt capacitor (CD) and ground and a gate receiving said second control signal (SW2);
wherein in said first configuration said first control signal (SW1) turns said first mosfet (302) OFF and second mosfet (303) OFF and said second control signal (SW2) turns said third MOSET (301) ON and said fourth mosfet (302) ON; and
wherein in said second configuration said first control signal (SW1) turns said first mosfet (302) ON and second mosfet (303) ON and said second control signal (SW2) turns said third MOSET (301) OFF and said fourth mosfet (302) OFF.
2. The selectable low pass filter of
said central filter section further includes
a second gain control resistor (R3) having a first terminal connected to said second input of said operational amplifier and a second terminal,
a fifth mosfet (303) having a source-drain path connected between said second terminal of said second gain control resistor (R3) and ground and a gate receiving said second control signal (SW2);
wherein in said first configuration said second control signal (SW2) turns said fifth MOSET (303) ON causing said output amplifier section to have a first gain; and
wherein in said second configuration said second control signal (SW2) turns said fifth MOSET (303) OFF causing said output amplifier section to have a second gain.
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The technical field of this invention is video filtering.
New generation digital media processors support multi-format resolutions among which are standard density TV (SDVT), progressive scan and high density TV (HDTV). The built-in video encoder of these new media products directly supports national television standards committee specification (NTSC) and the progressive scan 480P video standard specification. These two video formats have different sampling rate requirements for different video signal bandwidth. NTSC video bandwidth is about 4.2 MHz to 5 MHz and requires video filter with cutoff frequency at about 6.25 MHz. Progressive scan 480P requires cutoff frequency at about 12.5 MHz for its wider video bandwidth filtering.
When the video encoder digital-to-analog (DAC) outputs NTSC signals a gain of 5.3 is needed in order to meet international television standards (ITU) video standard on level requirement. However, when the media processor outputs progressive scan 480P video in component video or RGB signals, the video standards require a gain of 4. Thus a design employing a fixed-bandwidth filter and gain can meet only limited video format requirements. Accordingly there is a need in the art for a video encoder and filter able to operate in plural video formats.
Current generation digital media processors support multi-format video resolutions, such as standard density TV (SDTV) and progressive scan and high density TV (HDTV). Built-in video encoders directly support NTSC and progressive 480P video outputs. These two video formats have different image bandwidth and output gain requirements, but are normally filtered by fixed bandwidth filters. This invention provides adjustable filter bandwidth for improved video filtering and solves the dilemma regarding filter bandwidth for multi-format video applications. The invention is applicable to video reconstruction filter applications requiring bandwidth adjustable filters.
These and other aspects of this invention are illustrated in the drawings, in which:
A filter design of fixed frequency response and gain meets only one video format requirement. Some designs have previously used simple filters with wider bandwidth to provide filtering for progressive video and passed SDTV with little or no filtering. The present invention is a filter providing adjustable filter bandwidth and gain control at nominal cost and power consumption.
Low pass filter (LPF) designs normally have a topology with a serial inductor in the video signal path and a capacitor in shunt to ground. Changing the shunt capacitance by switching in another capacitance can easily change the filter bandwidth. This apparently simple low cost solution has significant mathematical complications.
The normalized transfer function for this filter with equal termination resistance values (Rs=RL) is:
The ladder filters illustrated in
The transfer function of the second order Butterworth filter of the type illustrated in
To implement second order Butterworth filter, first set:
λc=aA2 and λ+c=2A1 (5)
Solving equations (5) simultaneously yields:
λ=A1±√{square root over (A12−2A1)} (6)
With
A12=2A2 (7)
in the 2nd order Butterworth polynomial, we have:
λ=A1 and c=A1 (8)
Therefore the result is the following two equations:
In equations (9) and (10) a change in fc requires a change in both L and C. Thus it is impossible to change second order Butterworth filter bandwidth from one cutoff frequency to another frequency by adjusting only capacitance and retaining fixed inductance. Both L and C have to be adjusted when cutoff frequency fc varies. This is true not only in second order filter, but can be shown mathematically as also true in higher order filters.
Table 1 lists the capacitances and inductances of other higher order Butterworth filters derived mathematically similar to equations (9) and (10).
TABLE 1
Order
C1
L1
C2
L2
C3
L3
1
2
3
4
5
6
To implement a second order Butterworth filter set:
Extensive analysis has shown that it is not possible to meet both NTSC broadcast standards and 480P video standards using an adjustable filter of a given order by half frequency without adjusting both the inductances and capacitances. On the other hand transforming the filter from one order to another order allows adjustment of bandwidth to be achieved by adjusting only the capacitance values. Considering only third to sixth order Butterworth filters, there are 56 possible filter pairs.
Table 1 shows that two pairs of Butterworth filters have a transform meeting the design requirements of both NTSC and 480P formats. These two pairs are: fifth order filter and third order filter; and sixth order filter and third order filter.
Holding inductance values constant for a given filter, a change from sixth order to third order requires that:
(L1+L2)6th=(L1)3rd (12)
Table 1 gives the relationship between bandwidth and inductance values of a sixth order filter:
Table 1 gives the relationship between bandwidth and inductance values of a third order filter:
Solving (12), (13), and (14) simultaneously yields:
And the ratio of f3 to f6 is given by:
Similarly, the ratio of f3 to f5 is given by:
These equations indicate that if a sixth order Butterworth filter with cutoff frequency at f6=12.5 MHz is designed for progressive 480P video, then a cutoff frequency at f3=7.47 MHz (=12.5/1.673) of 3rd order could be reached by changing only the capacitances.
Alternatively, if a fifth order Butterworth filter with cutoff frequency at fs=12.5 MHz is designed for progressive 480P video, then a cutoff frequency at f3=7.725 MHz (=12.5/1.618) of third order could be reached by changing only the capacitances.
The filter bandwidth is selected by:
TABLE 2
Butterworth
Cutoff
SW1
SW2
Order
Frequency
high
low
Sixth
12.5 MHz
low
high
Third
7.5 MHz
Transistors 301, 302, 303, 304 and 305 are P-type metal oxide field effect transistors (MOSFET). These MOSFETs are conducting with a high voltage on the gate and non-conducting with a low voltage on the gate. High and low voltages are determined relative to the voltage threshold of the MOSFET.
With SW1 low and SW2 high transistors 301, 302 and 303 are on, transistors 304 and 305 are off, and the circuit of
With SW1 high and SW2 low transistors 301, 302 and 303 are off, transistors 304 and 305 are on, and the circuit of
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
6838946, | Apr 10 2002 | Qualcomm Incorporated | Circuit and method for adjusting circuit tolerances |
Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Sep 22 2008 | Texas Instruments Incorporated | (assignment on the face of the patent) | / | |||
Oct 21 2008 | ZHU, XIAOMING | Texas Instruments Incorporated | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 021775 | /0501 |
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