Various embodiments of systems and methods for generating local oscillator (LO) signals for a harmonic rejection mixer are provided. One embodiment is a system for generating local oscillator (LO) signals for a harmonic rejection mixer. One such system comprises a local oscillator, a divide-by-n frequency divider, a divide-by-three frequency divider, and a harmonic rejection mixer. The local oscillator is configured to provide a reference frequency signal. The divide-by-n frequency divider is configured to divide the reference frequency signal by a value n and provide an output signal. The divide-by-three frequency divider is configured to receive the output signal of the divide-by-n frequency divider and divide the output signal into three phase-offset signals. The harmonic rejection mixer is configured to receive the three phase-offset signals and eliminate third frequency harmonics.
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1. A system for generating local oscillator (LO) signals for a harmonic rejection mixer, the system comprising:
a local oscillator configured to provide a reference frequency signal;
a divide-by-n frequency divider configured to divide the reference frequency signal by a value n and provide an output signal;
a divide-by-three frequency divider configured to receive the output signal of the divide-by-n frequency divider and divide the output signal into three phase-offset signals, the three phase-offset signals include a first signal b0° offset by 0 degrees, a second signal b60° offset by 60 degrees, and a third signal b120° offset by 120 degrees; and
a harmonic rejection mixer configured to receive the three phase-offset signals and eliminate third frequency harmonics, when implemented in a transmitter having at least two input signals I(t) and Q(t) and an output signal v0(t), the harmonic rejection mixer generating the output signal v0(t) according to the following equation:
v0(t)=[(√3b0°(t)+√3b60°(t)) I(t)]+[(−b0°(t)+b60°(t)+2b120°(t))Q(t)]. 9. A portable transceiver comprising:
a local oscillator configured to provide a reference frequency signal; and
a harmonic rejection transmitter or receiver including:
a divide-by-n frequency divider configured to divide the reference frequency signal by a value n and provide an output signal;
a divide-by-three frequency divider configured to receive the output signal of the divide-by-n frequency divider and divide the output signal into three phase-offset signals, the three phase-offset signals include a first signal b0°offset by 0 degrees, a second signal b 60° offset by 60 degrees, and a third signal b120°offset by 120 degrees at a fundamental frequency of operation; and
a harmonic rejection mixer configured to receive the three phase-offset signals and eliminate third frequency harmonics, when implemented in a transmitter having at least two input signals I(t) and Q(t) and an output signal v0(t), the harmonic rejection mixer generating the output signal v0(t) according to the following equation:
v0(t)=[(√3b0°(t)+√3b60°(t)) I(t)]+[(−b0°(t)+b60°(t)+2b120°(t))Q(t)]. 13. A system for generating local oscillator (LO) signals for a harmonic rejection mixer, the system comprising:
a local oscillator configured to provide a reference frequency signal;
a divide-by-two frequency divider configured to divide the reference frequency signal for a highband transmit signal;
a divide-by-n frequency divider configured to divide the reference frequency signal by a value n for a lowband transmit signal;
a divide-by-three frequency divider configured to receive an output signal of the divide-by-n frequency divider and divide the output signal into three phase-offset signals;
a phase recombiner configured to receive the three phase-offset signals and provide four phase-offset signals; and
a harmonic rejection mixer configured to receive the four phase-offset signals and eliminate third and fifth frequency harmonics, the harmonic rejection mixer including a plurality of mixer elements, each mixer element configured with at least one modulator weight and including a double-balanced Gilbert mixer, the at least one modulator weight of each mixer element based on at least one of a resistor value, widths of current sourcing transistors, and widths of input differential pair transistors of the double-balanced Gilbert mixer.
2. The system of
3. The system of
5. The system of
6. The system of
I(t)=(√3b0°(t)+√3b60°(t))RF(t) Q(t)=(−b0°(t)+b60°(t)+2b120°(t))RF(t). 7. The system according to
8. The system according to
10. The portable transceiver of
11. The portable transceiver according to
12. The portable transceiver according to
14. The system of
15. The system of
16. The system of
C0°(t)=√3b0°(t)+√3b60°(t) C90°(t)=−b0°(t)+b60°(t)+2b120°(t) C45°(t)=(√3−1)b0°(t)+(√3+1)b60°(t)+2b120°(t) C−45°(t)=(√3+1)b0°(t)+(√3−1)b60°(t)−2b120°(t). 17. The system of
I(t)=[√3b0°(t)+√3b60°(t)]RF(t) Q(t)=[−b0°(t)+b60°(t)+2b120°(t)]RF(t). |
Radio frequency (RF) transmitters are found in many one-way and two-way communication devices, such as portable communication devices, cellular telephones, personal digital assistants (PDAs) and other communication devices. An RF transmitter transmits using whatever communication methodology is dictated by the particular communication system within which it is operating. RF transmitters are often incorporated into devices that support transmission of voice or data at multiple frequency bands. Such RF transmitters typically employ an upconversion process to control the transmit frequency of the device. In general, the upconversion process involves super-imposing baseband information on a high frequency carrier signal.
Typically, an upconverter uses one or more mixers to upconvert a baseband signal or an intermediate frequency signal (e.g., a local oscillator (LO) signal) to an RF signal. A considerable problem with a conventional mixer used in an upconverter is that it generates undesirable noise. To suppress the noise, a local oscillator (LO) signal may be hard-switched or a square wave may be applied instead of a sinusoidal signal. As a result, the output signal may contain the modulated signal around the intermediate frequency (ωLO) and unwanted harmonics at odd harmonics, such as, third, fifth, and seventh harmonics. These harmonics create unwanted spurious power that may, for example, violate transmit mask requirements or may cause distortions in the transmitted output signal when they pass through output buffers or power amplifiers that may have non-linear operational characteristics. Therefore, it is desirable to remove these harmonics.
In a conventional mixer, passing ωLO but rejecting the odd harmonics (e.g., 3ωLO, 5ωLO) typically requires a relatively high-Q filter. The filter requirements may be simplified by using a harmonic rejection mixer. A typical third harmonic rejection mixer obtains four signals (A0°, A60°, A90°, A150°) by squaring, or passing through a limiter, sinusoidal signals at the local oscillator (LO) frequency with phase differences of 0, 60, 90, and 150 degrees with respect to each other. The sinusoidal signals are usually generated by using poly-phase filters that may include resistive-capacitive (RC) sections that realize phase shift. However, poly-phase filters are bulky, narrow-band, and consume a lot of power.
Thus, there is a need for improved systems and methods for implementing a harmonic rejection transmitter.
Various embodiments of systems and methods for implementing a harmonic rejection mixer are provided. One embodiment is a system for generating local oscillator (LO) signals for a harmonic rejection mixer. One such system comprises a local oscillator, a divide-by-N frequency divider, a divide-by-three frequency divider, and a harmonic rejection mixer. The local oscillator is configured to provide a reference frequency signal. The divide-by-N frequency divider is configured to divide the reference frequency signal by a value N and provide an output signal. The divide-by-three frequency divider is configured to receive the output signal of the divide-by-N frequency divider and divide the output signal into three phase-offset signals. The harmonic rejection mixer is configured to receive the three phase-offset signals and eliminate third frequency harmonics.
The drawings and detailed description that follow are not exhaustive. The disclosed embodiments are illustrated and described to enable one of ordinary skill to make and use the invention. Other embodiments, features and advantages of the invention will be or will become apparent to those skilled in the art upon examination of the following figures and detailed description. All such additional embodiments, features and advantages are within the scope of the disclosed systems and methods as defined in the accompanying claims.
The components within the figures are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the invention. Moreover, in the figures, like reference numerals designate corresponding parts throughout the different views.
Various exemplary embodiments of systems and methods for generating local oscillator (LO) signals for a harmonic rejection mixer (HRM) are described with particular reference to a portable transceiver operating in the global system for mobile communications (GSM) communication system, although the LO signal generation systems and methods may be incorporated in any transmitter implementing a HRM to upconvert a radio frequency (RF) signal. Furthermore, the LO signal generation systems and methods for a HRM may be implemented in hardware, software, firmware, or any combination thereof. When implemented in hardware, the systems and methods may be implemented using specialized hardware elements and logic. When the systems and methods are implemented wholly or partially in software, the software may be used to control the various components in the transmitter. The software may be stored in a memory and executed by a suitable instruction execution system (e.g., a microprocessor). The hardware implementations may include any or a combination of the following technologies, which are all well known in the art: discrete electronic components, a discrete logic circuit(s) having logic gates for implementing logic functions upon data signals, an application specific integrated circuit having appropriate logic gates, a programmable gate array(s) (PGA), a field programmable gate array (FPGA), etc.
For software embodiments, the software for the LO signal generation systems and methods for a HRM may comprise an ordered listing of executable instructions for implementing logical functions, and may be embodied in any computer readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. The computer readable medium may be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. The computer readable medium may be, for example but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium. More specific examples (a non-exhaustive list) of the computer readable medium may include the following: an electrical connection (electronic) having one or more wires, a portable computer diskette (magnetic), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory) (magnetic), an optical fiber (optical), and a portable compact disc read-only memory (CDROM) (optical). Note that the computer readable medium may even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
The analog circuitry 124 provides the analog processing functions for the signals within the baseband subsystem 110. The baseband subsystem 110 communicates with the radio frequency (RF)/mixed signal device (MSD) subsystem 130 via the bus 128.
The RF/MSD subsystem 130 includes both analog and digital components. Generally, the RF/MSD subsystem 130 includes a receiver 200, a synthesizer 300 and a harmonic rejection transmitter 400. In the embodiment illustrated in
The ADC 134, the DAC 142 and the DAC 144 also communicate with the microprocessor 120, the memory 122, the analog circuitry 124 and the DSP 126 via the bus 128. The DAC 144 converts the digital communication information within the baseband subsystem 110 into an analog signal for transmission by the harmonic rejection transmitter 400 via the connection 140. The connection 140, while shown as two directed arrows, includes the information that is to be transmitted by RFAMSD subsystem 130 after conversion from the digital domain to the analog domain.
The DAC 144 operates on baseband in-phase (I) and quadrature-phase (Q) components. The DAC 144 communicates with an upconverter 154 that includes an I/Q modulator 146 and a harmonic rejection mixer 155. The structure and operation of the upconverter 154 and the LO signal generation systems and methods for the HRM 155 are described in more detail below. In general, however, the I/Q modulator 146 modulates the I and Q information signals received from the DAC 144 onto a frequency reference signal referred to as a “local oscillator” or “LO” signal provided by the synthesizer 300 via the connection 156.
The synthesizer 300 determines the appropriate frequency to which the upconverter 154 will translate the modulated signal. In one embodiment, the synthesizer 300 uses a single voltage controlled oscillator (VCO), operating at a center frequency of approximately 2.5 to 3.0 gigahertz (GHz) in this example, and frequency dividers to provide the desired LO signals to the harmonic rejection transmitter 400 and to the receiver 200.
The upconverter 154 supplies a phase modulated signal at an appropriate transmit frequency via a connection 158 to a power amplifier 160. The power amplifier 160 amplifies the phase-modulated signal on the connection 158 to the appropriate power level for transmission via a connection 162 to an antenna 164. Illustratively, the switch 166 controls whether the amplified signal on the connection 162 is transferred to the antenna 164 or whether a received signal from the antenna 164 is supplied to the filter 168. The operation of the switch 166 is controlled by a control signal from the baseband subsystem 110 via the connection 132.
A signal received by the antenna 164 may, at the appropriate time determined by the baseband subsystem 110, be directed via the switch 166 to a receive filter 168. The receive filter 168 filters the received signal and supplies the filtered signal on the connection 174 to a low noise amplifier (LNA) 176. Although a single LNA 176 is shown in
The downconverter 178 receives one or more LO signals from the synthesizer 300 via the connection 180. The synthesizer 300 determines the frequency to which to downconvert the signal received from the LNA 176 via the connection 182. In the case of a DCR, the received signal is converted directly to baseband (DC), or near-baseband. The downconverter 178 sends the downconverted signal via the connection 184 to a channel filter 186, also called the “IF filter.” The channel filter 186 selects the one desired channel and rejects all others. In the GSM system embodiment, only one of the 175 contiguous channels is actually to be received. After all channels are passed by the receive filter 168 and downconverted in frequency by the downconverter 178, only the one desired channel will appear precisely at the center frequency of channel filter 186. The synthesizer 300, by controlling the local oscillator frequency supplied on the connection 180 to the downconverter 178, determines the selected channel. The demodulator 194 recovers the transmitted analog information and supplies a signal representing this information via the connection 196 to the ADC 134. The ADC 134 converts these analog signals to a digital signal at baseband frequency and transfers it via the bus 128 to the DSP 126 for further processing.
Having described the general components and operation of the portable transceiver 100, various embodiments of systems and methods for generating LO signals for the harmonic rejection transmitter 400 will be described with reference to
For a lowband transmit signal, the divide-by-N frequency divider 204 divides the reference frequency signal by an appropriate divisor, N. The numerical value of N may comprise any desirable value for purposes of upconversion and based on, for example, the particular configuration of the portable transceiver 100 and the wireless systems and standards supported by the portable transceiver. In an embodiment, the divide-by-N frequency divider 204 may be selectively controlled to support N values of 12, 13, 14, or 15. The output of the divide-by-N frequency divider 204 is provided to the divide-by-3 frequency divider 206 on connection 212. The divide-by-3 frequency divider 206 divides the output signal of the divide-by-N frequency divider 204 into three phase-offset signals. In the embodiment illustrated in
As described above, one of the problems with a conventional mixer used in an upconverter is that it generates undesirable noise. The upconversion process involves superimposing baseband information on a high frequency carrier signal, such that the following equation may be realized:
V0(t)=[I(t)cos ωLO(t)]+[Q(t)sin ωLO(t)] Equation 1
To suppress the noise, local oscillator (LO) signals may be hard-switched or a square wave signal may be applied instead of a sinusoidal signal. As a result, V0(t) may contain the modulated signal around ωLO and unwanted harmonics at odd harmonics, such as, 3ωLO, 5ωLO, and so on. These harmonics may cause distortions in the transmitted output when they pass through output buffers or the power amplifier 160 that may exhibit a non-linear response or have non-linear characteristics. Therefore, it is desirable to remove these harmonics.
When a conventional mixer is used, the limited rejection of harmonics typically requires a relatively high-Q filter at the mixer output that passes ωLO but rejects odd harmonics (e.g., 3ωLO, 5ωLO). However, a high-Q filter has the undesirable characteristics mentioned above. The filter requirements may be simplified by using a harmonic rejection mixer that provides attenuation for the 3rd harmonic. A typical 3rd harmonic rejection mixer obtains four signals (A0°(t), A60°(t), A90°(t), A150°(t)) by squaring, or passing through a limiter, sinusoidal signals at the local oscillator (LO) frequency with phase differences of 0, 60, 90, and 150 degrees with respect to each other. The sinusoidal signals are usually generated by using poly-phase filters that may include RC sections that realize phase shift. However, poly-phase filters are bulky, narrow-band, and consume a lot of power. The harmonic rejection mixer 208 eliminates the need for poly-phase filters, and provides a compact, low-power, wide-band implementation for 3rd harmonic cancellation.
Referring to the second section of mixers, the mixer element 306 receives the signal I(t) at one input and an approximation of the value √3 at a second input. The mixer element 306 mixes these input signals and provides an output signal to the mixer element 308 via the connection 316. The mixer element 308 mixes the output of the mixer element 306 with the phase-offset signal B60°(t) received via the connection 216 from the divide-by-three frequency divider 206 (
The signal Q(t) is provided to three parallel sections of mixers. The first section comprises the mixer elements 320 and 322, the second section comprises the mixer elements 324 and 326, and the third section comprises the mixer elements 328 and 330. The mixer element 320 receives the signal Q(t) at one input and an approximation of the value −1 at a second input. The mixer element 320 mixes these input signals and provides the output signal to the mixer element 322 via the connection 332. The mixer element 322 mixes the output of the mixer element 320 with the phase-offset signal B0°(t) received via the connection 214 from the divide-by-three frequency divider 206 (
The mixer element 324 receives the signal Q(t) at one input and an approximation of the value 1 at a second input. The mixer element 324 mixes these input signals and provides the output signal to the mixer element 326 via the connection 336. The mixer element 326 mixes the output of the mixer element 324 with the phase-offset signal B60°(t) received via the connection 216 from the divide-by-three frequency divider 206 (
The mixer element 328 receives the signal Q(t) at one input and an approximation of the value 2 at a second input. The mixer element 328 mixes these input signals and provides the output signal to the mixer element 330 via the connection 340. The mixer element 330 mixes the output of the mixer element 328 with the phase-offset signal B120°(t) received via the connection 218 from the divide-by-three frequency divider 206 (
The summation element 344 adds the three input signals together and provides the result to the summation element 350. The summation element 350 sums the outputs of the respective I(t) and Q(t) sections (on the connections 346 and 348, respectively) and provides the output signal, V0(t), on the connection 352. For the purpose of illustrating the third harmonic cancellation achieved with this structure, it should be appreciated that the structure and operation of the harmonic rejection mixer 208 may be represented with the following equation for the output signal, V0(t):
V0(t)=[(√3B0°(t)+√3B60°(t))I(t)]+[(−B0°(t)+B60°(t))+2*B120°(t))Q(t)] Equation 2
Referring to Equation 2, the fundamental frequency components of (B0°(t)+B60°(t)) and (−B0°(t)+B60°(t)+2*B120°(t)) are substantially orthogonal to each other. In this regard, the third harmonics of the square waves may be considered as follows. The third harmonic of B60° cancels the third harmonic of B0°, and the third harmonic of (−B0°(t)+B60°(t)) cancels the 3rd harmonic of 2*B120°(t). Furthermore, the √3 factor that is multiplied with B0°(t) and B60°(t) in the first part of Equation 2 equalizes the relative magnitudes of the fundamental components of (B0°(t)+B60°(t)) and (−B0°(t)+B60°(t)+2*B120°(t)). Referring again to Equation 1, the fundamental component of (√3*B0°(t)+√3*B60°(t)) is cos ωLO(t), and the fundamental component of (−1*B0°(t)+1*B60°(t)+2*B120°(t)) is sin ωLO(t). In this manner, the third harmonics have been eliminated. As further illustrated in
The harmonic rejection mixer 208 may be implemented in various circuit configurations. For purposes of generally illustrating the structure of the harmonic rejection mixer 208, the implementation of one section of the block diagram of
V0(t)=[(A−45°(t)+√2*A0°(t)+*A45°(t))I(t)]+[(A45°(t)+√2*A90°(t)+*A135°(t))Q(t)] Equation 3
The signal A135°(t) is the complementary signal of A45°(t), and is readily available in a differential implementation. The signals A−45°(t), A0°(t), A45°(t) and A90°(t) represent square wave signals having fundamental frequency components at −45, 0, 45 and 90 degrees phase offset from each other.
Equation 3 illustrates the generation of the LO signals for the HRM architecture. As described below in more detail, the frequency plan uses a divide-by-three element in the LO chain. The outputs of divide-by-three element are used to realize the phases, 0 degrees, 45 degrees, 90 degrees, and 135 degrees, and their complementary signals of 180 degrees, 225 degrees, 270 degrees, and 315 degrees, respectively. These phases may be readily available with a conventional divide-by-four circuit. It should be appreciated, however, that the frequency plan for the system 700 does not permit a divide-by-four circuit. Therefore, as illustrated in
The system 700 is similar to the system 200 described above. For example, the system 700 may comprise the divide-by-two frequency divider 226, the divide-by-N frequency divider 204, and the divide-by-three frequency divider 206. In the embodiment illustrated in
C0°(t)=√3B0°(t)+√3B60°(t) Equation 4
C90°(t)=−B0°(t)+B60°(t)+2B120°(t) Equation 5
C45°(t)=C0°(t)+C90°(t)=(√3−1)B0°(t)+(√3+1)B60°(t)+2B120°(t) Equation 6
C−45°(t)=C0°(t)−C90°(t)=(√3+1)B0°(t)+(√3−1)B60°(t)−2B120°(t) Equation 7
The signals C−45°(t), C0°(t), C45°(t), and C90°(t) are obtained from B0°(t), B60°(t), and B120°(t). The fundamental components have phases of 0, 90, 45, and −45 degrees, respectively, at the fundamental frequency of operation. The third harmonics may be relatively low due to the third harmonic rejection as discussed above. These signals are then low-pass filtered to reduce their higher harmonics (e.g., 5th, 7th). They are then passed through a limiter to obtain the LO signals necessary for the harmonic rejection mixer 704. The desired phase differences between the signals C45°(t), C0°(t), C45°(t), and C90°(t) are obtained because of the sinusoidal signals generated by the summation block and low pass filter(s) described above, which have higher harmonics (e.g., 3rd, 5th, etc.), before passing the signals through the limiters. It should be appreciated that the presence of 3rd or 5th or higher harmonics in the signal at the limiter input changes the zero crossings of the output waveforms. This may significantly change the timing relationship between the signals at the output of the limiter and which may degrade the sideband rejection and harmonic rejection of the system. One of ordinary skill in the art will appreciate that the signals C−45°(t), C0°(t), C45°(t), and C90°(t) may address these and other operational issues.
Because the signals go through a limiter, their relative magnitudes may be less important. Thus, it should be appreciated that the output signals C−45°(t), C°0(t), C45°(t), and C90°(t) may be simplified as follows:
C0°(t)=B0°(t)+B60°(t) Equation 8
C90°(t)=−B0°(t)+B60°(t)+2B120°(t) Equation 9
C45°(t)=(√3−1)B0°(t)+(√3+1)B60°(t)+2B120°(t) Equation 10
C−45°(t)=(√3+1)B0°(t)+(√3−1)B60°(t)−2B120°(t) Equation 11
In operation, the mixer element 902 receives the output signal B0°(t) at one input and a degeneration resistance value that is scaled by 1.75 (as an approximation of the value 1/√3). The mixer element 902 mixes these input signals and provides the output signal to the summation element 908 via the connection 914. The mixer element 904 receives the output signal B60°(t) at it's input and a degeneration resistance value that is scaled by 1/2.75 (as an approximation 1/(√3+1)). The mixer element 904 mixes these input signals and provides the output signal to the summation element 908 via the connection 916. The mixer element 906 receives the output signal B120°(t) at its input. The gain is scaled by a factor of 2. The mixer element 906 mixes these input signals and provides the output signal to the summation element 908 via the connection 918. The summation element 920 combines the input signals and provides an output signal to the LPF 910. It should be appreciated that the summations may be implemented by connecting the current outputs of the various differential pairs together and then passing the resulting output current through a resistor for current-to-voltage conversion. The LPF 910 may comprise a capacitor in shunt with the load resistance. It should be further appreciated that additional filtering may be provided by adding additional RC sections or by use of other passive or active filter configurations.
The limiting amplifier 912 in this embodiment may comprise, for example, a current mode logic differential pair that is driven by voltage inputs that are large enough to completely switch the bias current of the amplifier from one side to another, resulting in a voltage output that swings from Vdd to (Vdd−IoRL), where Vdd is the supply voltage of the differential pair, Io is the tail current, and RL is the load resistances.
One of ordinary skill in the art will appreciate that the systems and methods described above with respect to an upconversion process in the transmitter 400 (
I(t)=(√3B0°(t)+√3B60°(t))RF(t)
Q(t)=(−B0°(t)+B60°(t)+2B120°(t))RF(t) Equation 12
In general, the system 1000 employs a third harmonic conversion scheme similar to that described above. The system 1000 comprises mixer elements 1004, 1006, and 1008 and a baseband summation block 1002. The system 1000 downconverts a signal RF(t) at the RF frequency with desirable gain but with zero gain for a signal that is located around the third harmonic of the LO frequency.
As illustrated in
I(t)=√3x(t)+√3y(t)
Q(t)=−x(t)+y(t)+2z(t) Equation 13
The summation may also be performed in the digital domain after digitizing the signal using one or more analog-to-digital converters (ADC), following any filters that may be used for rejecting filters or for anti-aliasing. While the summation may be implemented in the digital or analog domain, it should be appreciated that the summation in the digital domain may provide several advantages, such as, for example, accurate weighting factors and various algorithms (e.g., least mean square (LMS) algorithms) for improving cancellation of 3rd harmonics.
While various embodiments of the invention have been described, it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible that are within the scope of this invention.
Rozenblit, Dmitriy, Pullela, Rajasekhar, Firouzkouhi, Hamid
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