A method and apparatus is provided for associating operational data with workpieces and correlating the operational data with yield data. The method comprises processing a workpiece using a processing tool, associating the operational data with the workpiece during the processing of the workpiece and measuring the yield data associated with the processed workpiece. The method further comprises correlating the operational data with the yield data to make one or more determinations.
|
9. An apparatus, comprising:
an interface adapted to:
receive operational data and work piece metrology data associated with a work piece, wherein the work piece is processed by a processing tool, wherein processing comprises actively performing at least one of implanting, photolithography stepping, etching, deposition, polishing, rapid thermal processing, or doping, wherein the operational data comprises data relating to at least one of a chamber of the processing tool and a chamber zone of the processing tool that processes the work piece, and wherein the associated operational data comprises data related to an orientation of the work piece inside the processing tool;
receive yield data associated with the processed work piece;
a control unit communicatively coupled to the interface, the control unit adapted to store the associated operational data and work piece metrology data in a storage unit; and
correlate the operational data and work piece metrology data with the yield data to make one or more determinations, wherein at least one of said one or more determinations is at least one of:
identifying which portions of the work piece were exposed to which chambers of the processing tool during processing; and
identifying which portions of the work piece were exposed to which chamber zones of the processing tool during processing.
1. A method, comprising:
processing a work piece using a processing tool, wherein the processing comprises actively performing at least one of implanting, photolithography stepping, etching, deposition, polishing, rapid thermal processing, or doping;
associating, using a control unit, operational data and work piece metrology data with the work piece during the processing of the work piece, wherein the operational data comprises data relating to at least one of a chamber of the processing tool and a chamber zone of the processing tool that processes the work piece, wherein associating the operational data comprises associating data related to an orientation of the work piece inside the processing tool;
storing the associated operational data and work piece metrology data in a storage unit;
measuring, using a measuring tool, yield data associated with the work piece processed by the processing tool; and
correlating the stored operational data and work piece metrology data with the yield data to make one or more determinations, wherein at least one of said one or more determinations is at least one of:
identifying which portions of the work piece were exposed to which chambers of the processing tool during processing; and
identifying which portions of the work piece were exposed to which chamber zones of the processing tool during processing.
14. An article comprising one or more machine-readable storage media containing instructions that when executed enable a processor to:
process a wafer using a processing tool, wherein the act of processing comprises actively performing at least one of implanting, photolithography stepping, etching, deposition, polishing, rapid thermal processing, or doping;
associate operational data and work piece metrology data with the wafer during the processing of the wafer, wherein the operational data comprises data relating to at least one of a chamber of the processing tool and a chamber zone of the processing tool that processes the wafer, wherein the associating comprises associating data related to an orientation of the wafer inside the processing tool;
store the associated operational data and work piece metrology data in a storage unit;
measure, using a measuring tool, yield data associated with the wafer processed by the processing tool; and
correlate the operational data and work piece metrology data with the yield data to determine yield impact on the processed wafer, wherein determining the yield impact comprises at least one of:
identifying which portions of the wafer were exposed to which chambers of the processing tool during processing; and
identifying which portions of the wafer were exposed to which chamber zones of the processing tool during processing.
5. A method, comprising:
processing a work piece using a processing tool, wherein the processing comprises actively performing at least one of implanting, photolithography stepping, etching, deposition, polishing, rapid thermal processing, or doping;
associating, using a control unit, operational data and work piece metrology data with the work piece during the processing of the work piece, wherein associating the operational data comprises associating data related to an orientation of the work piece inside the processing tool;
measuring, using a measuring tool, yield data associated with the work piece processed by the processing tool;
correlating the operational data and work piece metrology data with the yield data to make one or more determinations, wherein at least one of said one or more determinations is at least one of:
identifying which portions of the work piece were exposed to one or more chambers of the processing tool during processing; and
identifying which portions of the work piece were exposed to one or more chamber zones of the processing tool during processing, and
wherein processing the work piece comprises processing a plurality of wafers and wherein associating the operational data and work piece metrology data with the work piece comprises associating the operational data and work piece metrology data on a wafer by wafer basis for each of the plurality of the wafers.
21. An apparatus, comprising:
means for processing a work piece using a processing tool, wherein processing comprises actively performing at least one of implanting, photolithography stepping, etching, deposition, polishing, rapid thermal processing, and doping;
means for associating operational data and work piece metrology data with the work piece during the processing of the work piece, wherein the operational data comprises data relating to at least one of a chamber of the processing tool and a chamber zone of the processing tool that processes the work piece, wherein associating the operational data comprises associating data related to an orientation of the work piece inside the processing tool;
means for storing the associated operational data and work piece metrology data in a storage unit;
means for measuring yield data associated with the processed work piece; and
means for correlating the stored operational data and work piece metrology data with the yield data to make one or more determinations relating to the effect of at least one process parameter upon a yield, wherein at least one of said one or more determinations is at least one of:
identifying which portions of the work piece were exposed to which chambers of the processing tool during processing; and
identifying which portions of the work piece were exposed to which chamber zones of the processing tool during processing.
19. A system, comprising:
a processing tool adapted to:
process a wafer, wherein the act of processing comprises actively performing at least one of implanting, photolithography stepping, etching, deposition, polishing, rapid thermal processing, or doping;
associate operational data and work piece metrology data with the wafer during the processing of the wafer, wherein the operational data comprises data relating to at least one of a chamber of the processing tool and a chamber zone of the processing tool that processes the wafer, and wherein associating the operational data comprises associating data related to an orientation of the wafer inside the processing tool; and
provide the operational data and work piece metrology data;
a measurement tool, communicatively coupled to the processing tool, the processor-based system adapted to measure yield data associated with the wafer processed by the processing tool and provide the yield data; and
a processor-based system communicatively coupled to the processing tool, the processor-based system adapted to:
receive the operation operational data, the work piece metrology data and the yield data;
detect a process deviation in the processed wafer;
correlate the operational data and work piece metrology data with the yield data to determine yield impact on the processed wafer; and
identify a source of the process deviation based on at least one of the received operational data or work piece metrology data, wherein said identification comprises at least one of:
identifying which portions of the wafer were exposed to which chambers of the processing tool during processing; and
identifying which portions of the wafer were exposed to which chamber zones of the processing tool during processing.
2. The method of
3. The method of
4. The method of
6. The method of
7. The method of
8. The method of
10. The apparatus of
11. The apparatus of
12. The apparatus of
13. The apparatus of
15. The article of
16. The article of
17. The article of
18. The article of
20. The system of
|
1. Field of the Invention
This invention relates generally to a semiconductor fabrication process, and, more particularly, to associating data with workpieces in the semiconductor fabrication process and correlating the data with yield data of the processed workpieces.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the quality, reliability and throughput of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for higher quality computers and electronic devices that operate more reliably. These demands have resulted in continual improvements in the manufacture of semiconductor devices, e.g., transistors, as well as in the manufacture of integrated circuit devices incorporating such transistors. Additionally, reducing the defects in the manufacture of the components of a typical transistor also lowers the overall cost per transistor as well as the cost of integrated circuit devices incorporating such transistors.
During the fabrication process, various events may take place that affect the performance of the devices being fabricated. That is, variations in the fabrication process result in device performance variations. Factors, such as feature critical dimensions, doping levels, contact resistance, particle contamination, etc., may potentially affect the end performance of the device. Various tools in the processing line are controlled, in accordance with performance models, to reduce processing variation. Commonly controlled tools include photolithography steppers, polishing tools, etching tools, and deposition tools. Pre-processing and/or post-processing metrology data is supplied to process controllers for the tools. Operating recipe parameters, such as processing time, are calculated by the process controllers based on the performance model and the metrology information to attempt to achieve post-processing results as close to a target value as possible. Reducing variation in this manner leads to increased throughput, reduced cost, higher device performance, etc., which equates to increased profitability.
Semiconductor manufacturing processes, which have become increasingly more reliable and robust, may include a plurality of processing tools that cooperate with each other to process semiconductor devices, such as, microprocessors, memory devices, ASICs, etc. To verify that the processing tools are operating within acceptable parameters, it has become increasingly desirable to monitor the operating conditions of such processing tools.
During the manufacturing process, various metrology data is collected to allow automatic process control, fault detection and classification, defect identification and performance measurement. However, the data that is collected may oftentimes be inadequate for troubleshooting process defects. That is, the collected data may be inadequate to explain deviations in the yield of the processed workpieces, such as wafers.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
In one embodiment of the present invention, a method is provided for associating operational data with workpieces and correlating the operational data with yield data. The method comprises processing a workpiece using a processing tool, associating the operational data with the workpiece during the processing of the workpiece and measuring the yield data associated with the processed workpiece. The method further comprises correlating the operational data with the yield data to make one or more determinations.
In another embodiment of the present invention, an apparatus is provided for associating operational data with workpieces and correlating the operational data with yield data. The apparatus comprises an interface and a control unit. The interface is adapted to receive the operational data associated with a workpiece, wherein the workpiece is processed by a processing tool. The interface is further adapted to receive the yield data associated with the processed workpiece. The control unit, which is communicatively coupled to the interface, is adapted to correlate the operational data with the yield data to make one or more determinations.
In a further embodiment of the present invention, an article comprising one or more machine-readable storage media containing instructions is provided for associating operational data with workpieces and correlating the operational data with yield data. The one or more instructions, when executed, enable the processor to process a wafer using a processing tool, associate the operational data with the wafer during the processing of the wafer and measure the yield data associated with the processed wafer. The one or more instructions, when executed, further enable the processor to correlate the operational data with the yield data to determine yield impact on the processed wafer.
The invention may be understood by reference to the following description taken in conjunction with the accompanying drawings, in which like reference numerals identify like elements, and in which:
While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific embodiments is not intended to limit the invention to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
Illustrative embodiments of the invention are described below. In the interest of clarity, not all features of an actual implementation are described in this specification. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art having the benefit of this disclosure.
Turning now to the drawings, and specifically referring to
The system 100 includes a plurality of processing tools 105(1-n). In the illustrated embodiment, the processing tools 105(1-n) are coupled to respective equipment interfaces (EI) 110 (shown as EI 110(1-n) in
Exemplary processing tools 105(1-n) for a semiconductor device fabrication environment include photolithography steppers, etch tools, deposition tools, polishing tools, rapid thermal processing tools, test-equipment tools, implantation tools, etc. In one embodiment, the processing tool 105 may be a multi-chambered processing tool.
In one embodiment, the processing tools 105(1-n) may be downstream to each other. That is, the second processing tool 105(2) may be downstream to the first processing tool 105(1), the third processing tool 105(3), (not shown), may be downstream to the second processing tool 105(2), and so forth. As such, a workpiece that is processed by the first processing tool 105(1) may, for example, be provided to the second processing tool 105(2), which may further process the workpiece before it is processed by the next processing tool 105(n). This process may continue until the last processing tool 105(n) has completed processing the workpiece.
The processing tools 105(1-n) of the system 100, in one embodiment, may perform various processing steps to create a packaged semiconductor device. For example, the processing tools 105(1-n) may be used for manufacturing the raw semiconductor material, slicing the semiconductor crystal ingot into individual wafers, fabricating (e.g., etching, doping, ion implanting) the wafers, testing and packaging the completed semiconductor devices, and the like. The number of processing tools 105(1-n) employed in the system 100 may be implementation specific, and thus may vary from one embodiment to another depending on the particular processing steps desired.
Generally, each processing tool 105 performs selected processing steps in accordance with a recipe defined for the workpiece to be processed in the processing tool 105. Furthermore, each recipe may define more than one processing step that can be performed by the processing tool 105. In one embodiment, the processing tool 105 may process a plurality of workpieces at any given time under the control of a recipe, where, for example, the workpieces may be at varying process stages as they are processed by the processing tool 105. The concept of accepting and then processing more than one workpiece at any given time is sometimes referred to as “batch processing.” In the illustrated embodiment, the “workpieces” are semiconductor wafers that are capable of being processed by the processing tools 105(1-n).
The processing tools 105(1-n) may include one or more internal sensors (not shown) for measuring operational data, which may then be transmitted through the associated EI 110 of the processing tools 105(1-n). In addition to internal sensors, the processing tools 105 may also be coupled to respective external sensors 115(1-n). The sensors 115(1-n) measure additional operational data that may or may not be ascertained by the associated processing tool 105 itself. For example, the sensor 115 may be used to determine a temperature range or other environmental or ambient data near or around the associated processing tool 105. In alternative embodiments, the sensor 115 may be used to sense various other operational parameters associated with the processing tool 105, and, thus, need not be limited to the aforementioned examples. It should be appreciated that, in one embodiment, some or all of the features of the sensors 115(1-n) may be integrated within the processing tools 105(1-n) themselves.
The sensor 115 may be embodied as a simple data acquisition program, such as a C++ standalone program acquiring data from a thermocouple wire. Alternatively, the sensor 115 may be embodied as a full-fledged LABVIEW application, acquiring data through multiple transducers (not shown). It will further be appreciated that the sensor 115 need not be used at all, and the APC framework 120 may rely upon the operational data forwarded from the processing tool 105. If used, in one embodiment, the sensor 115 forwards the additional operational data to the APC framework 120 for analysis.
The APC framework 120 may be any one of a variety of arrangements that facilitates communications to and from the processing tools 105(1-n). An exemplary information exchange and process control framework suitable for use in the manufacturing system 100 is an Advanced Process Control (APC) framework, such as may be implemented using the Catalyst system offered by KLA-Tencor, Inc. The Catalyst system uses Semiconductor Equipment and Materials International (SEMI) Computer Integrated Manufacturing (CIM) Framework compliant system technologies and is based on the Advanced Process Control (APC) Framework. CIM (SEMI E81-0699—Provisional Specification for CIM Framework Domain Architecture) and APC (SEMI E93-0999—Provisional Specification for CIM Framework Advanced Process Control Component) specifications are publicly available from SEMI. In one embodiment, the APC framework 120 may include a control unit 121 that manages the communications to and from the APC framework 120. The control unit 121 may also control the overall operations of one or more of the processing tools 105(1-n).
Wafers may take a variety of paths through the manufacturing system 100 as they are processed by various processing tools 105(1-n) before arriving at the final product. Often, after the wafers are processed, several measurements of the final product may be taken to determine if the final product is compliant with the desired specification. These measurements are hereinafter referred to as “yield data.” Generally, if the yield data is outside the acceptable parameters, a fab technician may attempt to determine the source or cause of the process deviation in the manufacturing system 100. However, the ability to identify the source or cause of the process deviation may depend in part on the amount and type of data that is collected as the wafers were processed. Thus, a limited amount and type of collected data may inhibit or hamper the ability to properly identify the source of the problem that caused the undesirable results (e.g., process defects). In accordance with one or more embodiments of the present invention, and as is described in more detail below, a variety of types of operational data are collected during the processing of the wafers. This variety of types of operation data enables a fab technician to more readily identify the potential source(s) of process deviations that may have ultimately affected the desired yield.
The system 100 includes a processor-based system 122 having a control unit 123 and a storage unit 124. Although not shown, the processor-based system 122 may include an interface to communicatively couple with the processing tool 105 via the APC framework 120. The processor-based system 122 receives the operational data associated with the processing tools 105 and processes the data to determine if a fault occurred in the manufacturing system 100. For the purposes of this discussion, the operational data that is associated with the processing tool 105 may be received through the EI 110, the sensor 115, or any other desirable source.
It should be appreciated that the illustrated components shown in the block diagram of the system 100 in
Referring now to
In the illustrated embodiment, the processing tool 105 is shown having a controller 205 for managing the overall operation of the processing tool 105. The processing tool 105 in the illustrated embodiment also includes a plurality (three in this case) of processing chambers 220(1-3). While three processing chambers 220(1-3) are shown in
The chambers 220(1-3), in one embodiment, may have one or more chamber zones 225 associated therewith. For example, in the illustrated example of
The processing tool 105 of
As is described in more detail below, a variety of information is associated (or tagged) with the wafers that are processed by the processing tool 105. This tagged information, in one embodiment, may be correlated to the processed wafers or a processed lot of wafers and used to improve the semiconductor process. The semiconductor process may be improved, for example, by correlating the tagged information with the information collected from the processed wafers to identify one or more errors that may have caused deviations in the semiconductor process.
Referring now to
In
The processing tool 105 associates (at 330) process-related data with one or more of the wafers as the wafers are processed by the processing tool 105. As explained below, a variety of process-related data may be associated with (or tagged to) the wafers to preserve the characteristics of the environment in which the wafers are processed. In one embodiment, associating (at 330) the process-related data with the wafers includes associating (at 332) the type of the processing tool 105 (i.e., furnace, sink, implanter) that processes the wafers.
In one embodiment, associating (at 330) the process-related data may include associating (at 334) data related to the various process steps that are performed by the processing tool 105 while processing the wafers during selected times. For example, as the wafers are processed, an implanting tool may perform steps such as beam setup, beam tuning, and implanting. As another example, a rapid thermal anneal processing tool may perform the steps of increasing a control value, such as voltage or temperature, to a preselected value, waiting a preselected interval before increasing the control value to a new preselected value, and detecting if the control value is within a desired range and letting the wafer cook or until the implanted impurities anneal.
In one embodiment, associating (at 330) the process-related data may include associating (at 336) data identifying the chambers 220(1-3) that process the wafers. Tagging chamber-level data to the wafers allows a fab technician to later determine, for example, the particular path the processed wafers traversed.
In one embodiment, associating (at 330) the process-related data may include associating (at 338) data related to the chamber zones 225 of the processing tool 105 through which the wafers traverse as they are processed. It may be desirable to associate chamber zone-information with the wafers for subsequent die-level analysis of the processed wafers. Examples of various types of zones may include temperature zones or track zones. As mentioned, the type and number of zones may vary from one implementation to another, depending on the particular processing tool 105. For instance, in a polishing tool the zones may be defined based on the mechanics of the polishing tool, such as whether the tool polishes sideways along the wafer, circular, and the like.
In one embodiment, associating (at 330) the process-related data may include associating (at 340) data relating to the orientation of the wafer or wafers. This orientation data may aid in reconstructing the relative position of the wafers inside the chamber zones 225 when the wafers were processed by the processing tool 105. Thus, the orientation information may identify which portions of a wafer were exposed to which chamber zones 225 during processing. Typically, each wafer has a zero point of the wafer (i.e., the notch on the wafer) that defines its orientation. Associating wafer-orientation information with the wafers may be useful for subsequent die-level analysis of the processed wafers.
The controller 205 of the processing tool 105 provides (at 345) the data associated (at 330) to the processor-based system 122 through the APC framework 120 for storage in the storage unit 124. The stored data may be readily accessed from the storage unit 124 of the processor-based system 122 for later use.
In one embodiment, a fab technician may acquire (at 350) yield data from the wafers that are processed by the processing tools 105(1-n) of the manufacturing system 100. The yield data may be acquired (at 350) in any conventionally acceptable manner, and, in one embodiment, may be stored in the storage unit 124 of the processor-based system 122. In an alternative embodiment, the process of acquiring the yield data (at 350) may be an automated process. For example, in one embodiment, the processor-based system 122 may execute one or more routines to obtain the yield data associated with the processed wafers.
In one embodiment, the data that was associated with the wafers during processing (at 330) is correlated (at 360) with the yield data that is acquired (at 350) from the processed wafers. Although not so limited, in one embodiment, the processor-based system 122 may be utilized to correlate (at 360) the collected data. Correlating the tagged data (at 360) with the yield data may be done for a variety of reasons, including identifying one or more sources that may have caused deviations in the semiconductor process or predicting yield impact. It may be possible to predict yield impact, for example, if an aberration in the processing of the wafer results in a particular, quantifiable yield. For instance, if there are more than 5 degrees of overshoot in an RTA process that results in a yield roll off in the final product, then through data correlation it may be possible to predict yield impact in the future whenever there is an overshoot of 5 degrees or more in the RTA process. Similarly, other types of yield impacts may be predicted based on correlating the tagged data with the yield data. The ability to predict yield impact may allow fab technicians to refine the manufacturing process to obtain better results.
The various system layers, routines, or modules may be executable by the control units 121, 123 (see
The particular embodiments disclosed above are illustrative only, as the invention may be modified and practiced in different but equivalent manners apparent to those skilled in the art having the benefit of the teachings herein. Furthermore, no limitations are intended to the details of construction or design herein shown, other than as described in the claims below. It is therefore evident that the particular embodiments disclosed above may be altered or modified and all such variations are considered within the scope and spirit of the invention. Accordingly, the protection sought herein is as set forth in the claims below.
Bode, Christopher A., Coss, Jr., Elfido, Peterson, Anastasia O.
Patent | Priority | Assignee | Title |
10333862, | Mar 16 2005 | III Holdings 12, LLC | Reserving resources in an on-demand compute environment |
10445146, | Mar 16 2006 | III Holdings 12, LLC | System and method for managing a hybrid compute environment |
10608949, | Mar 16 2005 | III Holdings 12, LLC | Simple integration of an on-demand compute environment |
10977090, | Mar 16 2006 | III Holdings 12, LLC | System and method for managing a hybrid compute environment |
11134022, | Mar 16 2005 | III Holdings 12, LLC | Simple integration of an on-demand compute environment |
11356385, | Mar 16 2005 | III Holdings 12, LLC | On-demand compute environment |
11467883, | Mar 13 2004 | III Holdings 12, LLC | Co-allocating a reservation spanning different compute resources types |
11494235, | Nov 08 2004 | III Holdings 12, LLC | System and method of providing system jobs within a compute environment |
11496415, | Apr 07 2005 | III Holdings 12, LLC | On-demand access to compute resources |
11522811, | Apr 07 2005 | III Holdings 12, LLC | On-demand access to compute resources |
11522952, | Sep 24 2007 | The Research Foundation for The State University of New York | Automatic clustering for self-organizing grids |
11526304, | Oct 30 2009 | III Holdings 2, LLC | Memcached server functionality in a cluster of data processing nodes |
11533274, | Apr 07 2005 | III Holdings 12, LLC | On-demand access to compute resources |
11537434, | Nov 08 2004 | III Holdings 12, LLC | System and method of providing system jobs within a compute environment |
11537435, | Nov 08 2004 | III Holdings 12, LLC | System and method of providing system jobs within a compute environment |
11630704, | Aug 20 2004 | III Holdings 12, LLC | System and method for a workload management and scheduling module to manage access to a compute environment according to local and non-local user identity information |
11650857, | Mar 16 2006 | III Holdings 12, LLC | System and method for managing a hybrid computer environment |
11652706, | Jun 18 2004 | III Holdings 12, LLC | System and method for providing dynamic provisioning within a compute environment |
11656907, | Nov 08 2004 | III Holdings 12, LLC | System and method of providing system jobs within a compute environment |
11658916, | Mar 16 2005 | III Holdings 12, LLC | Simple integration of an on-demand compute environment |
11709709, | Nov 08 2004 | III Holdings 12, LLC | System and method of providing system jobs within a compute environment |
11720290, | Oct 30 2009 | III Holdings 2, LLC | Memcached server functionality in a cluster of data processing nodes |
11762694, | Nov 08 2004 | III Holdings 12, LLC | System and method of providing system jobs within a compute environment |
11765101, | Apr 07 2005 | III Holdings 12, LLC | On-demand access to compute resources |
11831564, | Apr 07 2005 | III Holdings 12, LLC | On-demand access to compute resources |
11861404, | Nov 08 2004 | III Holdings 12, LLC | System and method of providing system jobs within a compute environment |
11886915, | Nov 08 2004 | III Holdings 12, LLC | System and method of providing system jobs within a compute environment |
11960937, | Mar 13 2004 | III Holdings 12, LLC | System and method for an optimizing reservation in time of compute resources based on prioritization function and reservation policy parameter |
8930536, | Mar 16 2005 | III Holdings 12, LLC | Virtual private cluster |
9225663, | Mar 16 2005 | III Holdings 12, LLC | System and method providing a virtual private cluster |
9961013, | Mar 16 2005 | III Holdings 12, LLC | Simple integration of on-demand compute environment |
9979672, | Mar 16 2005 | III Holdings 12, LLC | System and method providing a virtual private cluster |
ER1475, | |||
ER2853, | |||
ER9943, |
Patent | Priority | Assignee | Title |
5539752, | Jun 30 1995 | GLOBALFOUNDRIES Inc | Method and system for automated analysis of semiconductor defect data |
5761065, | Mar 30 1995 | GLOBALFOUNDRIES Inc | Arrangement and method for detecting sequential processing effects in manufacturing |
5856923, | Mar 24 1997 | U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT | Method for continuous, non lot-based integrated circuit manufacturing |
5923553, | Dec 21 1995 | Samsung Electronics Co., Ltd. | Method for controlling a semiconductor manufacturing process by failure analysis feedback |
5930138, | Aug 22 1995 | Advanced Micro Devices, Inc. | Arrangement and method for detecting sequential processing effects in manufacturing using predetermined sequences within runs |
5940300, | Dec 12 1996 | Mitsubishi Denki Kabushiki Kaisha | Method and apparatus for analyzing a fabrication line |
5993043, | Nov 29 1996 | Renesas Electronics Corporation | Lithography processing apparatus for manufacturing semiconductor devices |
6180424, | Dec 05 1997 | Texas Instruments Incorporated | Method for improving wafer sleuth capability by adding wafer rotation tracking |
6298470, | Apr 15 1999 | Micron Technology, Inc. | Method for efficient manufacturing of integrated circuits |
6367040, | Jan 11 1999 | Polaris Innovations Limited | System and method for determining yield impact for semiconductor devices |
6389323, | Apr 27 1998 | Taiwan Semiconductor Manufacturing Company | Method and system for yield loss analysis by yield management system |
6410351, | Jul 13 2000 | GLOBALFOUNDRIES Inc | Method and apparatus for modeling thickness profiles and controlling subsequent etch process |
6662070, | Mar 08 2000 | Advanced Micro Devices, Inc. | Wafer rotation randomization in cluster tool processing |
6728591, | Aug 01 2001 | Advanced Micro Devices, Inc. | Method and apparatus for run-to-run control of trench profiles |
6766208, | Sep 24 2001 | Powerchip Semiconductor Manufacturing Corporation | Automatic production quality control method and system |
7082345, | Jun 19 2001 | Applied Materials, Inc. | Method, system and medium for process control for the matching of tools, chambers and/or other semiconductor-related entities |
20020069349, | |||
20020193902, | |||
20030000922, | |||
20030014145, | |||
20030052084, | |||
20040005507, | |||
20060246683, |
Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Jun 28 2002 | Advanced Micro Devices, Inc. | (assignment on the face of the patent) | / | |||
Jun 28 2002 | COSS, ELFIDO JR | Advanced Micro Devices, INC | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 013076 | /0231 | |
Jun 28 2002 | PETERSON, ANASTASIA O | Advanced Micro Devices, INC | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 013076 | /0231 | |
Jun 28 2002 | BODE, CHRISTOPHER A | Advanced Micro Devices, INC | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 013076 | /0231 |
Date | Maintenance Fee Events |
May 12 2016 | M1551: Payment of Maintenance Fee, 4th Year, Large Entity. |
May 14 2020 | M1552: Payment of Maintenance Fee, 8th Year, Large Entity. |
Jul 15 2024 | REM: Maintenance Fee Reminder Mailed. |
Date | Maintenance Schedule |
Nov 27 2015 | 4 years fee payment window open |
May 27 2016 | 6 months grace period start (w surcharge) |
Nov 27 2016 | patent expiry (for year 4) |
Nov 27 2018 | 2 years to revive unintentionally abandoned end. (for year 4) |
Nov 27 2019 | 8 years fee payment window open |
May 27 2020 | 6 months grace period start (w surcharge) |
Nov 27 2020 | patent expiry (for year 8) |
Nov 27 2022 | 2 years to revive unintentionally abandoned end. (for year 8) |
Nov 27 2023 | 12 years fee payment window open |
May 27 2024 | 6 months grace period start (w surcharge) |
Nov 27 2024 | patent expiry (for year 12) |
Nov 27 2026 | 2 years to revive unintentionally abandoned end. (for year 12) |