A temperature compensation circuit is adapted to be used in an electronic device including a processing circuit. The temperature compensation circuit includes a thermistor, a compensation capacitor and a compensation diode. The thermistor has two ends, one of which is adapted to be electrically connected to the processing circuit. The compensation capacitor has two ends, one of which is electrically connected to the other one of the two ends of the thermistor. The compensation diode has an anode electrically connected to the other one of the two ends of the compensation capacitor, and a cathode to be grounded. The impedance of the thermistor varies with temperature so as to compensate and stabilize an output of the electronic device.
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1. A temperature compensation circuit adapted to be used in an electronic device and to be electrically connected to a processing circuit of the electronic device, said temperature compensation circuit comprising:
a thermistor having two ends, one of which is adapted to be electrically connected to the processing circuit;
a compensation capacitor having two ends, one of which is electrically connected to the other one of said two ends of said thermistor; and
a compensation diode having an anode electrically connected to the other one of said two ends of said compensation capacitor, and a cathode to be grounded;
wherein impedance of said thermistor varies with temperature so as to compensate and stabilize an output of the electronic device.
2. The temperature compensation circuit as claimed in
3. The temperature compensation circuit as claimed in
4. The temperature compensation circuit as claimed in
5. The temperature compensation circuit as claimed in
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This application claims priority of Taiwanese Application No. 101132147, filed on Sep. 4, 2012, the disclosure of which is incorporated herein by reference
1. Field of the Invention
The present invention relates to an electronic device, more particularly to an electronic device with temperature compensation.
2. Description of the Related Art
Referring to
Nevertheless, the closed loop circuit design of the conventional BF output circuit 900 is relatively expensive and complicated, and thus, is unsuited for application to low-price products and apparatuses.
Therefore, an object of the present invention is to provide a temperature compensation circuit implemented with an open loop circuit that is relatively low cost and low in complexity.
Accordingly, a temperature compensation circuit of this invention is adapted to be used in an electronic device and to be electrically connected to a processing circuit of the electronic device. The temperature compensation circuit comprises a thermistor, a compensation capacitor and a compensation diode. The thermistor has two ends, one of which is to be electrically connected to the processing circuit. The compensation capacitor has two ends, one of which is electrically connected to the other one of the two ends of the thermistor. The compensation diode has an anode electrically connected to the other one of the two ends of the compensation capacitor and a cathode to be grounded. The impedance of the thermistor varies with temperature so as to compensate and stabilize an output of the processing circuit.
A rate of change of the Impedance of the thermistor with respect to temperature is inversely proportional to a rate of change of gain of the processing circuit with respect to temperature.
Another object of the present invention is to provide an electronic device capable temperature compensation to stabilize an output thereof using an open loop circuit.
According to another aspect, an electronic device of this invention comprises a processing circuit and a temperature compensation circuit. The processing circuit has a gain that varies with temperature. The temperature compensation circuit includes a thermistor that is electrically connected to the processing circuit and that has an impedance varying with temperature. A rate of change of the impedance of the thermistor with respect to temperature is inversely proportional to a rate of change of the gain of the processing unit with respect to temperature so as to compensate and stabilize an output of the processing circuit.
The temperature compensation circuit further includes a compensation diode having an anode and a cathode that is to be grounded, and a compensation capacitor electrically connected between the thermistor and the anode of the compensation diode.
Other features and advantages of the present invention will become apparent in the following detailed description of the embodiments with reference to the accompanying drawings, of which:
Before the present invention is described in greater detail, it should be noted that like elements are denoted by the same reference numerals throughout the disclosure.
Referring to
The processing circuit 10 in the first embodiment is a power amplifier for receiving and amplifying an RF signal and outputting the amplified RF signal. The gain of the processing circuit 10 varies with temperature in a first curve.
The temperature compensation circuit 20 includes a thermistor 21, a compensation capacitor 22 and a compensation diode 23. The thermistor 21 has two ends, one of which is electrically connected to an input terminal of the processing circuit 10. Impedance of the thermistor 21 varies with temperature in a second curve that has a slope inversely proportional to a slope of the first curve. Namely, a rate of change of the impedance of the thermistor 21 with respect to temperature is inversely proportional to a rate of change of the gain of the processing circuit 10 with respect to temperature. The compensation capacitor 22 has two ends, one of which is electrically connected to the other one of the two ends of the thermistor 21. The compensation diode 23 has an anode electrically connected to the other one of the two ends of the compensation capacitor 22, and a cathode to be grounded. The anode of the compensation diode 23 receives a variable voltage (Vcc) for adjusting a voltage provided to the input terminal of the processing circuit 10 as required by different applications.
The temperature compensation circuit 20 and the processing circuit 10 are electrically connected in parallel, resulting in an amount of signal attenuation to the RF signal (e.g. 5 dB) before the SF signal enters the processing circuit 10. When the processing circuit 10 operates and the temperature increases, the gain of the processing circuit 10 will decrease and the impedance of the thermistor 21 will increase. Thus, the RF signal is attenuated by a relatively small amount before entering the processing circuit 10. As a result, a relatively greater portion of the RF signal is received by the processing circuit 10 so as to compensate the decrease in the gain of the processing circuit 10 attributed to temperature variation and to stabilize the output of the electronic device 100.
Specifically, the thermistor 21 may include one or more negative temperature coefficient (NTC) thermistors and/or one or more positive temperature coefficient (FTC) thermistors. For example, according to the variation of the gain of the processing circuit 10 with respect to temperature, the thermistor 21 may consist of a single NTC thermistor or a plurality of NTC thermistors in series/parallel connection, or a single PTC thermistor or a plurality of PTC thermistors in series/parallel connection, or a combination of the NTC thermistors and the PTC thermistors. This invention is not limited to any particular arrangement or embodiment of the thermistor 21, as long as the rate of change of the impedance of the thermistor 21 is inversely proportional to the rate of change of the gain of the processing circuit 10 with respect to temperature.
Referring to
Similarly, as temperature increases, the gain of the processing circuit 10 decreases and the impedance of the thermistor 21 of the temperature compensation circuit 20 increases. Thus, the RF signal outputted by the processing circuit 10 at the output terminal is attenuated by the thermistor 21 due to the increase of the impedance of the thermistor 21. Accordingly, the temperature compensation circuit 20 of this embodiment can also achieve temperature compensation for the output of the electronic device 100.
To sum up, the electronic device 100 with temperature compensation of this invention uses the temperature compensation circuit 20 to compensate the variation of the gain of the processing circuit 10 so as to stabilize the output of the electronic device 100. Moreover, the open loop circuit of the electronic device 100 can not only stabilize the output of the electronic device 100 but also has a relatively low cost and low complexity.
While the present invention has been described in connection with what are considered the most practical embodiments, it is understood that this invention is not limited to the disclosed embodiments but is intended to cover various arrangements included within the spirit and scope of the broadest interpretation so as to encompass all such modifications and equivalent arrangements.
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
4000650, | Mar 20 1975 | ENDRESS + HAUSER GMBH & CO , A COMPANY OF FED REP OF GERMANY | Method and apparatus for ultrasonic material level measurement |
4882767, | Jul 18 1988 | Matsushita Electric Industrial Co., Ltd. | Stabilized transmitter |
5162750, | Oct 18 1990 | Kikusui Electronics Corporation | Band limiter with temperature compensation circuit |
6426495, | Jun 24 1999 | OpNext Japan, Inc | Temperature compensating circuit, temperature compensating logarithm conversion circuit and light receiver |
6603110, | Jun 24 1999 | Oclaro Japan, Inc | Temperature compensating circuit, temperature compensating logarithm conversion circuit and light receiver |
8779274, | Jul 18 2003 | Electronic signal processor | |
20060035596, |
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