devices and methods capable of addressing filter responses are disclosed. For example, a method for compensating a first low-pass filter and a second low-pass filter is disclosed. The method includes injecting a reference tone fR and a cutoff tone fC into the first low-pass filter, and measuring respective filter responses of the reference tone fR and the cutoff tone fC while changing capacitor codes that control a cutoff frequency of the first low-pass filter until a first capacitor code Icode is determined that most accurately causes the first low-pass filter to utilize a desired cutoff frequency f0, performing a similar operation for the second low-pass filter until a second capacitor code qcode is determined, and calibrating for mismatch between the first low-pass filter and the second low-pass filter.
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1. A method for compensating for non-idealities in a filter circuit that includes programmable filter circuitry including a first low-pass filter and a second low-pass filter both having a common desired cutoff frequency f0, the method comprising:
for a first desired bandwidth bw0 corresponding to the common desired cutoff frequency f0, injecting a reference tone ir and a cutoff tone fC into the first low-pass filter, and measuring respective filter responses of the reference tone fR and the cutoff tone fC while changing capacitor codes that control a cutoff frequency f0-I of the first low-pass filter until a first capacitor code icode is determined that causes the first low-pass filter to match the desired cutoff frequency f0 as close as possible given an available resolution of the capacitor codes;
for the first desired bandwidth bw0, injecting the reference tone fR and the cutoff tone fC into the second low-pass filter, and measuring respective filter responses of the reference tone fR and the cutoff tone fC while changing capacitor codes that control a cutoff frequency f0-q of the second low-pass filter until a second capacitor code qcode is determined that causes the second low-pass filter to match the desired cutoff frequency f0 as close as possible given the available resolution of the capacitor codes; and
further calibrating for mismatch between the first low-pass filter and the second low-pass filter for one or more additional bandwidths greater than the first desired bandwidth bw0.
11. A device for compensating for non-idealities in a filter circuit that includes programmable filter circuitry including a first low-pass filter and a second low-pass filter both having a common desired cutoff frequency f0 corresponding to a first desired bandwidth bw0, the device comprising:
code search circuitry that controls the first low-pass filter and the second low-pass filter;
tone generation circuitry that injects a reference tone fR and a cutoff tone fC into both the first low-pass filter and the second low-pass filter,
measurement circuitry that: (1) measures respective filter responses of the reference tone fR and the cutoff tone fC while the code search circuitry changes capacitor codes that control a cutoff frequency f0-1 of the first low-pass filter until a first capacitor code Icode is determined that causes the first low-pass filter to match the desired cutoff frequency f0 as close as possible given an available resolution of the capacitor codes; and (2) measures respective filter responses of the reference tone fR and the cutoff tone fC while the code search circuitry changes capacitor codes that control a cutoff frequency f0-q of the second low-pass filter until a second capacitor code qcode is determined that causes the second low-pass filter to match the desired cutoff frequency f0 as close as possible given the available resolution of the capacitor codes; and
calibration circuitry configured to calibrate for mismatch between the first low-pass filter and the second low-pass filter for one or more additional bandwidths greater than a first desired bandwidth bw0 of the desired cutoff frequency f0.
2. The method of
3. The method of
for a respective second cutoff frequency f1, where f1=(N×f0)+Δf, where Δf is a cutoff frequency offset for the second desired bandwidth bw1:
determining a capacitor code offsets ΔIOFFSET and ΔQOFFSET;
adding the capacitor code offset ΔIOFFSET to the first capacitor code Icode to produce a first compensated capacitor code IC-code; and
adding the capacitor code offset ΔQOFFSET to the second capacitor code qcode to produce a second compensated capacitor code qC-code, wherein the second cutoff frequency f1=(N×f0)+Δf, where Δf is a cutoff frequency offset for the second desired bandwidth bw1.
4. The method of
bw0=20 MHz, bw1=40 MHz, f0=8.75 MHz, f1=18.75 MHz, and Δf=1.25 MHz; or wherein
bw0=20 MHz, bw1=80 MHz, f0=8.75 MHz, f1=38.75 MHz, and Δf=3.75 MHz.
5. The method of
determining a fractional capacitor code CIFRAC corresponding to the first desired bandwidth bw0, the fractional capacitor code CIFRAC being a value that lies between two consecutive capacitor codes [Icode, Icode+1], and that ideally corresponds to both a zero phase difference and a zero power difference between the first low-pass filter and the second low-pass filter; and
using the fractional capacitor code CIFRAC to determine the capacitor code offsets ΔIOFFSET and ΔQOFFSET.
6. The method of
interpolating a line using a plurality of points with each point having a first dimension being a combined I-q capacitor code [Icode, qcode], and a second dimension being a respective measured phase offset between the first low-pass filter and the second low-pass filter using a respective combined I-q capacitor code; and
selecting a combined I-q capacitor code value that corresponds to a substantially zero phase difference between the first low-pass filter and the second low-pass filter.
7. The method of
rounding the fractional capacitor code CIFRAC to a nearest integer to produce the capacitor code offset ΔIOFFSET and ΔQOFFSET;
adding the capacitor code offset ΔIOFFSET to the first capacitor code Icode to produce the first compensated capacitor code IC-code; and
adding the capacitor code offset ΔQOFFSET to the second capacitor code qcode to produce the second compensated capacitor code qC-code.
8. The method of
rounding to the nearest integer a scaled value=[(1+αΔfc)*ΔCFRAC] to produce the capacitor code offsets ΔIOFFSET and ΔQOFFSET, where ΔCFRAC is a difference between the first capacitor code CIFRAC and the second capacitor code qcode, a is a scaling factor derived from empirical data, and Δfc is a capacitor code difference corresponding to the cutoff frequency offset Δf;
adding the capacitor code offset ΔIOFFSET to the first capacitor code Icode to produce the first compensated capacitor code IC-code; and
adding the capacitor code offset ΔQOFFSET to the second capacitor code qcode to produce the second compensated capacitor code qC-code.
9. The method of
applying the first compensated capacitor code IC-code to the first low-pass filter; and
applying the second compensated capacitor code qC-code to the second low-pass filter.
12. The device of
13. The device of
for a respective second cutoff frequency f1 for the second bandwidth bw1, determine a capacitor code offsets ΔIOFFSET and ΔQOFFSET;
add the capacitor code offset ΔIOFFSET to the first capacitor code Icode to produce a first compensated capacitor code IC-code; and
add the capacitor code offset ΔQOFFSET to the second capacitor code qcode to produce a second compensated capacitor code qC-code;
wherein the second cutoff frequency f1=(N×f0)+Δf, where Of is a cutoff frequency offset for the second desired bandwidth bw1.
14. The device of
determining a fractional capacitor code CIFRAC corresponding to the first desired bandwidth bw0, the fractional capacitor code CIFRAC being a value that lies between two consecutive capacitor codes [Icode, Icode+1], and that ideally corresponds to both a zero phase difference and a zero power difference between the first low-pass filter and the second low-pass filter; and
using the fractional capacitor code CIFRAC to determine the capacitor code offset ΔIOFFSET and ΔQOFFSET.
15. The device of
interpolating a line using a plurality of points with each point having a first dimension being a combined I-q capacitor code [Icode, qcode], and a second dimension being a respective measured phase offset between the first low-pass filter and the second low-pass filter using a respective combined I-q capacitor code; and
selecting a combined I-q capacitor code value that corresponds to a substantially zero phase difference between the first low-pass filter and the second low-pass filter.
16. The device of
rounding the fractional capacitor code CFRAC to a nearest integer to produce the capacitor code offset ΔOFFSET;
adding the capacitor code offset ΔOFFSET to the first capacitor code Icode to produce the first compensated capacitor code IC-code; and
adding the capacitor code offset ΔOFFSET to the second capacitor code qcode to produce the second compensated capacitor code qC-code.
17. The device of
rounding to the nearest integer [(1+αΔfc)*ΔCFRAC] to produce the capacitor code offsets ΔIOFFSET and ΔQOFFSET, where ΔCFRAC is a difference between the first capacitor code CIFRAC and the second capacitor code qcode, a is a scaling factor derived from empirical data, and Δfc is a capacitor code difference corresponding to the cutoff frequency offset Δf;
adding the capacitor code offset ΔQOFFSET to the first capacitor code Icode to produce the first compensated capacitor code IC-code; and
adding the capacitor code offset ΔQOFFSET to the second capacitor code qcode to produce the second compensated capacitor code qC-code.
18. The device of
applies the first compensated capacitor code IC-code to the first low-pass filter; and
applies the second compensated capacitor code qC-code to the second low-pass filter.
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This application claims the benefit of U.S. Provisional Application No. 61/911,740 entitled “Analog Filter Calibration” filed on Dec. 4, 2013, the content of which is incorporated herein by reference in its entirety.
Wireless communication devices, such as cellular telephones, contain sophisticated integrated electronics used to receive and transmit wireless data. Unfortunately, the analog electronics of such integrated electronics is subject to process variation from one wafer to the next. This can result in characteristics of various components—e.g., resistor values and capacitor values—varying to the point that it may be impossible to use a particular device without some form of individualized device compensation. The issue of component variation can even extend to devices within a single chip. Thus, even two identically-designed devices in a single chip can and do exhibit substantial mismatch. This problem tends to increase in severity as integrated circuit geometries continue to shrink.
Various aspects and embodiments of the invention are described in further detail below.
In an embodiment, a method for compensating for non-idealities in a filter circuit that includes programmable filter circuitry including a first low-pass filter and a second low-pass filter both having a common desired cutoff frequency f0 is disclosed. The method includes, for a first desired bandwidth BW0 corresponding to the common desired cutoff frequency f0, injecting a reference tone fR and a cutoff tone fC into the first low-pass filter, and measuring respective filter responses of the reference tone fR and the cutoff tone fC while changing capacitor codes that control a cutoff frequency f0-I of the first low-pass filter until a first capacitor code ICODE is determined that most accurately causes the first low-pass filter to utilize the desired cutoff frequency f0; for the first desired bandwidth BW0, injecting the reference tone fR and the cutoff tone fC into the second low-pass filter, and measuring respective filter responses of the reference tone fR and the cutoff tone fC while changing capacitor codes that control a cutoff frequency f0-Q of the second low-pass filter until a second capacitor code QCODE is determined that most accurately causes the second low-pass filter to utilize the desired cutoff frequency f0; and further calibrating for mismatch between the first low-pass filter and the second low-pass filter for one or more additional bandwidths greater than the first desired bandwidth BW0.
In another embodiment, a device for compensating for non-idealities in a filter circuit that includes programmable filter circuitry including a first low-pass filter and a second low-pass filter both having a common desired cutoff frequency f0 corresponding to a first desired bandwidth BW0 is disclosed. The device includes code search circuitry that controls the first low-pass filter and the second low-pass filter; tone generation circuitry that injects a reference tone fR and a cutoff tone fC into both the first low-pass filter and the second low-pass filter; measurement circuitry that: (1) measures respective filter responses of the reference tone fR and the cutoff tone fC while the code search circuitry changes capacitor codes that control a cutoff frequency f0-I of the first low-pass filter until a first capacitor code ICODE is determined that most accurately causes the first low-pass filter to utilize the desired cutoff frequency f0; and (2) measures respective filter responses of the reference tone fR and the cutoff tone fC while the code search circuitry changes capacitor codes that control a cutoff frequency f0-Q of the second low-pass filter until a second capacitor code QCODE is determined that most accurately causes the second low-pass filter to utilize the desired cutoff frequency f0; and calibration circuitry configured to calibrate for mismatch between the first low-pass filter and the second low-pass filter for one or more additional bandwidths greater than a first desired bandwidth BW0 of the desired cutoff frequency f0.
Various embodiments of this disclosure that are proposed as examples will be described in detail with reference to the following figures, wherein like numerals reference like elements.
The disclosed methods and systems below may be described generally, as well as in terms of specific examples and/or specific embodiments. For instances where references are made to detailed examples and/or embodiments, it is noted that any of the underlying principles described are not to be limited to a single embodiment, but may be expanded for use with any of the other methods and systems described herein as will be understood by one of ordinary skill in the art unless otherwise stated specifically.
One of the most significant disadvantages of modern telecommunications equipment is that process variations for integrated circuits will cause analog components to vary not just between different wafers, but even for different devices on a single chip. Thus, two identically-designed low-pass filters on a single chip can be expected to have different cutoff frequencies. These differences can be problematic. For example, modern Orthogonal Frequency Division Modulation (OFDM) systems require a pair of matched low-pass filters in their RF-to-baseband and baseband-to-RF conversion circuitry, and even small amounts of mismatch can cause an OFDM device to operate poorly and outside of an industry specification.
To address these component variations, designers often incorporate some form of calibration circuitry so that individual filters can be adjusted to better conform with device specifications. Analog low-pass filters, for example, may contain banks of capacitors that can be programmably placed in and out of circuit such that a cutoff frequency may be fine-tuned.
Unfortunately, because calibration processes cannot exactly match every pair of low-pass filters due to practical circuit limitations, filter mismatch will occur not just under the conditions for which the calibration took place, but will likely be worse for other conditions that the filters must address. For example, assuming that two digital filters are calibrated using a bandwidth of 20 MHz, amplitude and phase variations between the two filters will increase for bandwidths of 40 MHz, and increase more for bandwidths of 80 MHz. Part of these increasing variations is caused by non-ideal components within analog filters, and part is due to the fact that the analog filters will need to be reprogrammed to address different cutoff frequencies as a function of bandwidth. By way of example, a analog low-pass filter for an OFDM communication system operating for a bandwidth of 20 MHz will require an 8.75 MHz cutoff frequency while an 18.75 MHz cutoff frequency will be needed for a 40 MHz bandwidth, and a 38.75 MHz cutoff frequency will be needed for an 80 MHz bandwidth.
In operation, each of the I-baseband (low-pass) filter 230 and the Q-baseband (low-pass) filter 232 are calibrated such that each will, to a practical extent possible, have a common desired cutoff frequency f0 corresponding to a first desired bandwidth BW0. While there is no limitation as to the particular bandwidths or cutoff frequencies that may be used, for the purposes of explanation the first desired bandwidth BW0 is 20 MHz, and the corresponding desired cutoff frequency f0 is 8.75 MHz. Similarly, while there is no limitation as to the types of low-pass filters that may be used, for the purposes of explanation and practical example, the I-baseband filter 230 and Q-baseband filter 230 are both fifth-order Chebyshev Type-1 filters using switch-capacitor technology.
Initial calibration starts with the tone generation circuitry 152 (via the I-DAC 132 and the Q-DAC 134) injecting both a reference tone fR and a cutoff tone fC into each of the I-baseband filter 230 and the Q-baseband filter 232. The I-baseband filter 230 and the Q-baseband filter 232, in turn, provide a respective output response consistent with their respective non-ideal cutoff frequencies, f0-I and f0-Q, while the power/phase measurement circuitry 156 (via the I-ADC 112 and the Q-ADC 114) measures the respective filter responses.
During this time, the code search circuitry 154 will vary separate digital control codes (“capacitor codes” or “cap codes”) to the I-baseband filter 230 and the Q-baseband filter 232 until the respective non-ideal cutoff frequencies, f0-I and f0-Q, match the ideal cutoff frequency f0 as close as possible given the available resolution of the capacitor codes. For example, assuming that the I-baseband filter 230 and the Q-baseband filter 232 each have a capacitor code resolution of 8 bits, the code search circuitry 154 can provide any number of search algorithms to provide capacitor codes within a range of [−128 to 127] until respective particular capacitor codes are selected that most accurately causes the baseband filters {230, 232} to utilize the desired cutoff frequency f0. These selected capacitor codes will be referred to below as the first capacitor code ICODE and the second capacitor code QCODE.
Returning to
Typically, the one or more additional bandwidths will be a multiple of BW0. For example, in various embodiments, a second desired bandwidth BW1 will equal N×BW0, where N is a positive integer greater than 1.
While bandwidths may be multiples of one another, respective cutoff frequencies for such larger bandwidths will not be multiples of one another. For instance, assuming BW0=20 MHz and f0=8.75 MHz, a second bandwidth BW1 of 40 MHz will use a respective cutoff frequency f1 of 18.75 MHz, which represents a “cutoff frequency offset” Δf of 1.25 MHz (18.75 MHz−(2*8.75 MHz)=1.25 MHz). Similarly, again assuming BW0=20 MHz and f0=8.75 MHz, a second bandwidth BW1 of 80 MHz will use a respective cutoff frequency f1 of 38.75 MHz, which represents a cutoff frequency offset Δf of 3.75 MHz (38.75 MHz MHz−(4*8.75 MHz)=3.75 MHz).
Although employing a cutoff frequency offset can be highly advantageous, such offsets are problematic in that the offsets may cause mismatch between a pair of low-pass filters at BW1 to increase to a point where the increased mismatch causes a wireless device to fall outside of performance specifications. Accordingly, the calibration circuitry 158 is configured to, for a respective second cutoff frequency f1 for a second/higher bandwidth BW1, determine a capacitor code offsets ΔIOFFSET and ΔQOFFSET commensurate with the frequency offset Δf, add the capacitor code offset ΔIOFFSET to the first capacitor code ICODE to produce a first compensated capacitor code IC-CODE, and add the capacitor code offset ΔQOFFSET to the second capacitor code QCODE to produce a second compensated capacitor code QC-CODE.
However, the capacitor code offsets must not just reflect the frequency offset Δf, but must also take into consideration a “fractional capacitor code” CIFRAC corresponding to the first desired bandwidth BW0, the fractional capacitor code CIFRAC being a value that lies between two consecutive capacitor codes [ICODE, ICODE+1] on I rail, keeping Qcode unchanged, and that ideally corresponds to both a zero phase difference and a zero power difference between a first low-pass filter and a second low-pass filter.
The fractional capacitor code CIFRAC will be a real, non-integer, number, and as such is incompatible with programmable filter circuitry that relies on discrete switches to program/calibrate. As such, the capacitor code offset ΔIOFFSET/ΔQOFFSET may be determined by rounding the fractional capacitor code CIFRAC to a nearest integer, adding the capacitor code offset ΔIOFFSET to the first capacitor code ICODE to produce the first compensated capacitor code IC-CODE, and adding the capacitor code offset ΔQOFFSET to the second capacitor code QCODE to produce the second compensated capacitor code QC-CODE.
In various embodiments, the capacitor code offsets ΔIOFFSET and ΔQOFFSET are calculated by rounding to the nearest integer the formula [(1+α Δfc)*ΔCFRAC], where ΔCFRAC is a difference between the fractional first capacitor code CIFRAC and the second capacitor code QCODE, α is a scaling factor derived from empirical data, and Δfc is a capacitor code difference corresponding to the cutoff frequency offsets ΔIOFFSET and ΔQOFFSET. If Δfc=0, then the capacitor code offset calculation is reduced to rounding to the nearest integer the formula [ΔCFRAC]. However, assuming Δfc≠0, scaling factor α must be factored.
While a scaling factor α may be determined in a number of ways, in a number of embodiments a scaling factor α is determined based on empirical data. FIGS. 6A and 6B depict examples of how mismatch for low-pass filters for a particular bandwidth becomes worse at higher bandwidths. While
Again returning to
At S702, for a first desired bandwidth BW0 corresponding to the common desired cutoff frequency f0, a reference tone fR and a cutoff tone fC are injected into both the first low-pass filter and the second low-pass filter using, for example, separate DACs under the control of some form of tone generation circuitry.
At S704, the responses of the first low-pass filter and the second low-pass filter are digitized using respective ADCs so as to measure power responses of the reference tone fR and cutoff tone fC. During this time, a capacitor code that controls a cutoff frequency f0-I of the first low-pass filter is varied until a first capacitor code ICODE is determined that most accurately causes the first low-pass filter to utilize the desired cutoff frequency f0. Similarly, a capacitor code that controls the second low-pass filter is varied until a second capacitor code QCODE is determined that most accurately causes the second low-pass filter to utilize the desired cutoff frequency f0.
At S708, a fractional capacitor code CIFRAC is determined again noting that a fractional capacitor code CIFRAC is a non-integer value that lies between two consecutive capacitor codes [ICODE, ICODE+1], and that ideally corresponds to both a zero phase difference and a zero power difference between the first low-pass filter and the second low-pass filter. While the particular methodology may vary from embodiment to embodiment, one approach to determining the fractional capacitor code CFRA may be had by interpolating a line using a plurality of points with each point having (See,
At S710, a scaling factor α is derived, for example, from empirical data. At S712, capacitor code offsets ΔIOFFSET and ΔQOFFSET are determined by rounding to the nearest integer a scaled value=[(1+α Δfc)*ΔCFRAC], where ΔCFRAC is a difference between the fractional first capacitor code ΔCFRAC and the second capacitor code QCODE, α is the scaling factor derived at S710, CIFRAC is the fractional capacitor code derived at S708, and Δfc is a capacitor code difference corresponding to the cutoff frequency offset Δf determined at S706.
At S714, a first compensated capacitor code IC-CODE is calculated by adding the capacitor code offset ΔIOFFSET to the first capacitor code ICODE. Similarly, a second compensated capacitor code QC-CODE is calculated by adding the capacitor code offset ΔQOFFSET to the second capacitor code QCODE. At S716, an operating bandwidth is changed from BW0 to BW1, the first compensated capacitor code IC-CODE is applied to the first/I low-pass filter, and the second compensated capacitor code QC-CODE is applied to the second/Q low-pass filter.
While the invention has been described in conjunction with the specific embodiments thereof that are proposed as examples, it is evident that many alternatives, modifications, and variations will be apparent to those skilled in the art. Accordingly, embodiments of the invention as set forth herein are intended to be illustrative, not limiting. There are changes that may be made without departing from the scope of the invention.
Salhotra, Atul, Pinagapany, Srinivas, Timofeev, Sergey
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