A printed wiring board includes an inner conductive-circuit layer, an insulation layer structure including a first insulation layer laminated on inner conductive-circuit layer and a second insulation layer laminated on the first insulation layer, and an outermost conductive-circuit layer laminated on the insulation layer structure and including connection portions such that the connection portions are positioned to mount a component on the insulation layer structure. The second insulation layer is interposed between the first insulation layer and the outermost conductive-circuit layer and has a thickness which is smaller than a thickness of the first insulation layer such that an outer surface of the second insulation layer on an outermost conductive-circuit-layer side is flatter than an inner surface of the second insulation layer on a first insulation-layer side.
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1. A printed wiring board, comprising:
an inner conductive-circuit layer;
an insulation layer structure comprising a first insulation layer laminated on the inner conductive-circuit layer and a second insulation layer laminated on the first insulation layer; and
an outermost conductive-circuit layer laminated on the insulation layer structure and comprising a plurality of connection portions such that the plurality of connection portions is positioned to mount a component on the insulation layer structure,
wherein the second insulation layer is interposed between the first insulation layer and the outermost conductive-circuit layer and has a thickness which is smaller than a thickness of the first insulation layer such that an outer surface of the second insulation layer on an outermost conductive-circuit-layer side is flatter than an inner surface of the second insulation layer on a first insulation-layer side.
15. A method for manufacturing a printed wiring board, comprising:
laminating a first insulation layer on an inner conductive-circuit layer;
forming a second insulation layer on the first insulation layer such that the first and second insulation layers form an insulation layer structure comprising the first insulation layer laminated on the inner conductive-circuit layer and the second insulation layer laminated on the first insulation layer; and
forming an outermost conductive-circuit layer on the insulation layer structure such that the outermost conductive-circuit layer comprises a plurality of connection portions positioned to mount a component on the insulation layer structure,
wherein the second insulation layer is interposed between the first insulation layer and the outermost conductive-circuit layer and has a thickness which is smaller than a thickness of the first insulation layer such that an outer surface of the second insulation layer on an outermost conductive-circuit-layer side is flatter than an inner surface of the second insulation layer on a first insulation-layer side.
2. A printed wiring board according to
3. A printed wiring board according to
4. A printed wiring board according to
5. A printed wiring board according to
6. A printed wiring board according to
7. A printed wiring board according to
8. A printed wiring board according to
9. A printed wiring board according to
10. A printed wiring board according to
11. A printed wiring board according to
12. A printed wiring board according to
a core substrate having a first surface and a second surface on an opposite side with respect to the first surface,
wherein a plurality of buildup layers each comprising the inner conductive-circuit layer, the insulation layer structure and the outermost conductive-circuit layer is formed on the first and second surfaces of the core substrate, respectively.
13. A printed wiring board according to
a solder resist layer formed on the outermost conductive-circuit layer such that the solder resist layer has a plurality of opening portions exposing the plurality of connection portions, respectively.
14. A printed wiring board according to
16. A method for manufacturing a printed wiring board according to
17. A method for manufacturing a printed wiring board according to
18. A method for manufacturing a printed wiring board according to
19. A method for manufacturing a printed wiring board according to
20. A method for manufacturing a printed wiring board according to
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The present application is based upon and claims the benefit of priority to Japanese Patent Application No. 2014-106006, filed May 22, 2014, the entire contents of which are incorporated herein by reference.
Field of the Invention
The present invention relates to a printed wiring board, where an outermost conductive-circuit layer is laminated on an inner conductive-circuit layer with an insulation layer provided in between, and connection portions for a component to be mounted on a substrate are formed on the outermost conductive-circuit layer. The present invention also relates to a method for manufacturing such a printed wiring board.
Description of Background Art
In a printed wiring board, an insulation layer may be formed by providing a thermosetting resin sheet on an inner conductive-circuit layer and applying pressure and heat thereon. The outermost conductive-circuit layer is formed on the flat surface by plating or the like (see JP2014-72371A, for example). The entire contents of this publication are incorporated herein by reference.
According to one aspect of the present invention, a printed wiring board includes an inner conductive-circuit layer, an insulation layer structure including a first insulation layer laminated on inner conductive-circuit layer and a second insulation layer laminated on the first insulation layer, and an outermost conductive-circuit layer laminated on the insulation layer structure and including connection portions such that the connection portions are positioned to mount a component on the insulation layer structure. The second insulation layer is interposed between the first insulation layer and the outermost conductive-circuit layer and has a thickness which is smaller than a thickness of the first insulation layer such that an outer surface of the second insulation layer on an outermost conductive-circuit-layer side is flatter than an inner surface of the second insulation layer on a first insulation-layer side.
According to another aspect of the present invention, a method for manufacturing a printed wiring board includes laminating a first insulation layer on an inner conductive-circuit layer, forming a second insulation layer on the first insulation layer such that the first and second insulation layers form an insulation layer structure including the first insulation layer laminated on inner conductive-circuit layer and the second insulation layer laminated on the first insulation layer, and forming an outermost conductive-circuit layer on the insulation layer structure such that the outermost conductive-circuit layer including connection portions positioned to mount a component on the insulation layer structure. The second insulation layer is interposed between the first insulation layer and the outermost conductive-circuit layer and has a thickness which is smaller than a thickness of the first insulation layer such that an outer surface of the second insulation layer on an outermost conductive-circuit-layer side is flatter than an inner surface of the second insulation layer on a first insulation-layer side.
A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein:
The embodiments will now be described with reference to the accompanying drawings, wherein like reference numerals designate corresponding or identical elements throughout the various drawings.
In the following, a first embodiment of the present invention is described with reference to
On each of upper and lower conductive-circuit layers 12 of core substrate 11, insulation layer 15, outermost conductive-circuit layer 21 and solder-resist layer 22 are laminated in that order so that the aforementioned buildup layer 20 is formed with insulation layer 15 and outermost conductive-circuit layer 21. Insulation layer 15 has a double-layer structure of first insulation layer 16 made of thermosetting insulative resin containing reinforcing material (for example, inorganic filler as a reinforcing material is contained at 30˜70 wt. %) and second insulation layer 17 made of thermosetting insulative resin containing no reinforcing material or containing inorganic filler at a lower content than that in first insulation layer 16. First insulation layer 16 is laminated on conductive-circuit layer 12, and second insulation layer 17 is laminated on first insulation layer 16. In addition, distance (L1) (see
Here, the surface on the conductive-circuit-layer 12 side of first insulation layer 16 shows undulations corresponding to the concavo-convex patterns caused by conductive-circuit layer 12 that protrudes from core substrate 11, whereas the surface of first insulation layer 16 on the opposite side of conductive-circuit layer 12 is substantially flat. However, as the enlarged view in
Multiple pad holes are formed in solder-resist layer 22, and multiple pads 23 (corresponding to “connection portions” according to an embodiment of the present invention) are formed in the pad holes by using part of outermost conductive-circuit layer 21. In addition, some of pads 23 are arranged in vertical and horizontal rows on which to mount semiconductor chip 25 (corresponding to a “component to be mounted on a substrate” according to an embodiment of the present invention: see
Printed wiring board 10 of the present embodiment is manufactured as follows.
(1) As shown in
(2) As shown in
(3) Electroless plating is performed to form electroless plated film (not shown) on copper foil (11C) on each of the upper and lower surfaces of core substrate 11 and on the inner surfaces of penetrating holes 13.
(4) As shown in
(5) Electrolytic plating is performed so that electrolytic plated film 34 is formed on portions of the electroless plated film (not shown) exposed from plating resist 33, and plating is filled in penetrating holes 13 to form through-hole conductors 14.
(6) Plating resist 33 is removed, and the electroless plated film (not shown) and copper foil (11C) that were under plating resist 33 are also removed. Conductive-circuit layers (12, 12) on the upper and lower surfaces respectively of core substrate 11 are formed by the remaining electrolytic plated film 34, electroless plated film and copper foil (11C).
(7) As shown in
(8) As shown in
(9) After thermosetting insulative resin 36 is coated on first insulation layers (16, 16) on the upper and lower surfaces of core substrate 11, core substrate 11 is positioned between a pair of hot plates of a hot-pressing machine (not shown), and the paired hot plates are pressed against each first insulation layer 16 from above thermosetting insulative resin 36. At that time, the paired hot plates are set at a temperature lower than the curing temperature of thermosetting insulative resin 36. On the first insulation-layer 16 side, thermosetting insulative resin 36 is molded to show slight undulations corresponding to the patterns of first insulation layer 16, whereas on the opposite side, it is molded into a flat surface with a higher degree of flatness than that on the first insulation-layer 16 side. Then, thermosetting insulative resin 36 is set under conditions of a temperature higher than the curing temperature of thermosetting insulative resin 36. As a result, thermosetting insulative resin 36 is cured to make the aforementioned second insulation layer 17. Insulation layers (15, 15) each made up of first insulation layer 16 and second insulation layer 17 are respectively formed on the upper and lower surfaces of core substrate 11.
(10) As shown in
(11) Electroless plating is performed to form electroless plated film (not shown) on insulation layers 15 and in via holes 18.
(12) As shown in
(13) Electrolytic plating is performed and electrolytic plating is filled in via holes 18 to form via conductors 19, while electrolytic plated films (38, 38) are formed on portions of the electroless plated film (not shown) formed on insulation layer 15 and exposed from plating resist 37, as shown in
(14) Plating resist 37 is removed and the electroless plated film (not shown) that was under plating resist 37 is also removed. As shown in
(15) As shown in
(16) As shown in
(17) As shown in
So far, the structure and manufacturing method of printed wiring board 10 have been described according to the first embodiment. Next, effects of printed wiring board 10 are described with reference to usage examples of printed wiring board 10. Printed wiring board 10 of the present embodiment is used in the following example. Namely, as shown in
At that time, if the degree of flatness of insulation layer 15 is low in printed wiring board 10, some of multiple solder bumps 24 may fail to be connected to semiconductor chip 25 as shown in
In a second embodiment, a step for forming second insulation layer 17 in the manufacturing method of printed wiring board 10 is different from that in the first embodiment. Namely, the method for manufacturing printed wiring board 10 of the present embodiment uses thermosetting insulative resin film 40 with release sheet 41 laminated on one of its surfaces as shown in
Printed wiring board (10V) of the present embodiment is different from those in first and second embodiments in that multiple (for example, two) second insulation layers (17A, 17B) are laminated on each first insulation layer 16 on the upper and lower surfaces of core substrate 11 as shown in
Printed wiring board (10V) of the present embodiment is manufactured as follows: After first insulation layers (16, 16) are formed on the upper and lower surfaces of core substrate 11, using the same method for forming second insulation layer 17 as in the first embodiment, liquid-type thermosetting resin (36A) is sprayed on first insulation layers (16, 16), and core substrate 11 is hot pressed from both the upper-and-lower-surface sides so that second insulation layer (17A) is formed on each first insulation layer 16. Next, by repeating the same procedure as above, liquid-type thermosetting resin (36B) is sprayed on each second insulation layer (17A), and core substrate 11 is hot pressed so that second insulation layer (17B) is formed on each second insulation layer (17A). Accordingly, insulation layers (15V) are completed, each made up of first insulation layer 16 and second insulation layers (17A, 17B). Using the same procedure as in the first embodiment for the rest, outermost conductive-circuit layer 21, solder-resist layers 22 and the like are formed to complete printed wiring board (10V). According to the structure of the present embodiment, the surface of insulation layer (15V) on the outermost conductive-circuit-layer 21 side is made to have an even higher degree of flatness. In the present embodiment, it is also an option for second insulation layers (17A, 17B) to be formed by using thermosetting insulative resin film 40 with release sheet 41 laminated on one of its surfaces, the same as in the second embodiment.
The present invention is not limited to the embodiments above. For example, other embodiments described below may also be included in the technological scope of the present invention. Moreover, various modifications are possible in the embodiments unless they deviate from the gist of the present invention.
(1) In the first through third embodiments above, hot plates were used to form a flat surface on one side of each of first insulation layer 16 and second insulation layers (17, 17A, 17B). However, first insulation layer 16 and the like may also be pressure-molded by passing core substrate 11 through a pair of rollers.
(2) Printed wiring boards 10 and (10V) in the first to third embodiments above included core substrate 11. However, the present invention may also be applied on printed wiring board (10V2) that does not include a core substrate as shown in
(3) In the first embodiment above, thermosetting insulative resin 36 for forming second insulation layer 17 was pressed using hot plates heated at a temperature lower than the resin curing temperature, and then the temperature was raised to be higher than the curing temperature. However, a second insulation layer may be formed by pressing a thermosetting insulative resin by using hot plates that are heated to a temperature higher than the curing temperature of the thermosetting insulative resin.
(4) In printed wiring boards (10, 10V) of the first through third embodiments above, single buildup layers (20, 20) are respectively formed on both surfaces of core substrate 11. However, multiple buildup layers may be laminated.
In a printed wiring board, an insulation layer may be formed by providing a thermosetting resin sheet on an inner conductive-circuit layer and applying pressure and heat thereon. On the side where the inner conductive-circuit layer is formed, the surface of the laminated insulation layer shows undulations corresponding to the concavo-convex patterns of the inner conductive-circuit layer, whereas the surface of the insulation layer opposite the inner conductive-circuit layer is made flat as a result of being pressed by the flat hot plate of a hot pressing machine.
The surface of the insulation layer on which the outermost conductive-circuit layer is laminated is not made sufficiently flat due to the concavo-convex patterns of the inner conductive-circuit layer. Thus, when multiple solder bumps, for example, are arranged in vertical and horizontal rows on the outermost conductive-circuit layer and a component to be mounted on the substrate is connected to those solder bumps, connection failure may be observed in some solder bumps.
A printed wiring board according to an embodiment of the present invention has an insulation layer which exhibits enhanced surface flatness, and an outermost conductive-circuit layer laminated on the insulation layer. Another embodiment of the present invention is a method for manufacturing such a printed wiring board.
A printed wiring board according to an embodiment of the present invention has a first insulation layer; an outermost conductive-circuit layer which is laminated on the first insulation layer and has connection portions for a component to be mounted on the substrate; an inner conductive-circuit layer laminated under the first insulation layer; and a second insulation layer sandwiched between the first insulation layer and the outermost conductive-circuit layer and formed to be thinner than the first insulation layer. In such a printed wiring board, the second insulation layer is set to have a flatter surface on the outermost conductive-circuit-layer side than on the first insulation-layer side.
In a printed wiring board according to an embodiment of the present invention, concavo-convex patterns of a first insulation layer underneath the outermost conductive-circuit layer are filled with a second insulation layer by laminating the second insulation layer, which is thinner than the first insulation layer and is positioned on the outermost conductive-circuit-layer side of the first insulation layer, so that the second insulation layer is set to have a flatter surface on the outermost conductive-circuit-layer side than on the first insulation-layer side. Accordingly, among the surfaces of the insulation layer made up of the first and second insulation layers, the surface on the outermost conductive-circuit-layer side is made flatter than that in a conventional printed wiring board.
Obviously, numerous modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
5055321, | Apr 28 1988 | IBIDEN CO , LTD , C O, IBIDEN CO , LTD | Adhesive for electroless plating, printed circuit boards and method of producing the same |
5600414, | Nov 09 1992 | American Roller Company, LLC | Charging roller with blended ceramic layer |
6365843, | Dec 29 1997 | Ibiden Co., Ltd. | Multilayer printed wiring board |
6909054, | Feb 25 2000 | IBIDEN CO , LTD | Multilayer printed wiring board and method for producing multilayer printed wiring board |
7390974, | Feb 26 1998 | Ibiden Co., Ltd. | Multilayer printed wiring board with filled viahole structure |
8745863, | Jun 02 1999 | Ibiden Co., Ltd. | Method of manufacturing multi-layer printed circuit board |
20050088833, | |||
20050230835, | |||
20070030628, | |||
20070125575, | |||
20070297729, | |||
20110088937, | |||
20120073870, | |||
JP2014072371, |
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