A method can include forming a contact trench in a semiconductor structure so that the contact trench extends to a contact formation, the forming including using a hardmask layer, and filling the contact trench with a sacrificial material layer, the sacrificial material layer formed over the contact formation. A semiconductor structure can include a sacrificial material layer over a contact formation.
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13. A semiconductor structure comprising:
a contact formation;
one or more dielectric layer formed over the contact formation;
a hardmask layer formed over the one or more dielectric layer;
a contact trench formed in the one or more dielectric layer, the contact trench extending to the contact formation;
a sacrificial material layer formed in the contact trench over the contact formation to protect the contact formation wherein the sacrificial material layer is configured to be selective with respect to the one or more dielectric layer.
1. A method comprising:
forming a contact trench in a semiconductor structure so that the contact trench extends to a contact formation, the contact formation comprising a conductive material in contact with one of a separate source and drain, the forming including using a hardmask layer;
filling the contact trench with a sacrificial material layer, the sacrificial material layer formed over the contact formation;
removing the hardmask layer;
removing the sacrificial material layer from the trench to expose the contact formation without exposing the one of a source and drain; and
wherein the sacrificial material layer is provided by a carbon based material, and wherein the removing the sacrificial material layer includes using a plasma etch process.
10. A method comprising:
forming a contact trench in a semiconductor structure so that the contact trench extends to a contact formation, the contact formation comprising a conductive material in contact with one of a separate source and drain, the forming including using a hardmask layer;
filling the contact trench with a sacrificial material layer, the sacrificial material layer formed over the contact formation;
removing the hardmask layer;
removing the sacrificial material layer from the trench to expose the contact formation without exposing the one of a source and drain;
wherein the sacrificial material layer is provided by a carbon based material, and wherein the removing the sacrificial material layer includes using a plasma etch process; and
wherein the contact trench is formed in an ultra low k dielectric layer.
2. The method of
3. The method of
4. The method of
5. The method of
6. The method of
7. The method of
8. The method of
9. The method of
12. The method of
14. The semiconductor structure of
15. The semiconductor structure of
16. The semiconductor structure of
17. The semiconductor structure of
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The present disclosure relates to a semiconductor structure and more particularly a method for formation of a semiconductor structure that preserves material of a contact formation.
A gate of a semiconductor structure can include gate spacers having gate sidewalls, a gate dielectric layer and gate work function conductive material. According to a known approach for fabrication of a gate contact structure, a dielectric layer can be formed over the gate. A gate contact trench can be formed that extends through the dielectric layer. A gate contact formation can be formed in the gate contact trench. The gate contact formation can span a vertical spacing distance from a top elevation of the conductive gate work function material to a top elevation of the dielectric layer.
A semiconductor structure can include source-drain areas that together with the gate can define a transistor. A dielectric layer, e.g. Middle of Line (MOL) layer can be formed over the associated source-drain areas. Source-drain contact trenches can be formed in the dielectric layer and a contact formation can be a formed in the source-drain contact trenches.
A method can include forming a contact trench in a semiconductor structure so that the contact trench extends to a contact formation, the forming including using a hardmask layer, and filling the contact trench with a sacrificial material layer, the sacrificial material layer formed over the contact formation. A semiconductor structure can include a sacrificial material layer over a contact formation.
One or more aspects of the present disclosure are particularly pointed out and distinctly claimed as examples in the claims at the conclusion of the specification. The foregoing and other objects, features, and advantages of the invention are apparent from the following detailed description taken in conjunction with the accompanying drawings in which:
A semiconductor structure 10 is shown in
Semiconductor structure 10 can also include contact formations 82. Contact formations 82 can include a first layer 86 and a second layer 88. First layer 86 in one embodiment can be a formed of titanium nitride (TiN). First layer 86 can be regarded as a liner. Second layer 88 can be formed of tungsten, (W). In another embodiment, second layer 88 can be formed of cobalt (Co). Contact formation 82 can be formed in contact trenches 80.
Semiconductor structure 10 can also include hardmask layer 130 and hardmask layer 134. Hardmask layer 130 can be a dielectric hardmask layer (e.g. SiN can be used to protect the metal layers from oxidation) and hardmask layer 134 can be a conductive hardmask layer. In one embodiment hardmask layer 134 can be adapted to provide patterning memorization. Hardmask layer 130 and hardmask layer 134 can be used to form contact trenches in which contact formations can be formed.
Layers 106, 110, 114, 118 can be regarded as MOL Layers. Layers 122, 126, 130, 134 can be regarded as Back End of Line (BEOL) layers.
A method herein can prevent damage to contact formation 82. In the development of methods herein it was determined that contact formation 82 can become damaged by subsequent processing of semiconductor structure 10 subsequent to the formation of formation 82. In one aspect it was determined that contact formation 82, which can be regarded as a MOL contact formation, can become damaged by later stage processing of semiconductor structure 10 for formation of BEOL contact formations.
In the development of methods herein it was determined that where material of formation 82, e.g. of layer 86 and/or layer 88 can be undesirably removed when material of layer 134 is intentionally removed. For example, a wet etch process can be used to strip away material of hardmask layer 134. It was determined that when a wet etch process is used to strip away hardmask layer 134, a wet etch press can attack layer 86 and/or layer 88.
In one embodiment, layer 134 can be non-selective with layer 86. In one embodiment, layer 134 can be non-selective with layer 88. In one embodiment, layer 134 can be non-selective with layer 86 and layer 88. Layer 134 as well as layer 86 and/or layer 88 can have one or more common characteristic that causes material of layer 86 and/or layer 88 to be susceptible to removal when material of layer 134 is removed. In one embodiment layer 134 as well as layer 86 and/or layer 88 can both be formed of conductive material. In one embodiment layer 134 as well as layer 86 and/or layer 88 can be formed of nitrides. In one embodiment, layer 134 as well as layer 86 and/or layer 88 can include a common element, e.g. layer 134 can be formed of TiN and layer 86 and/or layer 88 can be formed of Ti. In one embodiment layer 134 and layer 86 and/or layer 88 can be formed of a common material, e.g., layer 134 can be formed of TiN and layer 86 and/or layer 88 can be formed of TiN.
Referring to the flow diagram of
At block 202 there can be performed forming a contact trench in a semiconductor structure so that the contact trench extends to a contact formation, the forming including using a hardmask layer.
At block 206 there can be performed filling the trench with a sacrificial material layer, the sacrificial material layer formed over the contact structure.
At block 210 there can be performed removing the hardmask layer.
At block 214 there can be performed removing the sacrificial material layer from the trench to expose the contact formation.
Further aspects of the method of
In one aspect sacrificial material layer 144 as shown in
In one aspect sacrificial material layer 144 as shown in
In one embodiment, sacrificial material layer 144 can be formed of non-conductive material. In one embodiment, sacrificial material layer 144 can be formed of carbon based material. In one embodiment, sacrificial material layer 144 can be formed of dielectric material. In one embodiment, sacrificial material layer 144 can be formed of oxide. In one embodiment, sacrificial material layer 144 can be formed of conformal material.
In one embodiment, sacrificial material layer 144 as shown in
In one embodiment, sacrificial material layer 144 as shown in
In one embodiment, as noted in respect to
In one embodiment, as noted in respect to
With semiconductor structure 10 in the stage as shown in
With reference to the specific embodiment of
There is set forth herein with reference to
There is also set forth herein with reference to
There is also set forth herein with reference to
Each of the formed layers as set forth herein, e.g., layer 102, 106, layer 110, layer 114, layer 118, layer 122, layer 126, layer 130, layer 134, layer 86, layer 88, layer 186, and/or layer 188 can be formed by way of deposition using any of a variety of deposition processes, including, for example, physical vapor deposition (PVD), atomic layer deposition (ALD), chemical vapor deposition (CVD), sputtering, or other known processes, depending on the material composition of the layer.
In one example, a protective mask layer as set forth herein, e.g., a mask layers for patterning layer 102, 106, layer 110, layer 114, layer 118, layer 122, layer 126, layer 130, layer 134, layer 86, layer 88, layer 186, and/or layer 188 as set forth herein may include a material such as, for example, silicon nitride, silicon oxide, or silicon oxynitride, and may be deposited using conventional deposition processes, such as, for example, CVD or plasma-enhanced CVD (PECVD). In other examples, other mask materials may be used depending upon the materials used in semiconductor structure. For instance, a protective mask layer may be or include an organic material. For instance, flowable oxide such as, for example, a hydrogen silsesquioxane polymer, or a carbon-free silsesquioxane polymer, may be deposited by flowable chemical vapor deposition (F-CVD). In another example, a protective mask layer may be or include an organic polymer, for example, polyacrylate resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylenesulfide resin or benzocyclobutene (BCB).
Removing material of a layer as set forth herein, e.g., layer 102, 106, layer 110, layer 114, layer 118, layer 122, layer 126, layer 130, layer 134, layer 86, layer 88, layer 186, and/or layer 188 can be achieved by any suitable etching process, such as dry or wet etching processing. In one example, isotropic dry etching may be used by, for example, ion beam etching, plasma etching or isotropic RIE. In another example, isotropic wet etching may also be performed using etching solutions selective to the material subject to removal.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprise” (and any form of comprise, such as “comprises” and “comprising”), “have” (and any form of have, such as “has” and “having”), “include” (and any form of include, such as “includes” and “including”), and “contain” (and any form contain, such as “contains” and “containing”) are open-ended linking verbs. As a result, a method or device that “comprises”, “has”, “includes” or “contains” one or more steps or elements possesses those one or more steps or elements, but is not limited to possessing only those one or more steps or elements. Likewise, a step of a method or an element of a device that “comprises”, “has”, “includes” or “contains” one or more features possesses those one or more features, but is not limited to possessing only those one or more features. Furthermore, a device or structure that is configured in a certain way is configured in at least that way, but may also be configured in ways that are not listed.
The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below, if any, are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the present invention has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the invention. The embodiment was chosen and described in order to best explain the principles of one or more aspects of the invention and the practical application, and to enable others of ordinary skill in the art to understand one or more aspects of the invention for various embodiments with various modifications as are suited to the particular use contemplated.
Siddiqui, Shariq, Kamineni, Vimal, Licausi, Nicholas Vincent, Wahl, Jeremy Austin
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