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The ornamental design for a cover for a semiconductor carrier, as shown and described.
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FIG. 1 is a top perspective view of a cover for a semiconductor carrier of our new design;
FIG. 2 is a front view thereof;
FIG. 3 is a rear view thereof;
FIG. 4 is a top view thereof;
FIG. 5 is a bottom view thereof;
FIG. 6 is a right-end view thereof; and,
FIG. 7 is a left-end view thereof.
The broken line showing of the environment is for illustrative purpose only and forms no part of the claimed design.
Matsuoka, Noriyuki, Hisaishi, Minoru, Suzuki, Takeyuki
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Jun 10 2005 | Yamaichi Electronics Co., Ltd | (assignment on the face of the patent) | / |
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