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The ornamental design for a socket for semiconductor device, as shown and described.
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FIG. 1 is a left-perspective view of a socket for semiconductor device showing my new design;
FIG. 2 is a front elevational view of my new design, the rear elevational view being a mirror image thereof;
FIG. 3 is a top plan view of my new design;
FIG. 4 is a bottom plan view of my new design;
FIG. 5 is a right-side view of my new design, the left-side view being a mirror image thereof;
FIG. 6 a bottom plan view of my new design with the cross section indicated at 7—7; and,
FIG. 7 is a cross sectional view of my new design taken along line 7—7 in FIG. 6.
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Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Dec 08 2004 | SATO, MASARU | YAMAICHI ELECRONICS CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 016258 | /0952 | |
Dec 16 2004 | Yamaichi Electronics Co., Ltd. | (assignment on the face of the patent) | / |
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