The ornamental design for a portion of a semiconductor apparatus mounting-position accuracy measurement jig, as shown and described.
FIG. 1 is a front, top and right side perspective view of a portion of a semiconductor apparatus mounting-position accuracy measurement jig, showing my new design;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a rear elevational view thereof;
FIG. 4 Is a right side elevational view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a top plan view thereof; and,
FIG. 7 Is a bottom plan view thereof.
The broken lines are for illustrative purposes only and form no part of the claimed design.