Patent
   D554084
Priority
Oct 31 2005
Filed
Oct 31 2005
Issued
Oct 30 2007
Expiry
Oct 30 2021
Assg.orig
Entity
unknown
2
12
n/a
The ornamental design for a portion of a semiconductor apparatus mounting-position accuracy measurement jig, as shown and described.

FIG. 1 is a front, top and right side perspective view of a portion of a semiconductor apparatus mounting-position accuracy measurement jig, showing my new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 Is a right side elevational view thereof;

FIG. 5 is a left side elevational view thereof;

FIG. 6 is a top plan view thereof; and,

FIG. 7 Is a bottom plan view thereof.

The broken lines are for illustrative purposes only and form no part of the claimed design.

Iizuka, Kazuhiro

Patent Priority Assignee Title
D724554, Feb 19 2014 Fuji Electric Co., Ltd. Semiconductor module
D761745, Jun 28 2013 Sumitomo Electric Industries, Ltd. Semiconductor device
Patent Priority Assignee Title
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Sep 21 2005IIZUKA, KAZUHIROKabushiki Kaisha ToshibaASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0171740690 pdf
Oct 31 2005Kabushiki Kaisha Toshiba(assignment on the face of the patent)
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