A buck switching regulator formed on an integrated circuit receives an input voltage and provides a switching output voltage on a switch output node using a constant on-time, variable off-time feedback control loop. The buck switching regulator includes an amplifier comparing a feedback voltage to a reference voltage and generating an output voltage on an output terminal, a first capacitor and a first resistor connected in series between the switch output node and the output terminal of the amplifier, and a second capacitor coupled between the DC output voltage node and the output terminal of the amplifier. The first capacitor and the first resistor generate a ripple voltage signal which is injected onto the output terminal of the amplifier for use in the constant on-time, variable off-time feedback control scheme. The magnitude of the ripple voltage signal is a function of the capacitance value of the second capacitor.
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14. A method in buck switching regulator receiving an input voltage and controlling a first switch and a second switch using a constant on-time, variable off-time feedback control loop to drive a switch output node for generating a switching output voltage, the switch output node being coupled to an lc filter circuit to generate a regulated output voltage having a substantially constant magnitude on an output node, the regulated output voltage being fed back to the buck switching regulator to a voltage divider for generating a feedback voltage on a feedback voltage node, the method comprising:
coupling the feedback voltage to a first input terminal of an amplifier having a high output impedance;
coupling a first reference voltage to a second input terminal of the amplifier;
generating a first output voltage at an output terminal of the amplifier indicative of the difference between the feedback voltage and the first reference voltage;
generating a ripple voltage signal from the switching output voltage;
injecting the ripple voltage signal to the output terminal of the amplifier for use in the constant on-time, variable off-time feedback control loop;
coupling the first output voltage of the amplifier with the injected ripple voltage signal to a first input terminal of a comparator;
coupling a second reference voltage to a second input terminal of the comparator; and
adjusting the magnitude of the ripple voltage signal at the output terminal of the amplifier using a capacitive divider.
1. A buck switching regulator formed on an integrated circuit and receiving an input voltage, the buck switching regulator controlling a first switch and a second switch using a constant on-time, variable off-time feedback control loop to drive a switch output node for generating a switching output voltage, the switch output node being coupled to an lc filter circuit external to the integrated circuit to generate a regulated output voltage having a substantially constant magnitude on an output node, the regulated output voltage being fed back to the buck switching regulator to a voltage divider for generating a feedback voltage on a feedback voltage node, the buck switching regulator comprising:
an amplifier with a high output impedance having a first input terminal coupled to receive the feedback voltage, a second input terminal coupled to receive a first reference voltage and an output terminal providing a first output voltage indicative of the difference between the feedback voltage and the first reference voltage;
an error comparator having a first input terminal coupled to receive a second reference voltage and a second input terminal coupled to receive the first output voltage of the amplifier, the error comparator generating an output voltage signal for controlling the constant on-time, variable off-time feedback control loop of the buck switching regulator;
a first capacitor and a first resistor formed on the integrated circuit of the buck switching regulator, the first capacitor and the first resistor being connected in series between the switch output node and the output terminal of the amplifier; and
a second capacitor coupled between the output node and the output terminal of the amplifier,
wherein the first capacitor and the first resistor generate a ripple voltage signal being related to the switching output voltage and provide the ripple voltage signal to the output terminal of the amplifier for use in the constant on-time, variable off-time feedback control loop, the magnitude of the ripple voltage signal being a function of the capacitance value of the second capacitor.
2. The buck switching regulator of
3. The buck switching regulator of
4. The buck switching regulator of
5. The buck switching regulator of
6. The buck switching regulator of
7. The buck switching regulator of
8. The buck switching regulator of
9. The buck switching regulator of
10. The buck switching regulator of
11. The buck switching regulator of
12. The buck switching regulator of
13. The buck switching regulator of
15. The method of
coupling the feedback voltage to a first input terminal of an amplifier having a high output impedance comprises coupling the feedback voltage to a first input terminal of a low-transconductance operational transconductance amplifier; and
coupling a first reference voltage to a second input terminal of the amplifier comprises coupling the first reference voltage to a second input terminal of the low-transconductance operational transconductance amplifier.
17. The method of
providing a first capacitor and a first resistor connected in series between the switch output node and the output terminal of the amplifier, the first capacitor and the first resistor generating the ripple voltage signal from the switching output voltage and injecting the ripple voltage signal to the output terminal of the amplifier.
18. The method of
19. The method of
providing a second capacitor between the output voltage node and the output terminal of the amplifier, the magnitude of the ripple voltage signal being a function of the capacitance value of the second capacitor.
20. The method of
21. The method of
22. The method of
23. The method of
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This application is a continuation-in-part of application Ser. No. 11/530,548, filed Sep. 11, 2006, entitled “Ripple Generation In Buck Regulator Using Fixed On-Time Control To Enable The Use of Output Capacitor Having Any ESR” having at least one common inventor hereof, which application is incorporated herein by reference in its entirety.
This application is related to concurrently filed and commonly assigned U.S. patent application Ser. No. 11/955,157, entitled “Constant On-Time Regulator With Increased Maximum Duty Cycle,” of Matthew Weng, which application is incorporated herein by reference in its entirety.
The invention relates to switching regulators or DC-to-DC converters and, in particular, to a control scheme incorporated in a buck regulator using constant on-time control and an output capacitor having any value of ESR for improving output voltage accuracy.
DC voltage regulators or switching regulators operate to convert energy from one DC voltage level to another DC voltage level. These types of switching regulators are also referred to as DC/DC converters. A switching regulator, sometimes referred to as a switching mode power supply, provides power supply function through low loss components such as capacitors, inductors, and transformers, and power switches that are turned on and off to transfer energy from the input to the output in discrete packets. A feedback control circuit is used to regulate the energy transfer to maintain a constant output voltage within the desired load limits of the circuit.
A switching regulator can be configured to step up the input voltage or step down the input voltage or both. Specifically, a buck switching regulator, also called a “buck converter,” steps down the input voltage while a boost switching regulator, also called a “boost converter,” steps up the input voltage. A buck-boost switching regulator, or buck-boost converter, provides both step-up and step-down functions.
The operation of the switching regulator is well known and is generalized as follows. A power switch is turned on to apply energy to an inductor of the output filter circuit to allow the current through the inductor to build up. When the power switch is turned off, the voltage across the inductor reverses and charges are transferred onto an output capacitor of the output filter circuit and the load. A relatively constant output voltage is maintained by the output capacitor. A second power switch is sometimes used for synchronous control operation.
A switching regulator can be constructed using integrated (internal) power switches or external power switches. When the power switches are external to the switching regulator integrated circuit (IC), the switching regulator IC is sometimes referred to as a “switching regulator controller” or a converter controller to indicate that the switching regulator controller provides the control signals for driving the external power switches which are in turn coupled to the output filter circuit to generate the relatively constant output voltage. A switching regulator controller is also referred to as a buck controller, a boost controller, or a buck-boost controller depending on the voltage conversion function of the controller.
Buck switching regulators or “buck regulators” with fixed on-time control are preferred in the industry for some important advantages as good efficiency for light load in PFM (pulse width modulation) mode, easy synchronization with external signals, easy control of a relatively large off-time and a very small fixed on-time to regulate a high input voltage to a low output voltage.
Fixed on-time (or constant on-time) regulators are one type of voltage regulators employing ripple-mode control while hysteretic regulators are another type of switching regulators also employing ripple-mode control. In general, ripple-mode regulators regulate their output voltage based on the ripple component in the output signal. Because of the switching action at the power switches, all switch-mode regulators generate an output ripple current through the switched output inductor. This current ripple manifests itself as an output voltage ripple due, principally, to the equivalent series resistance (ESR) in the output capacitors placed in parallel with the load.
A hysteretic regulator uses a comparator to compare the output voltage being regulated, including ripple, to a hysteresis control band. Above an upper hysteresis limit, the hysteretic controller switches its associated output inductor low, and below a lower hysteresis limit the hysteretic controller switches the output inductor high. On the other hand, a fixed on-time regulator, while operating similar to hysteretic controllers, switches the output inductor high for a fixed time when the output ripple falls below a single reference point. At the end of the fixed on-time, even if the output ripple is still below the single reference point, the output inductor is switched low for a minimum off-time before getting switched back high for the fixed on-time again.
For voltage regulators using ripple-mode control, while the output ripple is useful in output voltage regulation, it is undesirable in terms of output signal noise and load voltage limits. Indeed, the desire to minimize output ripple has lead to design and production of capacitors having very low ESR. Lowering output capacitor ESR can significantly lower the output ripple signal. Low ripple serves the interests of noise minimization and reduced load voltage variation, but makes ripple-mode regulation more difficult. Low ripple magnitude reduces the comparator voltage differentials, making accurate and fast comparison very difficult.
To that end, manufacturers of fixed on-time voltage regulators impose a minimum ESR for the output capacitor to ensure a minimum amount of ripple voltage at the output voltage so that effective ripple-mode control can be realized. Thus, an output capacitor with a large ESR has to be used with all fixed on-time voltage regulators. In some cases, when the output capacitor itself does not have enough ESR, manufacturers suggest including a resistor in series with the output capacitor to introduce enough series resistance to generate the required minimum amount of ripple voltage.
One solution to the requirement of a high ESR output capacitor is adding a current feedback in the control loop. In another case, a virtual ripple generator is used to generate an internal virtual ripple proportional with inductor current. While these solutions allow for the use of low ESR capacitors in ripple-mode voltage regulators, these solutions add complexity and cost to the voltage regulators.
The requirement of a minimum amount of ripple voltage at the output signal limits the application of fixed on-time voltage regulators to cases where ripples in the output voltage can be tolerated. Also, zero ESR capacitors, such as ceramic capacitors, which are usually cheaper than tantalum capacitors having large ESR, cannot be used because a minimum amount of ESR is required for proper control loop operation.
According to one embodiment of the present invention, a buck switching regulator is formed on an integrated circuit and receives an input voltage where the buck switching regulator controls a first switch and a second switch using a constant on-time, variable off-time feedback control loop to drive a switch output node for generating a switching output voltage. The switch output node is coupled to an LC filter circuit external to the integrated circuit to generate a regulated output voltage having a substantially constant magnitude on an output node. The regulated output voltage is fed back to the buck switching regulator to a voltage divider for generating a feedback voltage on a feedback voltage node. The buck switching regulator includes an amplifier with a high output impedance having a first input terminal coupled to receive the feedback voltage, a second input terminal coupled to receive a first reference voltage and an output terminal providing a first output voltage indicative of the difference between the feedback voltage and the first reference voltage, an error comparator having a first input terminal coupled to receive a second reference voltage and a second input terminal coupled to receive the first output voltage of the amplifier where the error comparator generates an output voltage signal for controlling the constant on-time, variable off-time feedback control loop of the buck switching regulator, a first capacitor and a first resistor formed on the integrated circuit of the buck switching regulator where the first capacitor and the first resistor are connected in series between the switch output node and the output terminal of the amplifier, and a second capacitor coupled between the output node and the output terminal of the amplifier. In operation, the first capacitor and the first resistor generate a ripple voltage signal being related to the switching output voltage and provide the ripple voltage signal to the output terminal of the amplifier for use in the constant on-time, variable off-time feedback control loop and the magnitude of the ripple voltage signal is a function of the capacitance value of the second capacitor.
According to another aspect of the present invention, a method in buck switching regulator receiving an input voltage and controlling a first switch and a second switch using a constant on-time, variable off-time feedback control loop to drive a switch output node for generating a switching output voltage, where the switch output node is coupled to an LC filter circuit to generate a regulated output voltage having a substantially constant magnitude on an output node and the regulated output voltage is fed back to the buck switching regulator to a voltage divider for generating a feedback voltage on a feedback voltage node, includes coupling the feedback voltage to a first input terminal of an amplifier having a high output impedance, coupling a first reference voltage to a second input terminal of the amplifier, generating a first output voltage at an output terminal of the amplifier indicative of the difference between the feedback voltage and the first reference voltage, generating a ripple voltage signal from the switching output voltage, injecting the ripple voltage signal to the output terminal of the amplifier for use in the constant on-time, variable off-time feedback control loop, coupling the first output voltage of the amplifier with the injected ripple voltage signal to a first input terminal of a comparator, coupling a second reference voltage to a second input terminal of the comparator, and adjusting the magnitude of the ripple voltage signal at the output terminal of the amplifier using a capacitive divider.
The present invention is better understood upon consideration of the detailed description below and the accompanying drawings.
In accordance with the principles of the present invention, a buck switching regulator using a fixed on-time (or constant on-time) and minimum off-time control loop incorporates a ripple injection circuit for internally generating the necessary ripple using the switching output voltage and injecting the ripple voltage signal into the feedback control loop of the voltage regulator. The amount of ripple to be generated is adjusted by a feedforward capacitor which can be integrated onto the buck regulator or be externally coupled to the buck regulator. In this manner, the buck regulator can be configured to work with an output capacitor having any equivalent series resistors (ESR) values. In particular, when the output capacitor coupled to the buck regulator has a large ESR, the feedforward capacitor is used to program the ripple injection circuit to generate little or no ripple from the switching output voltage. However, when the output capacitor coupled to the buck regulator has zero or very little ESR, the feedforward capacitor is used to program the ripple injection circuit to generate the necessary ripple from the switching output voltage.
The buck switching regulator incorporating a ripple injection circuit provides many advantages over the conventional solutions. First, the buck switching regulator of the present invention enables the use of output capacitors having any ESR values. Thus, it is possible to use an output capacitor of zero or low ESR values, such as ceramic capacitors, to obtain an output voltage with very low output ripple. Meanwhile, the ripple injection circuit generates the necessary ripple internally using the switching output voltage so that the generated ripple voltage does not impact the output voltage whatsoever.
According to one aspect of the present invention, the ripple injection circuit includes a first capacitor and a first resistor connected in series between the switching output voltage and the feedback voltage and also includes a feedforward capacitor connected between the output voltage and the feedback voltage. In one embodiment, the first capacitor and the first resistor are integrated together with the resistor dividers of the feedback voltage onto the same integrated circuit of the buck switching regulator while the feedforward capacitor is formed external to the switching regulator integrated circuit. In another embodiment, the feedforward capacitor is also integrated on the switching regulator integrated circuit. When integrated on-chip, the feedforward capacitor can be formed as a capacitor with programmable capacitance so that the desired capacitance is selected to adjust the desired amount of ripple that is to be generated.
According to another aspect of the present invention, a buck switching regulator using a constant on-time and variable off-time control loop incorporates a ripple injection circuit with improved accuracy where the ripple injection circuit injects the ripple voltage signal into a point in the feedback control loop of the voltage regulator apart from the feedback voltage node. In this manner, errors in the output voltage are reduced and the accuracy of the output voltage is greatly improved. In one embodiment, the ripple injection circuit includes a gain stage receiving the feedback voltage and the ripple voltage signal is injected at the output node of the gain stage. By using a gain stage to amplify the feedback voltage and injecting the ripple voltage signal at a point bypassing the gain stage, voltage errors introduced into the regulated output voltage can be reduced significantly.
In one embodiment, the ripple injection circuit includes a gain stage implemented as an operational transconductance amplifier (OTA) receiving the feedback voltage and a first reference voltage. The ripple injection circuit further includes a first capacitor and a first resistor connected in series between the switching output voltage and the output terminal of the OTA. Finally, the ripple injection circuit includes a feedforward capacitor connected between the output voltage and the output terminal of the OTA. The ripple injection circuit with improved accuracy will be described in more detail below.
Buck regulator 100 implements a fixed on-time, variable off-time feedback control loop. In the present description, fixed on-time is also referred to as “constant on-time”. In the following description, the fixed on-time feedback control loop of buck regulator 100 will be described first, followed by the description of the ripple injection circuit for injecting the desired amount of ripple to the feedback control loop.
Referring to
The DC output voltage VOUT is coupled back to buck regulator 100 to form a feedback control loop for regulating the switching output voltage VSW. Specifically, output voltage VOUT is coupled through a FB terminal 108 to a voltage divider formed by resistors R1 and R2. A feedback voltage VFB (node 124), being a stepped down version of the output voltage VOUT, is coupled to a first input terminal (the negative input terminal) of an error comparator 126. A reference voltage VREF (node 138) is coupled to a second input terminal (the positive input terminal) of error comparator 126. Reference voltage VREF is generated by a voltage reference circuit 136 powered by the input voltage VIN. The voltage reference circuit 136 is well known and many circuit configurations are possible for receiving the input voltage VIN and generating a reference voltage VREF having the desired voltage magnitude.
Error comparator 126 evaluates the difference between the feedback voltage VFB and the reference voltage VREF and provides an output voltage signal VCOMP
To implement the variable off-time control, the End output signal from On-Timer 128 is coupled to the Start input terminal of an Off-Timer 130. Thus, when the on-time duration expires, the off-time duration programmed in Off-Timer 130 is initiated. Off-Timer 130 provides an End output signal to logic circuit 132 to indicate the end of the off-time duration, at which time the power transistor M1 can be turned back on if the feedback voltage VFB is less than the reference voltage VREF. In this manner, a minimum off-time is implemented in the feedback control loop.
Through the operation of error comparator 126, On-timer 128, and Off-Timer 130, logic circuit 132 generates control signals to driver 134 to cause power switches M1 and M2 to be turned on and off alternately to generate the switching output voltage VSW. In the present embodiment, the feedback control loop is established so that the on-time of buck switching regulator 100 is adaptable to different input voltages and different output voltages with the goal to keep the operating frequency constant.
As illustrated by the flow chart of
where ConstTon is the constant on-time and Contr.Toff is the off-time. If the constant on-time is defined as:
The frequency of switching output voltage is then constant as a function of VIN. Constant frequency of the switching output voltage is desirable in some applications.
Returning to
Ripple injection circuit 120 includes a first capacitor CINJ and a resistor RINJ connected in series between the switching output voltage VSW (node 122) and the feedback voltage VFB (node 124). In the present embodiment, first capacitor CINJ has one terminal connected to the switching output voltage node SW and the other terminal connected to resistor RINJ and resistor RINJ is connected between capacitor CINJ and the feedback voltage VFB (node 124). In other embodiments, the order of capacitor CINJ and resistor RINJ can be reversed. The ripple injection circuit 120 works in conjunction with the voltage divider of resistors R1 and R2 to generate the feedback voltage VFB having the desired voltage level and the desired amount of ripple. In accordance with the present invention, the ripple injection circuit 120 is coupled to the switching output voltage node 122 so that the ripple voltage signal is generated from the switching output voltage VSW. In other words, the ripple voltage signal is a divided-down signal of the switching output voltage VSW and is at the switching frequency of the switching output voltage. The amount of ripple signal generated at the feedback voltage VFB node 124, if any, is determined by the capacitance value of the feedforward capacitor CFF. Feedforward capacitor CFF is connected between the output voltage VOUT (node 114) and a feedforward FFWD terminal 110 of buck regulator 100. The feedforward FFWD terminal 110 is connected directly to the feedback voltage VFB node 124. Thus, feedforward capacitor CFF is connected between the output voltage VOUT and the feedback voltage VFB.
The ripple voltage signal is divided by capacitor CINJ and the feedforward capacitor CFF. When the switching output voltage VSW is applied to capacitor CINJ, capacitor CINJ acts as a differentiator. If the switching output voltage VSW switches sufficiently rapidly, then capacitor CINJ acts as a short circuit. In this manner, the switching output voltage VSW is divided down to generate the ripple voltage signal. In one embodiment, the ripple voltage has a peak-to-peak magnitude of approximately 20 mV.
Feedforward capacitor CFF is coupled in parallel with resistors R1 and R2 and acts as a capacitive divider with capacitor CINJ. Thus, the peak-to-peak voltage of the ripple voltage signal is made a function of the capacitance value of the feedforward capacitor CFF. Accordingly, the capacitance value of feedforward capacitor CFF is used to program the ripple injection circuit to allow buck regulator 100 to work with output capacitor COUT having any ESR values.
More specifically, feedforward capacitor CFF is AC coupled between the output voltage VOUT and the feedback voltage VFB. If the capacitance of capacitor CFF is very large, then capacitor CFF is a short circuit to the AC signals that may appear at the output voltage VOUT node 114. As such, the ripple injection circuit is shorted out by the large feedforward capacitor CFF and no ripple signal generated by the ripple injection circuit is injected to the feedback voltage VFB node. Instead, the output voltage VOUT, with the ripple voltage component, is coupled to the voltage divider of the feedback control loop through FB terminal 108. The feedback voltage VFB is thus generated from an output voltage signal VOUT having the necessary ripple.
On the other hand, if the capacitance of capacitor CFF is very small or is zero, then capacitor CFF is an open circuit to the AC signals that may appear on the output voltage VOUT node 114. In this case, the ripple signal generated by the ripple injection circuit of capacitor CINJ and RINJ passes to the feedback voltage VFB node 124 and the maximum amount of ripple is provided to the feedback control loop.
Thus, in actual implementation, when an output capacitor COUT with sufficiently large ESR is used, there is no need for ripple injection circuit 120 to generate any ripple voltage signal for the feedback control loop. When no ripple voltage signal from the ripple injection circuit is desired, a feedforward capacitor CFF having a large capacitance value is used where the large feedforward capacitor CFF essentially shorts out the effect of capacitor CINJ of the ripple injection circuit and the ripple signal generated by the ripple injection circuit is canceled out by the feedforward capacitor CFF.
On the other hand, when an output capacitor COUT with a small or zero ESR is used, the ripple injection circuit 120 is relied upon to provide the necessary ripple voltage signal for the feedback control loop. Thus, a feedforward capacitor CFF having a small capacitance value is used to allow the ripple signal generated by the ripple injection circuit 120 from the switching output voltage VSW to be passed to the feedback voltage node 124.
The feedforward capacitor CFF thus operates to adjust the amount of ripple voltage that is to be provided by the ripple injection circuit 120. In one embodiment, the feedforward capacitor CFF has a capacitance value in the range of 220 pF to 2.2 nF. The buck regulator 100 can thus work with output capacitor having any ESR value simply by selecting the corresponding capacitance value for the feedforward capacitor. The feedforward capacitor, besides being used as a capacitive divider with the ripple injection circuit, also serves to improve the stability of the transient response by providing a zero to the feedback control loop.
Furthermore, because the ripple voltage signal generated by the ripple injection circuit is an AC version of the switching output voltage VSW coupled to drive the inductor L1, the ripple voltage signal is directly proportional to the input voltage Vin. From control loop stability standpoint, it is good to have a big ripple but from accuracy (load regulation, output voltage ripple) standpoint, the ripple should be minimized to have a minimum impact when input voltage is varying.
In the present embodiment, the feedforward capacitor CFF is formed external to the integrated circuit of the buck regulator 100 to allow different capacitance values of the feedforward capacitor to be used to coordinate with the ESR characteristics of the output capacitor COUT. The amount of injected ripple voltage can thus be fine-tuned by the feedforward capacitance CFF. However, in other embodiments, the ripple injection circuit and the feedforward capacitor CFF can both be integrated onto the buck regulator integrated circuit to reduce the number of external components in the buck switching regulator system 10. When integrated, the feedforward capacitor CFF can have a capacitance value suitable for a given range of ESR values of the output capacitor.
The buck regulator incorporating the ripple injection circuit and the feedforward capacitor of the present invention realizes many advantages over the conventional solutions. For instance, one prior art solution generates the ripple voltage from the output voltage VOUT by amplifying the remaining small amount of ripple voltage. When the ripple signal is indeed very small, it is very difficult to replicate the ripple and very difficult to differentiate the ripple signal from noise signals. To the contrary, the ripple injection circuit of the present invention generates the ripple signal from the switching output voltage. Thus, simple circuitry can be used to divide-down the switching output voltage and the ripple signal can be generated free of noise.
Improved Output Voltage Accuracy
In the buck regulator 100 of
After the constant on-time, the high-side switch is turned off and the feedback voltage VFB decreases. When the feedback voltage VFB drops to reference voltage VREF (line 194), the high-side switch M1 will turn on again after a propagation delay tdelay. The amount of voltage ΔV2 by which feedback voltage VFB drops below reference voltage VREF is given as:
Because of the delay time in turning on the high-side switch, the average feedback voltage AVG_VFB (line 192) is offset from the reference voltage VREF (line 194). The difference between the average feedback voltage AVG_VFB and the reference voltage VREF is an error voltage VERR2, where VERR2 is given as: ½ΔV1-ΔV2. The voltage error VERR2 is multiplied by the feedback divider ratio to calculate error in the output voltage VOUT. Thus, the residual DC voltage error that appears on the output voltage VOUT will be (VOUT/VREF) times as large as the error that appears at the feedback terminal in the form of voltage error VERR2. As a result, output voltage VOUT incorporates the magnified voltage errors and becomes inaccurate. For example, if error voltage VERR2 is 10 mV, the output voltage VOUT is 1.8V, and the reference voltage VREF is 0.9V, the DC residual voltage error seen at the output voltage becomes 10 mV (1.8/0.9)=20 mV, resulting in an offset of 20 mV at the output voltage VOUT.
In addition, the fact that the time values tON and tdelay are independent parameters cause inaccuracy in the DC output voltage VOUT. In addition, voltages ΔV1 and ΔV2 change with the input voltage VIN and output voltage VOUT, thereby degrading line regulation. Finally, in actual implementation, the “on” resistance is not zero. Therefore, the output voltage VOUT will vary with the load. These factors contribute to inaccuracies in the regulated output voltage VOUT which are undesirable.
According to another aspect of the present invention, a buck switching regulator using a constant on-time and variable off-time control loop incorporates a ripple injection circuit with improved accuracy where the ripple injection circuit injects the ripple voltage signal into a point in the feedback control loop of the voltage regulator apart from the feedback voltage node.
Referring to
Buck regulator 400 implements a constant on-time, variable off-time feedback control loop. The constant on-time feedback control loop of buck regulator 400 operates in the same manner as that of buck regulator 100 of
Buck switching regulator 400 includes a ripple injection circuit 420 working in conjunction with a feedforward capacitor CFF for generating a given amount of ripple from the switching output voltage and injecting the ripple voltage signal into the feedback control loop of the buck switching regulator system 40. More particularly, in ripple injection circuit 420, the ripple voltage signal is injected at a point in the feedback control loop separate from the feedback voltage VFB. The impact of the voltage error caused by the ripple voltage signal on the output voltage VOUT is thereby significantly reduced, as will be described in more detail below.
Ripple injection circuit 420 includes an amplifier 450 inserted between the feedback voltage node 424 and the error comparator 426 of buck regulator 400. Amplifier 450 is coupled to receive the feedback voltage VFB on a non-inverting input terminal and a reference voltage VREF on an inverting input terminal. Amplifier 450 generates an output voltage VX at an output terminal 452 of the amplifier indicative of the difference between the feedback voltage VFB and the reference voltage VREF. More specifically, the output voltage VOUT on node 414 is fed back through the feedback terminal (FB) 408 to a voltage divider formed by resistors R1 and R2. The feedback voltage VFB having the desired voltage level is generated at the output node 424 of the voltage dividers of resistors R1 and R2. The feedback voltage VFB, being a divided down voltage of the output voltage VOUT, is compared with the reference voltage VREF at amplifier 450 to generate output voltage VX.
Output voltage VX is then coupled to the inverting input terminal of error comparator 426 to be compared with a second reference voltage VREF2 which is coupled to the non-inverting input terminal of error comparator 426. Reference generator 436 generates the reference voltages VREF and VREF2. Second reference voltage VREF2 is a DC voltage selected to bias the error comparator 426 and amplifier 450 at an appropriate common-mode level. Error comparator 426 evaluates the difference between the output voltage VX and the second reference voltage VREF2 and generates the output voltage signal VCOMP
In the present embodiment, amplifier 450 is an amplifier with a large output impedance, such as a transconductance (Gm) amplifier. Furthermore, amplifier 450 should be an amplifier with a high DC gain but with an AC gain of 1. In one embodiment, amplifier 450 is a low-Gm operational transconductance amplifier (OTA) which has a high output impedance. When amplifier 450 has a high output impedance, the amplifier enables the feedforward transmission of the injected ripple voltage signal from the amplifier output terminal to the error comparator. When amplifier 450 is implemented as an OTA, buck switching regulator system 40 is able to preserve the good transient response and stability in the feedback control loop achieved in buck switching regulator system 10 without the additional amplifier. The low-Gm OTA operates to add gain only at very low frequencies and has a gain of 1 at higher frequencies without degrading the phase reserve.
Ripple injection circuit 420 further includes a resistor RINJ and a first capacitor CINJ connected in series between the switching output voltage VSW (node 422) and the output terminal 452 of amplifier 450. The feedforward FFWD terminal 410 of buck regulator 400 is also connected also to the output terminal 452 of amplifier 450. The output terminal 452 of amplifier 450 becomes the ripple injection node of the feedback control loop and the ripple injection node 452 is separate and apart from the feedback voltage node 424. Amplifier 450 has a high output impedance to allow the ripple voltage signal to be injected at its output terminal 452. When the feedforward capacitor CFF is connected between the output voltage VOUT (node 414) and the feedforward FFWD terminal 410 of buck regulator 100, the feedforward capacitor CFF is connected between the output voltage VOUT (node 414) and the ripple injection node 452. The amount of ripple signal generated at the ripple injection node 452, if any, is determined by the capacitance value of the feedforward capacitor CFF.
The ripple injection circuit 420 is coupled to the switching output voltage node 422 so that the ripple voltage signal is generated from the switching output voltage VSW. In other words, the ripple voltage signal is a divided-down signal of the switching output voltage VSW and is at the switching frequency of the switching output voltage. By including the ripple injection circuit and the feedforward capacitor CFF, buck regulator 400 of the present invention can be coupled to an output capacitor COUT having any value of ESR. That is, a zero-ESR capacitor, such as a ceramic capacitor, can be used as the output capacitor COUT so that the ripple voltage at the output voltage VOUT is minimized. Meanwhile, the ripple injection circuit and the feedforward capacitor of the present invention operate to provide the necessary ripple for the feedback control loop. On the other hand, if a capacitor with a large ESR is used, the ripple injection circuit of the present invention can be deactivated by the feedforward capacitor CFF as no ripple generation is necessary.
The ripple voltage signal generated by the ripple injection circuit 420 is determined by the resistance of resistor RINJ, and the capacitances of capacitor CINJ and feedforward capacitor CFF. Resistor RINJ and capacitor CINJ function as a low-pass filter, generating a ripple voltage at node 452 which is capacitively divided between capacitor CINJ and capacitor CFF. More specifically, the magnitude of the ripple voltage signal is given as (On-Time)*(VIN-VOUT)/RINJ/(CINJ+CFF). In this manner, the switching output voltage VSW is divided down to generate the ripple voltage signal. In one embodiment, the ripple voltage has a peak-to-peak magnitude of approximately 20 mV.
Feedforward capacitor CFF acts as a capacitive divider with capacitor CINJ. Thus, the peak-to-peak voltage of the ripple voltage signal is made a function of the capacitance value of the feedforward capacitor CFF. Accordingly, the capacitance value of feedforward capacitor CFF is used to program the ripple injection circuit to allow buck regulator 400 to work with output capacitor COUT having any ESR values. More specifically, feedforward capacitor CFF is AC coupled between the output voltage VOUT and the voltage VX. If the capacitance of capacitor CFF is very large, then capacitor CFF is a short circuit to the AC signals that may appear at the output voltage VOUT node 414. As such, the ripple injection circuit is shorted out by the large feedforward capacitor CFF and no ripple signal generated by the ripple injection circuit is injected to the ripple injection node 452. Instead, the output voltage VOUT, with the ripple voltage component, is coupled to the voltage divider of the feedback control loop through FB terminal 408. The feedback voltage VFB is thus generated from an output voltage signal VOUT having the necessary ripple.
On the other hand, if the capacitance of capacitor CFF is very small or is zero, then capacitor CFF is an open circuit to the AC signals that may appear on the output voltage VOUT node 114. In this case, the ripple signal generated by the ripple injection circuit of capacitor CINJ and RINJ passes to the ripple injection node 452 and the maximum amount of ripple is provided to the feedback control loop.
Thus, in actual implementation, when an output capacitor COUT with sufficiently large ESR is used, there is no need for ripple injection circuit 420 to generate any ripple voltage signal for the feedback control loop. When no ripple voltage signal from the ripple injection circuit is desired, a feedforward capacitor CFF having a large capacitance value is used where the large feedforward capacitor CFF essentially shorts out the effect of capacitor CINJ of the ripple injection circuit and the ripple signal generated by the ripple injection circuit is canceled out by the feedforward capacitor CFF.
On the other hand, when an output capacitor COUT with a small or zero ESR is used, the ripple injection circuit 420 is relied upon to provide the necessary ripple voltage signal for the feedback control loop. Thus, a feedforward capacitor CFF having a small capacitance value is used to allow the ripple signal generated by the ripple injection circuit 420 from the switching output voltage VSW to be passed to the ripple injection node 452. In this manner, the feedforward capacitor CFF thus operates to adjust the amount of ripple voltage that is to be provided by the ripple injection circuit 420. In one embodiment, the feedforward capacitor CFF has a capacitance value in the range of 220 pF to 2.2 nF.
Buck regulator 400 can thus work with output capacitor having any ESR value simply by selecting the corresponding capacitance value for the feedforward capacitor. The ripple injection circuit 420 in buck regulator 400 realizes many of the same advantages as ripple injection circuit 420 buck regulator 100 described above and will not be further described here.
As thus configured, ripple injection circuit 420 modifies the feedback control loop of buck regulator 400. In operation, when voltage VX drops below the reference voltage VREF2, the high-side switch M1 is turned on for a fixed on-time tON. After the fixed on-time tON, the high-side switch M1 is turned off and the low-side switch M2 is turned on for at least the minimum off-time. When voltage VX drops below reference voltage VREF2, the high-side switch M1 is turned on again. Ripple injection circuit 420 injects the ripple voltage signal onto output voltage VX of amplifier 450. That is, the ripple voltage signal is injected after the gain stage of amplifier 450.
As in the case of buck regulator 100, the voltage waveform of voltage VX at the input of error comparator 426 will be asymmetric about VREF2 and will vary with the input voltage VIN, the output voltage VOUT and the load current. However, the inaccurate comparator input has been moved to the ripple injection node 452 instead of the feedback voltage node 424. The resulting voltage error at the feedback voltage node 424 is equal to the voltage error at the ripple injection node divided by the gain of amplifier 450. By inserting the gain stage of amplifier 450, the DC error at the output voltage VOUT is greatly reduced. More specifically, the offset error at the feedback voltage node is now 1/A times the offset error of the average DC voltage of voltage VX, where A is the DC gain of amplifier 450. The output voltage VOUT experiences a DC error that is significantly reduced by the DC gain of amplifier 450 and the output voltage can be regulated to a high degree of accuracy. In one embodiment, the DC gain A of amplifier 450 is 600 or more. Thus, when the error voltage VERR2 is 10 mV, the DC residual voltage error appearing at the output voltage VOUT becomes only 16 μV, representing a significant reduction in error and a significant improvement in accuracy.
In some applications, buck switching regulator system 40 may be applied to operate in the discontinuous conduction mode (DCM). In DCM, the low-side switch M2 is not allowed to conduct current in the reverse direction. When the current reverses, the low-side switch M2 is turned off and the output capacitor supplies the load current until voltage VX drops below reference voltage VREF2, at which point the high-side switch M1 is turned back on again.
However, under very light load conditions, the feedback voltage VFB can be greater than the reference voltage VREF for a long period of time. During this period, amplifier 450 pulls voltage VX to a much higher voltage level than voltage VREF2. Then, when a load step occurs, voltage VX has to decrease by a large amount of voltage before the feedback control loop can turn on the high-side switch again. In accordance with an alternate embodiment of the present invention, a clamp circuit is added to ripple injection circuit to limit the voltage swing of voltage VX, thereby improving the transient response of the buck regulator operating in DCM under changing load conditions.
In the embodiments shown in
Furthermore, in the embodiments shown in
In
Multi-Mode On and Off Time Control
In the buck regulators described above, a constant on-time control and variable off-time control scheme is applied to control the switching of the high-side and low-side switches. More specifically, the constant on-time, given by equation (2) above, is a function of the input voltage VIN. The operating frequency of the buck regulator is stable while the duty cycle varies as the off-time is adjusted from a minimum off-time to an increasing amount. Under this operation regime, even when the feedback voltage VFB is below the reference voltage VREF at the end of the constant on-time, the high-side switch is turned off and the low-side switch is turned on for the minimum off-time before the high-side switch can be turned on again. The requirement of the minimum off-time is to ensure sufficient set-up time for the control circuit, particularly the set-up time for the error comparator. In some cases, it is desirable to keep the high-side switch turned on until the feedback voltage reaches the reference voltage.
Furthermore, although ideally, the buck regulator can reach up to a 100% duty cycle, the minimum on-time requirement limits the duty cycle of the buck regulator. The delay time for turning on and off the switches also limits the duty cycle. In addition, if current sensing is required on the low-side switch, such as for current limit or discontinuous conduction mode, enough time must be provided to carry out the current sensing functions. The maximum duty cycle achievable is then limited to
Dmax=ton/(ton+toff,min).
While it is possible to increase the maximum duty cycle by increasing on-time tON, increasing on-time ton may have undesirable consequences. First, an increased on-time leads to higher inductor current ripple and may not always be practical. Second, the on-time cannot be allowed to extend for too long. While it is possible to allow the on-time to be extended until the feedback voltage VFB is lifted above the reference voltage VREF, such a condition may lead to an undesirable result, particularly when there is a short circuit condition. Under a short condition, the feedback voltage is not able to increase above the reference voltage and the high-side switch will never get turned off, resulting in the inductor current becoming extremely high. Finally, if the on-time is expanded too much, poor transient response can result. Consider a situation where the load current steps from a small current to a large current. Because the current step causes the feedback voltage VFB to drop below the reference voltage VREF, the regulator control loop attempts to increase the on-time ton as much as possible. If on-time ton is increased too long, the inductor current will go well above the load current and when the high-side switch is finally turned off and the low-side switch turns on, the energy stored in the inductor will cause the output voltage to overshoot its target.
According one aspect of the present invention, a buck switching regulator implements a multi-mode on and off time control scheme for realizing a constant on-time, variable off-time control loop. The multi-mode on and off time control scheme can be incorporated in the buck switching regulator of
Referring to
The two maximum on-time limits operate to provide a first maximum on-time ton
The multi-mode on and off time control scheme operates as follows. At low to medium duty cycles, the on-time control circuit implements a constant on-time and controls the off-time of the high-side switch to achieve regulator. Then at high duty cycles, the off-time is fixed at the minimum off-time and the on-time control circuit controls the on-time to achieve regulation. At the limits, a maximum duty cycle of ton,max/(ton,max+toff,min) is realized which approaches 100% when ton,max is allowed to be selectively expanded to a large value under certain conditions. The maximum on-time extension is realized by using two maximum on-times with the second maximum on-time being a large value.
Then, when the Top_Switch_Off signal is deasserted to turn on the high-side switch, transistor M11 is turned off and current source 960 is allowed to charge up capacitor Cx. When voltage VTMAX at the top plate (node 962) of capacitor CX reaches the voltage VDC, comparator 940 switches state and generates the Force_Off signal having a logical high level. The logical high level of the Force_Off signal indicates that the Force_Off signal is asserted and the Top_Switch_Off signal is accordingly asserted. In this manner, the capacitance of capacitor Cx, or the time for capacitor CX to be charged up to the VDC voltage, establishes the first maximum on-time ton,max1.
In accordance with one embodiment of the present invention, maximum on-time control circuit 900 provides a second, extended maximum on-time ton
The construction and operation of the second timer circuit will be described with reference to
AND gate 972 drives the set input terminal of a set-reset flip-flop 974. The reset input terminal is driven by the Top_Switch_Off signal. The output signal Q of set-reset flip-flop 974 is the Increase_ton,max signal which is coupled to drive the gate terminal of an NMOS transistor M12. The drain terminal of NMOS transistor M12 is connected to node 962 while the source terminal is connected to capacitor CY. When the Increase_ton,max signal is asserted, transistor M12 is turned on to connect capacitor CY in parallel with capacitor CX. When the Increase_ton,max signal is not asserted, transistor M12 is turned off.
The Increase_ton,max signal is asserted when AND gate 972 asserts its output signal, thereby setting the output signal Q of flip-flop 974 to a logical high. When the Top_Switch_Off signal is asserted, the output signal Q of flip-flop 974 is reset to a logical low. When neither the set nor the reset input terminal is asserted, the output signal Q of flip-flop 974 remains in the previous logical state.
The operation of the second timer circuit is as follows. When the minimum off-time is reached (time A), the toff,min
On the other hand, at the next switching cycle, when the minimum off-time is reached but the Top_Switch_On signal is not asserted (time C), AND gate 972 does not assert it's output signal and the Increase_ton,max signal remains reset. That is, when the minimum off-time is reached but the high-side switch is not turned on, then maximum on-time control circuit 900 determines that the previous switching cycle does not involve a minimum off time. In that case, no extension of the maximum on-time is needed.
The maximum on-time control circuit 900, when implemented in a buck regulator, provides many advantages for improving the operation of the buck regulator. First, maximum on-time control circuit 900 provides two maximum on-times—the first maximum on-time ton
The above detailed descriptions are provided to illustrate specific embodiments of the present invention and are not intended to be limiting. Numerous modifications and variations within the scope of the present invention are possible. The present invention is defined by the appended claims.
Weng, Matthew, Vinn, Charles, Stoichita, Ioan
Patent | Priority | Assignee | Title |
10110124, | May 18 2016 | Silergy Semiconductor Technology (Hangzhou) LTD | Control circuit and control method for switching regulator and switching regulator with the same |
10193442, | Feb 09 2016 | Faraday Semi, LLC | Chip embedded power converters |
10250145, | Mar 11 2011 | STMicroelectronics S.r.l. | Device for avoiding hard switching in resonant converter and related method |
10381928, | Dec 21 2017 | NXP USA, INC. | Voltage regulator and method for operating a voltage regulator |
10411595, | Dec 21 2017 | NXP USA, INC. | Ripple generation device and method for a constant on-time voltage regulator |
10504848, | Feb 19 2019 | FARADAY SEMI, INC | Chip embedded integrated voltage regulator |
10924010, | May 18 2016 | Silergy Semiconductor Technology (Hangzhou) LTD | Control circuit and control method for switching regulator and switching regulator with the same |
10924011, | Feb 09 2016 | Faraday Semi, Inc. | Chip embedded power converters |
11063516, | Jul 29 2020 | FARADAY SEMI, INC | Power converters with bootstrap |
11069624, | Apr 17 2019 | FARADAY SEMI, INC | Electrical devices and methods of manufacture |
11183928, | Jan 12 2015 | Switching regulator and control method thereof | |
11502601, | Jun 18 2020 | uPI Semiconductor Corp. | Control circuit and control method of power converter |
11557962, | Feb 09 2016 | Faraday Semi, Inc. | Chip embedded power converters |
11621230, | Apr 17 2019 | Faraday Semi, Inc. | Electrical devices and methods of manufacture |
11652062, | Feb 19 2019 | Faraday Semi, Inc. | Chip embedded integrated voltage regulator |
11855534, | Jul 29 2020 | Faraday Semi, Inc. | Power converters with bootstrap |
11990839, | Jun 21 2022 | FARADAY SEMI, INC | Power converters with large duty cycles |
11996770, | Feb 09 2016 | Faraday Semi, Inc. | Chip embedded power converters |
7961481, | Nov 20 2007 | Leadtrend Technology Corp. | Pulse width modulation control circuit applied to charge output capacitor |
8148962, | May 12 2009 | PALISADE TECHNOLOGIES, LLP | Transient load voltage regulator |
8212538, | Dec 03 2008 | Ricoh Company, Ltd. | Hysteretic switching regulator and control method used therein |
8305059, | Dec 30 2008 | Texas Instruments Incorporated | Voltage regulator circuit |
8358114, | Apr 28 2009 | Western Digital Technologies, Inc. | Output capacitor current as feedback to control a hysteretic voltage regulator |
8558522, | Dec 18 2010 | DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT | Method for scaling a drive signal and circuit therefor |
8581564, | Aug 08 2011 | Rohm Co., Ltd. | Switching power supply apparatus |
8760131, | Jan 06 2012 | Microchip Technology Incorporated | High bandwidth PSRR power supply regulator |
8830405, | Mar 07 2011 | Rohm Co., Ltd. | DC/DC converter and television using same |
8890499, | Mar 11 2013 | Microchip Technology Incorporated | Buck DC-DC converter with improved accuracy |
8907644, | Jul 14 2011 | Qualcomm Incorporated | Synchronization of hysteretic power converters |
8912780, | Feb 16 2010 | DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT | Switching control circuit |
8922187, | Mar 11 2013 | Microchip Technology Incorporated | Buck DC-DC converter with improved accuracy and stability |
8970191, | Feb 01 2010 | National Semiconductor Corporation | On/off time modulation for constant on-time and constant off-time switching regulators |
9013165, | Mar 23 2012 | Micrel, Inc.; Micrel, Inc | Switching regulator including a configurable multi-mode PWM controller implementing multiple control schemes |
9035632, | Jul 29 2009 | MUFG UNION BANK, N A | DC-DC converter, control circuit, and power supply control method |
9041377, | Jun 30 2011 | Monolithic Power Systems, Inc | Pseudo constant on time control circuit and step-down regulator |
9046904, | Mar 26 2012 | DB GLOBALCHIP CO , LTD | Apparatus and method for controlling pulse frequency modulation in single-inductor dual-output power circuit |
9058043, | Mar 07 2013 | Excelliance MOS Corporation | Voltage converter for generating output signal with steady ripple |
9071136, | Mar 30 2012 | Qualcomm Incorporated | System and method for suppression of peaking in an external LC filter of a buck regulator |
9134738, | Feb 08 2013 | Excelliance MOS Corporation | Voltage converter |
9143046, | Mar 11 2011 | STMicroelectronics S.r.l. | Device for avoiding hard switching in resonant converter and related method |
9209692, | Apr 13 2011 | Huawei Technologies Co., Ltd. | Hysteretic control conversion circuit and power supply system |
9306454, | May 23 2013 | Microchip Technology Incorporated | Optimal ripple injection for a boost regulator |
9312763, | Apr 22 2013 | Huawei Technologies Co., Ltd. | DC-DC converter |
9325243, | May 23 2013 | Microchip Technology Incorporated | Boost regulator incorporating peak inductor current modulation |
9400295, | May 09 2013 | Qualcomm Incorporated | Method and devices for non-intrusive power monitoring |
9407149, | Mar 11 2014 | GREEN SOLUTION TECHNOLOGY CO., LTD. | Buck converting controller for reduction of output voltage overshoot |
9467043, | Mar 26 2014 | Microchip Technology Incorporated | Buck DC-DC converter with fixed frequency |
9471076, | Jan 06 2012 | Microchip Technology Incorporated | High bandwidth PSRR power supply regulator |
9641075, | Dec 08 2014 | NXP B.V. | Current feedback and offset voltage cancellation for DC-DC converter |
9641076, | Jan 07 2014 | Samsung Electronics Co., Ltd. | Switching regulators |
9645590, | Jan 26 2016 | Solomon Systech Limited | System for providing on-chip voltage supply for distributed loads |
9667145, | Feb 11 2015 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Fast transient response for switching regulators |
9667146, | Feb 11 2015 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Fast transient response for switching regulators |
9729057, | Feb 11 2015 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Fast transient response for switching regulators |
9735686, | Mar 11 2011 | STMicroelectronics S.r.l. | Device for avoiding hard switching in resonant converter and related method |
9941791, | Feb 11 2015 | CAVIUM INTERNATIONAL; MARVELL ASIA PTE, LTD | Fast transient response for switching regulators |
ER7734, | |||
RE49184, | Oct 18 2013 | MAGNACHIP MIXED-SIGNAL, LTD | DC-DC converter |
Patent | Priority | Assignee | Title |
6147478, | Sep 17 1999 | Texas Instruments Incorporated; Texas Instruments Inc | Hysteretic regulator and control method having switching frequency independent from output filter |
6583610, | Mar 12 2001 | JPMORGAN CHASE BANK, N A , AS SUCCESSOR AGENT | Virtual ripple generation in switch-mode power supplies |
7202642, | Mar 22 2006 | ANPEC ELECTRONICS CORPORATION | Switching Regulator Capable of Raising System Stability by Virtual Ripple |
20070222423, | |||
20080030181, | |||
20080061750, | |||
20080088284, | |||
20080088292, |
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