Patent
   D402273
Priority
Dec 26 1996
Filed
Jun 03 1997
Issued
Dec 08 1998
Expiry
Dec 08 2012
Assg.orig
Entity
unknown
3
8
n/a
We claim the ornamental design for a connector for printed circuit boards, as shown and described.

FIG. 1 is a front view of a connector for printed circuit boards showing our new design in a first embodiment, while the rear view corresponds to the front view;

FIG. 2 is a top view of the connector for printed circuit boards;

FIG. 3 is a bottom view of the connector for printed circuit boards;

FIG. 4 is a left side view of the connector for printed circuit boards, while the right side view corresponds to the left side view;

FIG. 5 is a sectional view along the line V--V in FIG. 1;

FIG. 6 is a sectional view along the line V--V in FIG. 1 in a connecting condition of printed circuit boards;

FIG. 7 is a front view of a connector for printed circuit boards showing our new design in a second embodiment, while the rear view corresponds to the front view;

FIG. 8 is a top view of the connector for printed circuit boards of the second embodiment;

FIG. 9 is a bottom view of the connector for printed circuit boards of the second embodiment;

FIG. 10 is a left side view of the conector for printed circuit boards of the second embodiment, while the right side view corresponds to the left side view;

FIG. 11 is a sectional view along the line XI--XI in FIG. 7; and,

FIG. 12 is a sectional view along the line XI--XI in FIG. 7 in a connecting condition of printed circuit boards.

The broken-line disclosure of a portion of a circuit board in the views is for illustrative purposes only and forms no part of the claimed design.

Nakashima, Terumi, Hashimoto, Narihiko, Kataoka, Yasuhiro

Patent Priority Assignee Title
D691101, Nov 08 2011 Seiko Epson Corporation Circuit board for an ink cartridge
D808350, Mar 06 2017 TopLine Corporation Fixture for delivering interconnect members onto a substrate
D908648, Dec 12 2019 TopLine Corporation Adjustable fixture for aligning column grid array substrates
Patent Priority Assignee Title
5089929, Mar 08 1990 U S INTELCO NETWORKS, INC Retrofit integrated circuit terminal protection device
D317592, Jan 19 1987 Canon Kabushiki Kaisha Semiconductor element
D357901, Sep 27 1993 Telefonaktiebolaget L M Ericsson Power supply unit
D359028, Sep 02 1993 SGS-Thomson Microelectronics, Inc Socketed integrated circuit package
JP898318,
JP898319,
JP908880,
JP908881,
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Executed onAssignorAssigneeConveyanceFrameReelDoc
May 01 1997NAKASHIMA, TERUMISony CorporationASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0085640703 pdf
May 01 1997NAKASHIMA, TERUMIJAPAN SOLDERLESS TERMINAL MFG CO , LTD ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0085640703 pdf
May 03 1997HASHIMOTO, NARIHIKOSony CorporationASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0085640703 pdf
May 03 1997HASHIMOTO, NARIHIKOJAPAN SOLDERLESS TERMINAL MFG CO , LTD ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0085640703 pdf
May 14 1997KATAOKA, YASUHIROSony CorporationASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0085640703 pdf
May 14 1997KATAOKA, YASUHIROJAPAN SOLDERLESS TERMINAL MFG CO , LTD ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0085640703 pdf
Jun 03 1997Sony Corporation(assignment on the face of the patent)
Jun 03 1997Japan Solderless Terminal Mfg. Co., Ltd.(assignment on the face of the patent)
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