Patent
   D411512
Priority
Dec 11 1996
Filed
Jul 09 1998
Issued
Jun 29 1999
Expiry
Jun 29 2013
Assg.orig
Entity
unknown
0
10
n/a
We claim the ornamental design for a connector for printed circuit boards, as shown and described.

FIG. 1 is a front view of a connector for printed circuit boards showing our new design in a first embodiment, while the rear view corresponds to the front view.

FIG. 2 is a top view of said connector for printed circuit boards of the first embodiment.

FIG. 3 is a bottom view of said connector for printed circuit boards of the first embodiment.

FIG. 4 is a left side view of said connector for printed circuit boards of the first embodiment, while the right side view corresponds to the left side view.

FIG. 5 is a sectional view along the line V--V in FIG. 2.

FIG. 6 is a sectional view along the line VI--VI in FIG. 1.

FIG. 7 is a sectional view along the line VI--VI in FIG. 1, wherein said connector for printed circuit boards is shown in a condition connecting two circuit boards, which are drawn in broken lines for illustrative purposes only. The circuit boards drawn in broken lines form no part of the claimed design.

FIG. 8 is a front view of a connector for printed circuit boards showing our new design in a second embodiment, while the rear view corresponds to the front view.

FIG. 9 is a top view of said connector for printed circuit boards of the second embodiment.

FIG. 10 is a bottom view of said connector for printed circuit boards of the second embodiment.

FIG. 11 is a left side view of said connector for printed circuit boards of the second embodiment, while the right side view corresponds to the left side view.

FIG. 12 is a sectional view along the line XII--XII in FIG. 9.

FIG. 13 is a sectional view along the line XIII--XIII in FIG. 8; and,

FIG. 14 is a sectional view along the line XIII--XIII in FIG. 8, wherein said connector for printed circuit boards is shown in a condition connecting two circuit boards, which are drawn in broken lines for illustrative purposes only. The circuit boards drawn in broken lines form no part of the claimed design.

Nakashima, Terumi, Hashimoto, Narihiko, Kataoka, Yasuhiro

Patent Priority Assignee Title
Patent Priority Assignee Title
5089929, Mar 08 1990 U S INTELCO NETWORKS, INC Retrofit integrated circuit terminal protection device
D312242, Jan 04 1988 Yazaki Corporation Connector housing with detachable semiconductor components
D317592, Jan 19 1987 Canon Kabushiki Kaisha Semiconductor element
D357901, Sep 27 1993 Telefonaktiebolaget L M Ericsson Power supply unit
D359028, Sep 02 1993 SGS-Thomson Microelectronics, Inc Socketed integrated circuit package
D396449, Sep 27 1993 Giga Operations Corporation Circuit board module
JP898318,
JP898319,
JP908880,
JP908881,
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Executed onAssignorAssigneeConveyanceFrameReelDoc
Jul 09 1998Sony Corporation(assignment on the face of the patent)
Jul 09 1998Solderless Terminal Mfg. Co., Ltd.(assignment on the face of the patent)
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