Substrate for a semiconductor device

The ornamental design for a substrate for a semiconductor device, as shown and described.

FIG. 1 is a top plan view of a substrate for a semiconductor device, showing my new design; the opposite side being a mirror image thereof;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a right side elevational view thereof; the opposite side being a mirror image thereof; and,

FIG. 4 is a rear elevational view thereof.

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Executed on	Assignor	Assignee	Conveyance	Frame	Reel	Doc
Oct 07 2004	MIZUKOSHI, YUKIKO	Kabushiki Kaisha Toshiba	ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS	016029	0045	pdf
Nov 19 2004		Kabushiki Kaisha Toshiba	(assignment on the face of the patent)
Mar 02 2018	Kabushiki Kaisha Toshiba	TOSHIBA MEMORY CORPORATION	ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS	045175	0632	pdf
Oct 01 2019	TOSHIBA MEMORY CORPORATION	Kioxia Corporation	CHANGE OF NAME SEE DOCUMENT FOR DETAILS	051842	0627	pdf

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