Patent
   D584250
Priority
May 01 2006
Filed
Feb 15 2008
Issued
Jan 06 2009
Expiry
Jan 06 2023
Assg.orig
Entity
unknown
0
16
n/a
The ornamental design for grooves formed around a semiconductor device on a circuit board, as shown and described.

FIG. 1 shows a plan view of the grooves formed around a semiconductor on a circuit board showing the design according to the invention.

FIG. 2 shows an enlarged view of a claimed portion as identified by the area boxed by the dash-dot-dash line in FIG. 1.

FIG. 3 shows an enlarged sectional view along the line 33 in FIG. 2; and,

FIG. 4 shows an enlarged sectional view along the line 44 in FIG. 2.

The elements shown in broken lines and dash-dot-dash lines are for illustrative purposes only and form no part of the claimed invention.

Ohsawa, Tetsuya, Tani, Emiko

Patent Priority Assignee Title
Patent Priority Assignee Title
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6121552, Jun 13 1997 CALIFORNIA, UNIVERSITY OF, REGENTS OF THE, THE Microfabricated high aspect ratio device with an electrical isolation trench
6486412, Sep 13 2000 BOE TECHNOLOGY GROUP CO , LTD Wiring board, method for producing same, display device, and electronic device
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D319629, Apr 13 1988 IBIDEN CO , LTD , A JAPANESE CORP Semiconductor substrate with conducting pattern
D566060, Apr 13 2005 Nitto Denko Corporation Grooves formed around a semiconductor device on a circuit board
D567774, May 01 2006 Nitto Denko Corporation Groove formed around a semiconductor device on a circuit board
D568836, Apr 13 2005 Nitto Denko Corporation Groove formed around a semiconductor device on a circuit board
D568838, May 01 2006 Nitto Denko Corporation Grooves formed around a semiconductor device on a circuit board
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Feb 15 2008Nitto Denko Corporation(assignment on the face of the patent)
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