Semiconductor substrate with conducting pattern

Abstract

Description

FIG. 1 is a top perspective view of a semi-conductor mounting device showing our new design;

FIG. 2 is a bottom perspective view thereof;

FIG. 3 is a right side elevational view thereof;

FIG. 4 is a left side elevational view thereof;

FIG. 5 is a rear elevational view thereof; and

FIG. 6 is a front elevational view thereof;

FIG. 7 is a top plan view thereof; and

FIG. 8 is a bottom plan view thereof.

Claims

The ornamental design for a semiconductor substrate with conducting pattern, as shown.