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The ornamental design for a semiconductor device, as shown and described.
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The broken line in the figure drawings is included for the purpose of illustrating environment and forms no part of the claimed design.
Kimura, Yoshitaka, Goto, Akira, Yamashita, Akihiko, Yoneyama, Rei, Araki, Takehiro, Ono, Mariko, Goto, Ryo
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May 26 2015 | YONEYAMA, REI | Mitsubishi Electric Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 035956 | /0961 | |
May 26 2015 | ARAKI, TAKEHIRO | Mitsubishi Electric Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 035956 | /0961 | |
May 26 2015 | GOTO, AKIRA | Mitsubishi Electric Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 035956 | /0961 | |
May 26 2015 | YAMASHITA, AKIHIKO | Mitsubishi Electric Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 035956 | /0961 | |
May 26 2015 | ONO, MARIKO | Mitsubishi Electric Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 035956 | /0961 | |
May 26 2015 | GOTO, RYO | Mitsubishi Electric Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 035956 | /0961 | |
Jun 04 2015 | KIMURA, YOSHITAKA | Mitsubishi Electric Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 035956 | /0961 | |
Jun 18 2015 | Mitsubishi Electric Corporation | (assignment on the face of the patent) | / |
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